phys_ctr 66 arch/powerpc/include/asm/cell-pmu.h extern u32 cbe_read_phys_ctr(u32 cpu, u32 phys_ctr); phys_ctr 67 arch/powerpc/include/asm/cell-pmu.h extern void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val); phys_ctr 76 arch/powerpc/include/asm/cell-pmu.h extern u32 cbe_get_ctr_size(u32 cpu, u32 phys_ctr); phys_ctr 77 arch/powerpc/include/asm/cell-pmu.h extern void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size); phys_ctr 494 arch/powerpc/include/asm/ps3.h u32 ps3_read_phys_ctr(u32 cpu, u32 phys_ctr); phys_ctr 495 arch/powerpc/include/asm/ps3.h void ps3_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val); phys_ctr 504 arch/powerpc/include/asm/ps3.h u32 ps3_get_ctr_size(u32 cpu, u32 phys_ctr); phys_ctr 505 arch/powerpc/include/asm/ps3.h void ps3_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size); phys_ctr 61 arch/powerpc/platforms/cell/pmu.c u32 cbe_read_phys_ctr(u32 cpu, u32 phys_ctr) phys_ctr 65 arch/powerpc/platforms/cell/pmu.c if (phys_ctr < NR_PHYS_CTRS) { phys_ctr 69 arch/powerpc/platforms/cell/pmu.c if (val_in_latch & (1 << phys_ctr)) { phys_ctr 70 arch/powerpc/platforms/cell/pmu.c READ_SHADOW_REG(val, pm_ctr[phys_ctr]); phys_ctr 72 arch/powerpc/platforms/cell/pmu.c READ_MMIO_UPPER32(val, pm_ctr[phys_ctr]); phys_ctr 80 arch/powerpc/platforms/cell/pmu.c void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val) phys_ctr 85 arch/powerpc/platforms/cell/pmu.c if (phys_ctr < NR_PHYS_CTRS) { phys_ctr 90 arch/powerpc/platforms/cell/pmu.c WRITE_WO_MMIO(pm_ctr[phys_ctr], val); phys_ctr 101 arch/powerpc/platforms/cell/pmu.c shadow_regs->counter_value_in_latch |= (1 << phys_ctr); phys_ctr 116 arch/powerpc/platforms/cell/pmu.c u32 phys_ctr = ctr & (NR_PHYS_CTRS - 1); phys_ctr 118 arch/powerpc/platforms/cell/pmu.c val = cbe_read_phys_ctr(cpu, phys_ctr); phys_ctr 120 arch/powerpc/platforms/cell/pmu.c if (cbe_get_ctr_size(cpu, phys_ctr) == 16) phys_ctr 129 arch/powerpc/platforms/cell/pmu.c u32 phys_ctr; phys_ctr 132 arch/powerpc/platforms/cell/pmu.c phys_ctr = ctr & (NR_PHYS_CTRS - 1); phys_ctr 134 arch/powerpc/platforms/cell/pmu.c if (cbe_get_ctr_size(cpu, phys_ctr) == 16) { phys_ctr 135 arch/powerpc/platforms/cell/pmu.c phys_val = cbe_read_phys_ctr(cpu, phys_ctr); phys_ctr 143 arch/powerpc/platforms/cell/pmu.c cbe_write_phys_ctr(cpu, phys_ctr, val); phys_ctr 258 arch/powerpc/platforms/cell/pmu.c u32 cbe_get_ctr_size(u32 cpu, u32 phys_ctr) phys_ctr 262 arch/powerpc/platforms/cell/pmu.c if (phys_ctr < NR_PHYS_CTRS) { phys_ctr 264 arch/powerpc/platforms/cell/pmu.c size = (pm_ctrl & CBE_PM_16BIT_CTR(phys_ctr)) ? 16 : 32; phys_ctr 271 arch/powerpc/platforms/cell/pmu.c void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size) phys_ctr 275 arch/powerpc/platforms/cell/pmu.c if (phys_ctr < NR_PHYS_CTRS) { phys_ctr 279 arch/powerpc/platforms/cell/pmu.c pm_ctrl |= CBE_PM_16BIT_CTR(phys_ctr); phys_ctr 283 arch/powerpc/platforms/cell/pmu.c pm_ctrl &= ~CBE_PM_16BIT_CTR(phys_ctr); phys_ctr 198 drivers/ps3/ps3-lpm.c u32 ps3_read_phys_ctr(u32 cpu, u32 phys_ctr) phys_ctr 204 drivers/ps3/ps3-lpm.c if (phys_ctr >= NR_PHYS_CTRS) { phys_ctr 206 drivers/ps3/ps3-lpm.c __LINE__, phys_ctr); phys_ctr 214 drivers/ps3/ps3-lpm.c "phys_ctr %u, %s\n", __func__, __LINE__, phys_ctr, phys_ctr 219 drivers/ps3/ps3-lpm.c switch (phys_ctr) { phys_ctr 242 drivers/ps3/ps3-lpm.c void ps3_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val) phys_ctr 250 drivers/ps3/ps3-lpm.c if (phys_ctr >= NR_PHYS_CTRS) { phys_ctr 252 drivers/ps3/ps3-lpm.c __LINE__, phys_ctr); phys_ctr 256 drivers/ps3/ps3-lpm.c switch (phys_ctr) { phys_ctr 292 drivers/ps3/ps3-lpm.c phys_ctr, val, ps3_result(result)); phys_ctr 306 drivers/ps3/ps3-lpm.c u32 phys_ctr = ctr & (NR_PHYS_CTRS - 1); phys_ctr 308 drivers/ps3/ps3-lpm.c val = ps3_read_phys_ctr(cpu, phys_ctr); phys_ctr 310 drivers/ps3/ps3-lpm.c if (ps3_get_ctr_size(cpu, phys_ctr) == 16) phys_ctr 326 drivers/ps3/ps3-lpm.c u32 phys_ctr; phys_ctr 329 drivers/ps3/ps3-lpm.c phys_ctr = ctr & (NR_PHYS_CTRS - 1); phys_ctr 331 drivers/ps3/ps3-lpm.c if (ps3_get_ctr_size(cpu, phys_ctr) == 16) { phys_ctr 332 drivers/ps3/ps3-lpm.c phys_val = ps3_read_phys_ctr(cpu, phys_ctr); phys_ctr 340 drivers/ps3/ps3-lpm.c ps3_write_phys_ctr(cpu, phys_ctr, val); phys_ctr 509 drivers/ps3/ps3-lpm.c u32 ps3_get_ctr_size(u32 cpu, u32 phys_ctr) phys_ctr 513 drivers/ps3/ps3-lpm.c if (phys_ctr >= NR_PHYS_CTRS) { phys_ctr 515 drivers/ps3/ps3-lpm.c __LINE__, phys_ctr); phys_ctr 520 drivers/ps3/ps3-lpm.c return (pm_ctrl & CBE_PM_16BIT_CTR(phys_ctr)) ? 16 : 32; phys_ctr 528 drivers/ps3/ps3-lpm.c void ps3_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size) phys_ctr 532 drivers/ps3/ps3-lpm.c if (phys_ctr >= NR_PHYS_CTRS) { phys_ctr 534 drivers/ps3/ps3-lpm.c __LINE__, phys_ctr); phys_ctr 542 drivers/ps3/ps3-lpm.c pm_ctrl |= CBE_PM_16BIT_CTR(phys_ctr); phys_ctr 547 drivers/ps3/ps3-lpm.c pm_ctrl &= ~CBE_PM_16BIT_CTR(phys_ctr);