phys_cpl          391 drivers/crypto/chelsio/chcr_algo.c 	struct cpl_rx_phys_dsgl *phys_cpl;
phys_cpl          393 drivers/crypto/chelsio/chcr_algo.c 	phys_cpl = walk->dsgl;
phys_cpl          395 drivers/crypto/chelsio/chcr_algo.c 	phys_cpl->op_to_tid = htonl(CPL_RX_PHYS_DSGL_OPCODE_V(CPL_RX_PHYS_DSGL)
phys_cpl          397 drivers/crypto/chelsio/chcr_algo.c 	phys_cpl->pcirlxorder_to_noofsgentr =
phys_cpl          404 drivers/crypto/chelsio/chcr_algo.c 	phys_cpl->rss_hdr_int.opcode = CPL_RX_PHYS_ADDR;
phys_cpl          405 drivers/crypto/chelsio/chcr_algo.c 	phys_cpl->rss_hdr_int.qid = htons(qid);
phys_cpl          406 drivers/crypto/chelsio/chcr_algo.c 	phys_cpl->rss_hdr_int.hash_val = 0;
phys_cpl          407 drivers/crypto/chelsio/chcr_algo.c 	phys_cpl->rss_hdr_int.channel = pci_chan_id;
phys_cpl          764 drivers/crypto/chelsio/chcr_algo.c 	struct cpl_rx_phys_dsgl *phys_cpl;
phys_cpl          830 drivers/crypto/chelsio/chcr_algo.c 	phys_cpl = (struct cpl_rx_phys_dsgl *)((u8 *)(chcr_req + 1) + kctx_len);
phys_cpl          831 drivers/crypto/chelsio/chcr_algo.c 	ulptx = (struct ulptx_sgl *)((u8 *)(phys_cpl + 1) + dst_size);
phys_cpl          833 drivers/crypto/chelsio/chcr_algo.c 	chcr_add_cipher_dst_ent(wrparam->req, phys_cpl, wrparam, wrparam->qid);
phys_cpl         2332 drivers/crypto/chelsio/chcr_algo.c 	struct cpl_rx_phys_dsgl *phys_cpl;
phys_cpl         2431 drivers/crypto/chelsio/chcr_algo.c 	phys_cpl = (struct cpl_rx_phys_dsgl *)((u8 *)(chcr_req + 1) + kctx_len);
phys_cpl         2432 drivers/crypto/chelsio/chcr_algo.c 	ivptr = (u8 *)(phys_cpl + 1) + dst_size;
phys_cpl         2444 drivers/crypto/chelsio/chcr_algo.c 	chcr_add_aead_dst_ent(req, phys_cpl, qid);
phys_cpl         2561 drivers/crypto/chelsio/chcr_algo.c 			   struct cpl_rx_phys_dsgl *phys_cpl,
phys_cpl         2571 drivers/crypto/chelsio/chcr_algo.c 	dsgl_walk_init(&dsgl_walk, phys_cpl);
phys_cpl         2603 drivers/crypto/chelsio/chcr_algo.c 			     struct cpl_rx_phys_dsgl *phys_cpl,
phys_cpl         2612 drivers/crypto/chelsio/chcr_algo.c 	dsgl_walk_init(&dsgl_walk, phys_cpl);
phys_cpl         2892 drivers/crypto/chelsio/chcr_algo.c 	struct cpl_rx_phys_dsgl *phys_cpl;
phys_cpl         2955 drivers/crypto/chelsio/chcr_algo.c 	phys_cpl = (struct cpl_rx_phys_dsgl *)((u8 *)(chcr_req + 1) + kctx_len);
phys_cpl         2956 drivers/crypto/chelsio/chcr_algo.c 	ivptr = (u8 *)(phys_cpl + 1) + dst_size;
phys_cpl         2961 drivers/crypto/chelsio/chcr_algo.c 	chcr_add_aead_dst_ent(req, phys_cpl, qid);
phys_cpl         2989 drivers/crypto/chelsio/chcr_algo.c 	struct cpl_rx_phys_dsgl *phys_cpl;
phys_cpl         3063 drivers/crypto/chelsio/chcr_algo.c 	phys_cpl = (struct cpl_rx_phys_dsgl *)((u8 *)(chcr_req + 1) + kctx_len);
phys_cpl         3064 drivers/crypto/chelsio/chcr_algo.c 	ivptr = (u8 *)(phys_cpl + 1) + dst_size;
phys_cpl         3078 drivers/crypto/chelsio/chcr_algo.c 	chcr_add_aead_dst_ent(req, phys_cpl, qid);
phys_cpl          321 drivers/crypto/chelsio/chcr_crypto.h 			   struct cpl_rx_phys_dsgl *phys_cpl,
phys_cpl          330 drivers/crypto/chelsio/chcr_crypto.h 			     struct cpl_rx_phys_dsgl *phys_cpl,