phyclk_khz 1149 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.bw.dcn.clk.phyclk_khz = v->phyclk_per_state[v->voltage_level]; phyclk_khz 1390 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc, DM_PP_CLOCK_TYPE_DISPLAYPHYCLK, clocks->phyclk_khz); phyclk_khz 112 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c if (should_set_clock(safe_to_lower, max_pix_clk, clk_mgr_base->clks.phyclk_khz)) { phyclk_khz 115 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c clk_mgr_base->clks.phyclk_khz = max_pix_clk; phyclk_khz 160 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c || new_clocks->phyclk_khz > clk_mgr_base->clks.phyclk_khz phyclk_khz 165 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) { phyclk_khz 166 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c clk_mgr_base->clks.phyclk_khz = new_clocks->phyclk_khz; phyclk_khz 222 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) { phyclk_khz 223 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c clk_mgr_base->clks.phyclk_khz = new_clocks->phyclk_khz; phyclk_khz 225 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c pp_smu->set_voltage_by_freq(&pp_smu->pp_smu, PP_SMU_NV_PHYCLK, clk_mgr_base->clks.phyclk_khz / 1000); phyclk_khz 329 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr->clks.phyclk_khz)) { phyclk_khz 330 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c clk_mgr->clks.phyclk_khz = new_clocks->phyclk_khz; phyclk_khz 78 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) { phyclk_khz 79 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c clk_mgr_base->clks.phyclk_khz = new_clocks->phyclk_khz; phyclk_khz 80 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c rn_vbios_smu_set_phyclk(clk_mgr, clk_mgr_base->clks.phyclk_khz); phyclk_khz 2525 drivers/gpu/drm/amd/display/dc/core/dc.c info->phyClock = (unsigned int)state->bw_ctx.bw.dcn.clk.phyclk_khz; phyclk_khz 264 drivers/gpu/drm/amd/display/dc/dc.h int phyclk_khz; phyclk_khz 777 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c if (should_set_clock(safe_to_lower, max_pix_clk, clk_mgr->clks.phyclk_khz)) { phyclk_khz 780 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c clk_mgr->clks.phyclk_khz = max_pix_clk; phyclk_khz 2696 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c context->bw_ctx.bw.dcn.clk.phyclk_khz = 0; phyclk_khz 2728 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c context->bw_ctx.bw.dcn.clk.phyclk_khz = 0;