phychan           249 drivers/dma/amba-pl08x.c 	struct pl08x_phy_chan *phychan;
phychan           392 drivers/dma/amba-pl08x.c 		struct pl08x_phy_chan *phychan, const u32 *lli, u32 ccfg)
phychan           398 drivers/dma/amba-pl08x.c 			phychan->id, lli[PL080_LLI_SRC], lli[PL080_LLI_DST],
phychan           405 drivers/dma/amba-pl08x.c 			phychan->id, lli[PL080_LLI_SRC], lli[PL080_LLI_DST],
phychan           408 drivers/dma/amba-pl08x.c 	writel_relaxed(lli[PL080_LLI_SRC], phychan->reg_src);
phychan           409 drivers/dma/amba-pl08x.c 	writel_relaxed(lli[PL080_LLI_DST], phychan->reg_dst);
phychan           410 drivers/dma/amba-pl08x.c 	writel_relaxed(lli[PL080_LLI_LLI], phychan->reg_lli);
phychan           418 drivers/dma/amba-pl08x.c 	if (phychan->ftdmac020) {
phychan           424 drivers/dma/amba-pl08x.c 			       phychan->base + FTDMAC020_CH_SIZE);
phychan           507 drivers/dma/amba-pl08x.c 		writel_relaxed(val, phychan->reg_control);
phychan           510 drivers/dma/amba-pl08x.c 		writel_relaxed(lli[PL080_LLI_CCTL], phychan->reg_control);
phychan           516 drivers/dma/amba-pl08x.c 				phychan->base + PL080S_CH_CONTROL2);
phychan           518 drivers/dma/amba-pl08x.c 	writel(ccfg, phychan->reg_config);
phychan           530 drivers/dma/amba-pl08x.c 	struct pl08x_phy_chan *phychan = plchan->phychan;
phychan           540 drivers/dma/amba-pl08x.c 	while (pl08x_phy_channel_busy(phychan))
phychan           543 drivers/dma/amba-pl08x.c 	pl08x_write_lli(pl08x, phychan, &txd->llis_va[0], txd->ccfg);
phychan           547 drivers/dma/amba-pl08x.c 	while (readl(pl08x->base + PL080_EN_CHAN) & BIT(phychan->id))
phychan           551 drivers/dma/amba-pl08x.c 	if (phychan->ftdmac020) {
phychan           552 drivers/dma/amba-pl08x.c 		val = readl(phychan->reg_config);
phychan           554 drivers/dma/amba-pl08x.c 			val = readl(phychan->reg_config);
phychan           556 drivers/dma/amba-pl08x.c 		val = readl(phychan->reg_control);
phychan           558 drivers/dma/amba-pl08x.c 			val = readl(phychan->reg_control);
phychan           561 drivers/dma/amba-pl08x.c 		       phychan->reg_control);
phychan           563 drivers/dma/amba-pl08x.c 		val = readl(phychan->reg_config);
phychan           566 drivers/dma/amba-pl08x.c 			val = readl(phychan->reg_config);
phychan           568 drivers/dma/amba-pl08x.c 		writel(val | PL080_CONFIG_ENABLE, phychan->reg_config);
phychan           764 drivers/dma/amba-pl08x.c 	ch = plchan->phychan;
phychan           875 drivers/dma/amba-pl08x.c 	plchan->phychan = ch;
phychan           894 drivers/dma/amba-pl08x.c 	plchan->phychan = ch;
phychan           934 drivers/dma/amba-pl08x.c 	pl08x_terminate_phy_chan(pl08x, plchan->phychan);
phychan           947 drivers/dma/amba-pl08x.c 			pl08x_phy_reassign_start(plchan->phychan, next);
phychan           955 drivers/dma/amba-pl08x.c 		pl08x_put_phy_channel(pl08x, plchan->phychan);
phychan           958 drivers/dma/amba-pl08x.c 	plchan->phychan = NULL;
phychan          1746 drivers/dma/amba-pl08x.c 		if (!plchan->phychan && plchan->state != PL08X_CHAN_WAITING)
phychan          2167 drivers/dma/amba-pl08x.c 	if (!plchan->phychan && !plchan->at) {
phychan          2174 drivers/dma/amba-pl08x.c 	if (plchan->phychan) {
phychan          2211 drivers/dma/amba-pl08x.c 	if (!plchan->phychan && !plchan->at) {
phychan          2216 drivers/dma/amba-pl08x.c 	pl08x_pause_phy_chan(plchan->phychan);
phychan          2234 drivers/dma/amba-pl08x.c 	if (!plchan->phychan && !plchan->at) {
phychan          2239 drivers/dma/amba-pl08x.c 	pl08x_resume_phy_chan(plchan->phychan);
phychan          2314 drivers/dma/amba-pl08x.c 			struct pl08x_phy_chan *phychan = &pl08x->phy_chans[i];
phychan          2315 drivers/dma/amba-pl08x.c 			struct pl08x_dma_chan *plchan = phychan->serving;