phyaddr 183 arch/sh/drivers/pci/pcie-sh7786.c unsigned long phyaddr; phyaddr 185 arch/sh/drivers/pci/pcie-sh7786.c phyaddr = (1 << BITS_CMD) + ((lane & 0xf) << BITS_LANE) + phyaddr 190 arch/sh/drivers/pci/pcie-sh7786.c pci_write_reg(chan, phyaddr, SH4A_PCIEPHYADRR); phyaddr 70 drivers/acpi/acpi_extlog.c #define ELOG_ENTRY_ADDR(phyaddr) \ phyaddr 71 drivers/acpi/acpi_extlog.c (phyaddr - elog_base + (u8 *)elog_addr) phyaddr 951 drivers/bus/mvebu-mbus.c int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr) phyaddr 967 drivers/bus/mvebu-mbus.c if (cs->base <= phyaddr && phyaddr 968 drivers/bus/mvebu-mbus.c phyaddr <= (cs->base + cs->size - 1)) { phyaddr 975 drivers/bus/mvebu-mbus.c pr_err("invalid dram address %pa\n", &phyaddr); phyaddr 980 drivers/bus/mvebu-mbus.c int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size, u8 *target, phyaddr 995 drivers/bus/mvebu-mbus.c if (wbase <= phyaddr && phyaddr <= wbase + *size) phyaddr 730 drivers/dma/ipu/ipu_idmac.c int buffer_n, dma_addr_t phyaddr) phyaddr 748 drivers/dma/ipu/ipu_idmac.c idmac_write_ipureg(&ipu_data, phyaddr, IPU_IMA_DATA); phyaddr 766 drivers/dma/ipu/ipu_idmac.c idmac_write_ipureg(&ipu_data, phyaddr, IPU_IMA_DATA); phyaddr 222 drivers/input/rmi4/rmi_f34.h struct physical_address phyaddr; phyaddr 283 drivers/input/rmi4/rmi_f34.h struct physical_address phyaddr; phyaddr 348 drivers/input/rmi4/rmi_f34v7.c struct physical_address *phyaddr) phyaddr 367 drivers/input/rmi4/rmi_f34v7.c phyaddr->ui_firmware = physical_address; phyaddr 374 drivers/input/rmi4/rmi_f34v7.c phyaddr->ui_config = physical_address; phyaddr 381 drivers/input/rmi4/rmi_f34v7.c phyaddr->dp_config = physical_address; phyaddr 394 drivers/input/rmi4/rmi_f34v7.c phyaddr->guest_code = physical_address; phyaddr 569 drivers/input/rmi4/rmi_f34v7.c &f34->v7.blkcount, &f34->v7.phyaddr); phyaddr 1012 drivers/input/rmi4/rmi_f34v7.c if (f34->v7.phyaddr.ui_firmware != f34->v7.img.phyaddr.ui_firmware) { phyaddr 1017 drivers/input/rmi4/rmi_f34v7.c if (f34->v7.phyaddr.ui_config != f34->v7.img.phyaddr.ui_config) { phyaddr 1023 drivers/input/rmi4/rmi_f34v7.c f34->v7.phyaddr.dp_config != f34->v7.img.phyaddr.dp_config) { phyaddr 1029 drivers/input/rmi4/rmi_f34v7.c f34->v7.phyaddr.guest_code != f34->v7.img.phyaddr.guest_code) { phyaddr 1181 drivers/input/rmi4/rmi_f34v7.c &f34->v7.img.blkcount, &f34->v7.img.phyaddr); phyaddr 1374 drivers/input/rmi4/rmi_f34v7.c memset(&f34->v7.phyaddr, 0x00, sizeof(f34->v7.phyaddr)); phyaddr 1404 drivers/net/ethernet/aeroflex/greth.c greth->phyaddr = (GRETH_REGLOAD(regs->mdio) >> 11) & 0x1F; phyaddr 134 drivers/net/ethernet/aeroflex/greth.h u8 phyaddr; phyaddr 35 drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c static u16 bcma_mdio_phy_read(struct bgmac *bgmac, u8 phyaddr, u8 reg) phyaddr 66 drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c tmp |= phyaddr; phyaddr 70 drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c tmp |= phyaddr << BGMAC_PA_ADDR_SHIFT; phyaddr 77 drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c phyaddr, reg); phyaddr 85 drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c static int bcma_mdio_phy_write(struct bgmac *bgmac, u8 phyaddr, u8 reg, phyaddr 105 drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c tmp |= phyaddr; phyaddr 114 drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c tmp |= phyaddr << BGMAC_PA_ADDR_SHIFT; phyaddr 122 drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c phyaddr, reg); phyaddr 181 drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c u8 phyaddr = bgmac->phyaddr; phyaddr 183 drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c if (phyaddr == BGMAC_PHY_NOREGS) phyaddr 186 drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c bcma_mdio_phy_write(bgmac, phyaddr, MII_BMCR, BMCR_RESET); phyaddr 188 drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c if (bcma_mdio_phy_read(bgmac, phyaddr, MII_BMCR) & BMCR_RESET) phyaddr 230 drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c mii_bus->phy_mask = ~(1 << bgmac->phyaddr); phyaddr 91 drivers/net/ethernet/broadcom/bgmac-bcma.c bgmac->phyaddr); phyaddr 167 drivers/net/ethernet/broadcom/bgmac-bcma.c bgmac->phyaddr = sprom->et0phyaddr; phyaddr 170 drivers/net/ethernet/broadcom/bgmac-bcma.c bgmac->phyaddr = sprom->et1phyaddr; phyaddr 173 drivers/net/ethernet/broadcom/bgmac-bcma.c bgmac->phyaddr = sprom->et2phyaddr; phyaddr 176 drivers/net/ethernet/broadcom/bgmac-bcma.c bgmac->phyaddr &= BGMAC_PHY_MASK; phyaddr 177 drivers/net/ethernet/broadcom/bgmac-bcma.c if (bgmac->phyaddr == BGMAC_PHY_MASK) { phyaddr 182 drivers/net/ethernet/broadcom/bgmac-bcma.c dev_info(bgmac->dev, "Found PHY addr: %d%s\n", bgmac->phyaddr, phyaddr 183 drivers/net/ethernet/broadcom/bgmac-bcma.c bgmac->phyaddr == BGMAC_PHY_NOREGS ? " (NOREGS)" : ""); phyaddr 196 drivers/net/ethernet/broadcom/bgmac-bcma.c phydev = mdiobus_get_phy(bgmac->mii_bus, bgmac->phyaddr); phyaddr 518 drivers/net/ethernet/broadcom/bgmac.h u8 phyaddr; phyaddr 309 drivers/net/ethernet/broadcom/sb1250-mac.c static int sbmac_mii_read(struct mii_bus *bus, int phyaddr, int regidx); phyaddr 310 drivers/net/ethernet/broadcom/sb1250-mac.c static int sbmac_mii_write(struct mii_bus *bus, int phyaddr, int regidx, phyaddr 421 drivers/net/ethernet/broadcom/sb1250-mac.c static int sbmac_mii_read(struct mii_bus *bus, int phyaddr, int regidx) phyaddr 445 drivers/net/ethernet/broadcom/sb1250-mac.c sbmac_mii_senddata(sbm_mdio, phyaddr, 5); phyaddr 514 drivers/net/ethernet/broadcom/sb1250-mac.c static int sbmac_mii_write(struct mii_bus *bus, int phyaddr, int regidx, phyaddr 525 drivers/net/ethernet/broadcom/sb1250-mac.c sbmac_mii_senddata(sbm_mdio, phyaddr, 5); phyaddr 970 drivers/net/ethernet/dec/tulip/de4x5.c static int mii_rd(u_char phyreg, u_char phyaddr, u_long ioaddr); phyaddr 971 drivers/net/ethernet/dec/tulip/de4x5.c static void mii_wr(int data, u_char phyreg, u_char phyaddr, u_long ioaddr); phyaddr 979 drivers/net/ethernet/dec/tulip/de4x5.c static int mii_get_oui(u_char phyaddr, u_long ioaddr); phyaddr 4808 drivers/net/ethernet/dec/tulip/de4x5.c mii_rd(u_char phyreg, u_char phyaddr, u_long ioaddr) phyaddr 4813 drivers/net/ethernet/dec/tulip/de4x5.c mii_address(phyaddr, ioaddr); /* PHY address to be accessed */ phyaddr 4821 drivers/net/ethernet/dec/tulip/de4x5.c mii_wr(int data, u_char phyreg, u_char phyaddr, u_long ioaddr) phyaddr 4826 drivers/net/ethernet/dec/tulip/de4x5.c mii_address(phyaddr, ioaddr); /* PHY address to be accessed */ phyaddr 4922 drivers/net/ethernet/dec/tulip/de4x5.c mii_get_oui(u_char phyaddr, u_long ioaddr) phyaddr 4933 drivers/net/ethernet/dec/tulip/de4x5.c r2 = mii_rd(MII_ID0, phyaddr, ioaddr); phyaddr 4934 drivers/net/ethernet/dec/tulip/de4x5.c r3 = mii_rd(MII_ID1, phyaddr, ioaddr); phyaddr 1529 drivers/net/ethernet/intel/fm10k/fm10k_pf.c u32 phyaddr = (u32)(dma_mask >> 32); phyaddr 1531 drivers/net/ethernet/intel/fm10k/fm10k_pf.c fm10k_write_reg(hw, FM10K_PHYADDR, phyaddr); phyaddr 768 drivers/net/ethernet/nvidia/forcedeth.c int phyaddr; phyaddr 1186 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, MII_BMCR, miicontrol)) phyaddr 1195 drivers/net/ethernet/nvidia/forcedeth.c miicontrol = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); phyaddr 1220 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, ri[i].reg, ri[i].init)) phyaddr 1242 drivers/net/ethernet/nvidia/forcedeth.c reg = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, MII_READ); phyaddr 1244 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, reg)) phyaddr 1246 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, phyaddr 1249 drivers/net/ethernet/nvidia/forcedeth.c reg = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG7, MII_READ); phyaddr 1252 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG7, reg)) phyaddr 1255 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, phyaddr 1267 drivers/net/ethernet/nvidia/forcedeth.c phy_reserved = mii_rw(dev, np->phyaddr, phyaddr 1270 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, phyaddr 1283 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, phyaddr 1286 drivers/net/ethernet/nvidia/forcedeth.c phy_reserved = mii_rw(dev, np->phyaddr, phyaddr 1290 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, phyaddr 1293 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, phyaddr 1307 drivers/net/ethernet/nvidia/forcedeth.c phy_reserved = mii_rw(dev, np->phyaddr, MII_RESV1, MII_READ); phyaddr 1310 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, MII_RESV1, phy_reserved)) phyaddr 1312 drivers/net/ethernet/nvidia/forcedeth.c phy_reserved = mii_rw(dev, np->phyaddr, MII_NCONFIG, MII_READ); phyaddr 1314 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, MII_NCONFIG, phy_reserved)) phyaddr 1317 drivers/net/ethernet/nvidia/forcedeth.c phy_reserved = mii_rw(dev, np->phyaddr, MII_SREVISION, MII_READ); phyaddr 1319 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, MII_SREVISION, phy_reserved)) phyaddr 1329 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, phyaddr 1332 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, phyaddr 1335 drivers/net/ethernet/nvidia/forcedeth.c phy_reserved = mii_rw(dev, np->phyaddr, phyaddr 1337 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, phy_reserved)) phyaddr 1339 drivers/net/ethernet/nvidia/forcedeth.c phy_reserved = mii_rw(dev, np->phyaddr, phyaddr 1343 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, phy_reserved)) phyaddr 1345 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, phyaddr 1348 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, phyaddr 1351 drivers/net/ethernet/nvidia/forcedeth.c phy_reserved = mii_rw(dev, np->phyaddr, phyaddr 1355 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, phy_reserved)) phyaddr 1357 drivers/net/ethernet/nvidia/forcedeth.c phy_reserved = mii_rw(dev, np->phyaddr, phyaddr 1359 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, phy_reserved)) phyaddr 1361 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, phyaddr 1364 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, phyaddr 1367 drivers/net/ethernet/nvidia/forcedeth.c phy_reserved = mii_rw(dev, np->phyaddr, phyaddr 1369 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, phy_reserved)) phyaddr 1371 drivers/net/ethernet/nvidia/forcedeth.c phy_reserved = mii_rw(dev, np->phyaddr, phyaddr 1375 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, phy_reserved)) phyaddr 1377 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, phyaddr 1380 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, phyaddr 1396 drivers/net/ethernet/nvidia/forcedeth.c reg = mii_rw(dev, np->phyaddr, MII_NCONFIG, MII_READ); phyaddr 1398 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, MII_NCONFIG, reg)) { phyaddr 1429 drivers/net/ethernet/nvidia/forcedeth.c reg = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); phyaddr 1433 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg)) { phyaddr 1443 drivers/net/ethernet/nvidia/forcedeth.c mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); phyaddr 1446 drivers/net/ethernet/nvidia/forcedeth.c mii_control_1000 = mii_rw(dev, np->phyaddr, phyaddr 1454 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, MII_CTRL1000, mii_control_1000)) { phyaddr 1462 drivers/net/ethernet/nvidia/forcedeth.c mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); phyaddr 1470 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) { phyaddr 1519 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg); phyaddr 1522 drivers/net/ethernet/nvidia/forcedeth.c mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); phyaddr 1526 drivers/net/ethernet/nvidia/forcedeth.c if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) phyaddr 3280 drivers/net/ethernet/nvidia/forcedeth.c mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); phyaddr 3364 drivers/net/ethernet/nvidia/forcedeth.c bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); phyaddr 3377 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); phyaddr 3378 drivers/net/ethernet/nvidia/forcedeth.c mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); phyaddr 3413 drivers/net/ethernet/nvidia/forcedeth.c adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); phyaddr 3414 drivers/net/ethernet/nvidia/forcedeth.c lpa = mii_rw(dev, np->phyaddr, MII_LPA, MII_READ); phyaddr 3418 drivers/net/ethernet/nvidia/forcedeth.c control_1000 = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); phyaddr 3419 drivers/net/ethernet/nvidia/forcedeth.c status_1000 = mii_rw(dev, np->phyaddr, MII_STAT1000, MII_READ); phyaddr 3486 drivers/net/ethernet/nvidia/forcedeth.c phy_exp = mii_rw(dev, np->phyaddr, MII_EXPANSION, MII_READ) & EXPANSION_NWAY; /* autoneg capable */ phyaddr 4344 drivers/net/ethernet/nvidia/forcedeth.c adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); phyaddr 4354 drivers/net/ethernet/nvidia/forcedeth.c adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); phyaddr 4366 drivers/net/ethernet/nvidia/forcedeth.c cmd->base.phy_address = np->phyaddr; phyaddr 4390 drivers/net/ethernet/nvidia/forcedeth.c if (cmd->base.phy_address != np->phyaddr) { phyaddr 4449 drivers/net/ethernet/nvidia/forcedeth.c adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); phyaddr 4463 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv); phyaddr 4466 drivers/net/ethernet/nvidia/forcedeth.c adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); phyaddr 4470 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, MII_CTRL1000, adv); phyaddr 4475 drivers/net/ethernet/nvidia/forcedeth.c bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); phyaddr 4486 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); phyaddr 4493 drivers/net/ethernet/nvidia/forcedeth.c adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); phyaddr 4512 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv); phyaddr 4516 drivers/net/ethernet/nvidia/forcedeth.c adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ); phyaddr 4518 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, MII_CTRL1000, adv); phyaddr 4521 drivers/net/ethernet/nvidia/forcedeth.c bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); phyaddr 4534 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); phyaddr 4595 drivers/net/ethernet/nvidia/forcedeth.c bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); phyaddr 4605 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); phyaddr 4801 drivers/net/ethernet/nvidia/forcedeth.c adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ); phyaddr 4807 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv); phyaddr 4811 drivers/net/ethernet/nvidia/forcedeth.c bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); phyaddr 4813 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, MII_BMCR, bmcr); phyaddr 4842 drivers/net/ethernet/nvidia/forcedeth.c miicontrol = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); phyaddr 4852 drivers/net/ethernet/nvidia/forcedeth.c err = mii_rw(dev, np->phyaddr, MII_BMCR, miicontrol); phyaddr 4996 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); phyaddr 4997 drivers/net/ethernet/nvidia/forcedeth.c mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); phyaddr 5426 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, MII_BMCR, phyaddr 5427 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ) & ~BMCR_PDOWN); phyaddr 5512 drivers/net/ethernet/nvidia/forcedeth.c writel((np->phyaddr << NVREG_ADAPTCTL_PHYSHIFT)|NVREG_ADAPTCTL_PHYVALID|NVREG_ADAPTCTL_RUNNING, phyaddr 5625 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, MII_BMCR, phyaddr 5626 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ)|BMCR_PDOWN); phyaddr 6011 drivers/net/ethernet/nvidia/forcedeth.c int phyaddr = i & 0x1F; phyaddr 6014 drivers/net/ethernet/nvidia/forcedeth.c id1 = mii_rw(dev, phyaddr, MII_PHYSID1, MII_READ); phyaddr 6019 drivers/net/ethernet/nvidia/forcedeth.c id2 = mii_rw(dev, phyaddr, MII_PHYSID2, MII_READ); phyaddr 6027 drivers/net/ethernet/nvidia/forcedeth.c np->phyaddr = phyaddr; phyaddr 6035 drivers/net/ethernet/nvidia/forcedeth.c np->phy_rev = mii_rw(dev, phyaddr, MII_RESV1, MII_READ) & PHY_REV_MASK; phyaddr 6049 drivers/net/ethernet/nvidia/forcedeth.c u32 mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ); phyaddr 6079 drivers/net/ethernet/nvidia/forcedeth.c dev->name, np->phy_oui, np->phyaddr, dev->dev_addr); phyaddr 6128 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3); phyaddr 6129 drivers/net/ethernet/nvidia/forcedeth.c phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, MII_READ); phyaddr 6132 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, phy_reserved); phyaddr 6133 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1); phyaddr 6136 drivers/net/ethernet/nvidia/forcedeth.c mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); phyaddr 6138 drivers/net/ethernet/nvidia/forcedeth.c mii_rw(dev, np->phyaddr, MII_BMCR, mii_control); phyaddr 6858 drivers/net/ethernet/realtek/r8169_main.c static int r8169_mdio_read_reg(struct mii_bus *mii_bus, int phyaddr, int phyreg) phyaddr 6862 drivers/net/ethernet/realtek/r8169_main.c if (phyaddr > 0) phyaddr 6868 drivers/net/ethernet/realtek/r8169_main.c static int r8169_mdio_write_reg(struct mii_bus *mii_bus, int phyaddr, phyaddr 6873 drivers/net/ethernet/realtek/r8169_main.c if (phyaddr > 0) phyaddr 52 drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c static void sxgbe_mdio_c45(struct sxgbe_priv_data *sp, u32 cmd, int phyaddr, phyaddr 59 drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c reg |= (phyaddr << 16) | (phyreg & 0xffff); phyaddr 65 drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c static void sxgbe_mdio_c22(struct sxgbe_priv_data *sp, u32 cmd, int phyaddr, phyaddr 70 drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c writel(1 << phyaddr, sp->ioaddr + SXGBE_MDIO_CLAUSE22_PORT_REG); phyaddr 73 drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c reg = (phyaddr << 16) | (phyreg & 0x1f); phyaddr 79 drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c static int sxgbe_mdio_access(struct sxgbe_priv_data *sp, u32 cmd, int phyaddr, phyaddr 90 drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c sxgbe_mdio_c45(sp, cmd, phyaddr, phyreg, phydata); phyaddr 93 drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c if (phyaddr >= 4) phyaddr 96 drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c sxgbe_mdio_c22(sp, cmd, phyaddr, phyreg, phydata); phyaddr 109 drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c static int sxgbe_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg) phyaddr 115 drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c rc = sxgbe_mdio_access(priv, SXGBE_SMA_READ_CMD, phyaddr, phyreg, 0); phyaddr 130 drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c static int sxgbe_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg, phyaddr 136 drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c return sxgbe_mdio_access(priv, SXGBE_SMA_WRITE_CMD, phyaddr, phyreg, phyaddr 626 drivers/net/ethernet/smsc/smc911x.c static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg) phyaddr 631 drivers/net/ethernet/smsc/smc911x.c SMC_GET_MII(lp, phyreg, phyaddr, phydata); phyaddr 634 drivers/net/ethernet/smsc/smc911x.c __func__, phyaddr, phyreg, phydata); phyaddr 642 drivers/net/ethernet/smsc/smc911x.c static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg, phyaddr 648 drivers/net/ethernet/smsc/smc911x.c __func__, phyaddr, phyreg, phydata); phyaddr 650 drivers/net/ethernet/smsc/smc911x.c SMC_SET_MII(lp, phyreg, phyaddr, phydata); phyaddr 660 drivers/net/ethernet/smsc/smc911x.c int phyaddr; phyaddr 695 drivers/net/ethernet/smsc/smc911x.c for (phyaddr = 1; phyaddr < 32; ++phyaddr) { phyaddr 698 drivers/net/ethernet/smsc/smc911x.c SMC_GET_PHY_ID1(lp, phyaddr & 31, id1); phyaddr 699 drivers/net/ethernet/smsc/smc911x.c SMC_GET_PHY_ID2(lp, phyaddr & 31, id2); phyaddr 706 drivers/net/ethernet/smsc/smc911x.c lp->mii.phy_id = phyaddr & 31; phyaddr 711 drivers/net/ethernet/smsc/smc911x.c if (phyaddr < 32) phyaddr 736 drivers/net/ethernet/smsc/smc911x.c int phyaddr = lp->mii.phy_id; phyaddr 742 drivers/net/ethernet/smsc/smc911x.c SMC_GET_PHY_BMCR(lp, phyaddr, bmcr); phyaddr 744 drivers/net/ethernet/smsc/smc911x.c SMC_SET_PHY_BMCR(lp, phyaddr, bmcr); phyaddr 758 drivers/net/ethernet/smsc/smc911x.c SMC_SET_PHY_BMCR(lp, phyaddr, bmcr); phyaddr 762 drivers/net/ethernet/smsc/smc911x.c SMC_SET_PHY_BMCR(lp, phyaddr, bmcr); phyaddr 842 drivers/net/ethernet/smsc/smc911x.c int phyaddr = lp->mii.phy_id; phyaddr 849 drivers/net/ethernet/smsc/smc911x.c SMC_GET_PHY_BMCR(lp, phyaddr, bmcr); phyaddr 860 drivers/net/ethernet/smsc/smc911x.c SMC_SET_PHY_BMCR(lp, phyaddr, bmcr); phyaddr 879 drivers/net/ethernet/smsc/smc911x.c int phyaddr = lp->mii.phy_id; phyaddr 893 drivers/net/ethernet/smsc/smc911x.c if (smc911x_phy_reset(dev, phyaddr)) { phyaddr 903 drivers/net/ethernet/smsc/smc911x.c SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ | phyaddr 914 drivers/net/ethernet/smsc/smc911x.c SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps); phyaddr 943 drivers/net/ethernet/smsc/smc911x.c SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps); phyaddr 952 drivers/net/ethernet/smsc/smc911x.c SMC_GET_PHY_MII_ADV(lp, phyaddr, status); phyaddr 958 drivers/net/ethernet/smsc/smc911x.c SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART); phyaddr 975 drivers/net/ethernet/smsc/smc911x.c int phyaddr = lp->mii.phy_id; phyaddr 985 drivers/net/ethernet/smsc/smc911x.c SMC_GET_PHY_INT_SRC(lp, phyaddr,status); phyaddr 807 drivers/net/ethernet/smsc/smc91x.c static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg) phyaddr 819 drivers/net/ethernet/smsc/smc91x.c smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14); phyaddr 828 drivers/net/ethernet/smsc/smc91x.c __func__, phyaddr, phyreg, phydata); phyaddr 837 drivers/net/ethernet/smsc/smc91x.c static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg, phyaddr 849 drivers/net/ethernet/smsc/smc91x.c smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32); phyaddr 855 drivers/net/ethernet/smsc/smc91x.c __func__, phyaddr, phyreg, phydata); phyaddr 866 drivers/net/ethernet/smsc/smc91x.c int phyaddr; phyaddr 876 drivers/net/ethernet/smsc/smc91x.c for (phyaddr = 1; phyaddr < 33; ++phyaddr) { phyaddr 880 drivers/net/ethernet/smsc/smc91x.c id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1); phyaddr 881 drivers/net/ethernet/smsc/smc91x.c id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2); phyaddr 890 drivers/net/ethernet/smsc/smc91x.c lp->mii.phy_id = phyaddr & 31; phyaddr 904 drivers/net/ethernet/smsc/smc91x.c int phyaddr = lp->mii.phy_id; phyaddr 910 drivers/net/ethernet/smsc/smc91x.c cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG); phyaddr 912 drivers/net/ethernet/smsc/smc91x.c smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1); phyaddr 927 drivers/net/ethernet/smsc/smc91x.c smc_phy_write(dev, phyaddr, MII_BMCR, bmcr); phyaddr 1036 drivers/net/ethernet/smsc/smc91x.c int phyaddr = lp->mii.phy_id; phyaddr 1051 drivers/net/ethernet/smsc/smc91x.c if (smc_phy_reset(dev, phyaddr)) { phyaddr 1060 drivers/net/ethernet/smsc/smc91x.c smc_phy_write(dev, phyaddr, PHY_MASK_REG, phyaddr 1076 drivers/net/ethernet/smsc/smc91x.c my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR); phyaddr 1105 drivers/net/ethernet/smsc/smc91x.c smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps); phyaddr 1113 drivers/net/ethernet/smsc/smc91x.c status = smc_phy_read(dev, phyaddr, MII_ADVERTISE); phyaddr 1119 drivers/net/ethernet/smsc/smc91x.c smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART); phyaddr 1137 drivers/net/ethernet/smsc/smc91x.c int phyaddr = lp->mii.phy_id; phyaddr 1149 drivers/net/ethernet/smsc/smc91x.c phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG); phyaddr 553 drivers/net/ethernet/smsc/smsc911x.c static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx) phyaddr 570 drivers/net/ethernet/smsc/smsc911x.c addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6); phyaddr 589 drivers/net/ethernet/smsc/smsc911x.c static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx, phyaddr 610 drivers/net/ethernet/smsc/smsc911x.c addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) | phyaddr 103 drivers/net/ethernet/smsc/smsc9420.c static int smsc9420_mii_read(struct mii_bus *bus, int phyaddr, int regidx) phyaddr 119 drivers/net/ethernet/smsc/smsc9420.c addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) | phyaddr 140 drivers/net/ethernet/smsc/smsc9420.c static int smsc9420_mii_write(struct mii_bus *bus, int phyaddr, int regidx, phyaddr 160 drivers/net/ethernet/smsc/smsc9420.c addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) | phyaddr 61 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c static int phyaddr = -1; phyaddr 62 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c module_param(phyaddr, int, 0444); phyaddr 63 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c MODULE_PARM_DESC(phyaddr, "Physical device address"); phyaddr 4514 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c if ((phyaddr >= 0) && (phyaddr <= 31)) phyaddr 4515 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c priv->plat->phy_addr = phyaddr; phyaddr 4914 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c if (kstrtoint(opt + 8, 0, &phyaddr)) phyaddr 45 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c static int stmmac_xgmac2_c22_format(struct stmmac_priv *priv, int phyaddr, phyaddr 52 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c if (phyaddr > MII_XGMAC_MAX_C22ADDR) phyaddr 62 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c tmp |= BIT(phyaddr); phyaddr 65 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c *hw_addr = (phyaddr << 16) | (phyreg & 0x1f); phyaddr 69 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c static int stmmac_xgmac2_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg) phyaddr 81 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c ret = stmmac_xgmac2_c22_format(priv, phyaddr, phyreg, &addr); phyaddr 108 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c static int stmmac_xgmac2_mdio_write(struct mii_bus *bus, int phyaddr, phyaddr 121 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c ret = stmmac_xgmac2_c22_format(priv, phyaddr, phyreg, &addr); phyaddr 155 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg) phyaddr 165 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c value |= (phyaddr << priv->hw->mii.addr_shift) phyaddr 209 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg, phyaddr 220 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c value |= (phyaddr << priv->hw->mii.addr_shift) phyaddr 258 drivers/net/ethernet/xircom/xirc2ps_cs.c static unsigned mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg); phyaddr 259 drivers/net/ethernet/xircom/xirc2ps_cs.c static void mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg, phyaddr 420 drivers/net/ethernet/xircom/xirc2ps_cs.c mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg) phyaddr 429 drivers/net/ethernet/xircom/xirc2ps_cs.c mii_wbits(ioaddr, phyaddr, 5); /* PHY address to be accessed */ phyaddr 442 drivers/net/ethernet/xircom/xirc2ps_cs.c mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg, unsigned data, phyaddr 451 drivers/net/ethernet/xircom/xirc2ps_cs.c mii_wbits(ioaddr, phyaddr, 5); /* PHY address to be accessed */ phyaddr 518 drivers/pci/controller/pcie-rcar.c u32 phyaddr; phyaddr 520 drivers/pci/controller/pcie-rcar.c phyaddr = WRITE_CMD | phyaddr 527 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, phyaddr, H1_PCIEPHYADRR); phyaddr 1688 drivers/scsi/lpfc/lpfc_mbox.c dma_addr_t phyaddr, uint32_t length) phyaddr 1694 drivers/scsi/lpfc/lpfc_mbox.c nembed_sge->sge[sgentry].pa_lo = putPaddrLow(phyaddr); phyaddr 1695 drivers/scsi/lpfc/lpfc_mbox.c nembed_sge->sge[sgentry].pa_hi = putPaddrHigh(phyaddr); phyaddr 1732 drivers/scsi/lpfc/lpfc_mbox.c dma_addr_t phyaddr; phyaddr 1753 drivers/scsi/lpfc/lpfc_mbox.c phyaddr = getPaddr(sge.pa_hi, sge.pa_lo); phyaddr 1755 drivers/scsi/lpfc/lpfc_mbox.c mbox->sge_array->addr[sgentry], phyaddr); phyaddr 1787 drivers/scsi/lpfc/lpfc_mbox.c dma_addr_t phyaddr; phyaddr 1831 drivers/scsi/lpfc/lpfc_mbox.c SLI4_PAGE_SIZE, &phyaddr, phyaddr 1842 drivers/scsi/lpfc/lpfc_mbox.c lpfc_sli4_mbx_sge_set(mbox, pagen, phyaddr, phyaddr 1846 drivers/scsi/lpfc/lpfc_mbox.c lpfc_sli4_mbx_sge_set(mbox, pagen, phyaddr, phyaddr 189 drivers/usb/gadget/udc/mv_u3d.h u32 phyaddr; /* PHY address register */ phyaddr 60 include/linux/mbus.h int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size, u8 *target, phyaddr 71 include/linux/mbus.h static inline int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size, phyaddr 89 include/linux/mbus.h int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr); phyaddr 102 include/linux/mbus.h static inline int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target,