phy_regmap 88 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c struct regmap *phy_regmap; phy_regmap 103 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_PLL_A_CTRL1, 0x120e); phy_regmap 106 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_PLL_A_CTRL2, 0x39d7); phy_regmap 107 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_PLL_A_CTRL3, 0x0900); phy_regmap 110 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_RX1_EI, 0x0004); phy_regmap 111 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_RX1_A_CTRL, 0x6803); phy_regmap 113 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_update_bits(priv->phy_regmap, PCIE_PHY_TX1_CTRL1, phy_regmap 118 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_TX1_A_CTRL2, 0x0706); phy_regmap 121 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_TX1_CTRL3, 0x1fff); phy_regmap 124 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_TX1_A_CTRL1, 0x0810); phy_regmap 127 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_update_bits(priv->phy_regmap, PCIE_PHY_TX2_A_CTRL2, 0x7f00, phy_regmap 131 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_TX1_CTRL2, 0x2e00); phy_regmap 134 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_TX2_CTRL2, 0x3096); phy_regmap 135 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_TX2_A_CTRL2, 0x4707); phy_regmap 138 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_RX1_CDR, 0x0235); phy_regmap 145 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_update_bits(priv->phy_regmap, PCIE_PHY_PLL_CTRL3, phy_regmap 148 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_update_bits(priv->phy_regmap, PCIE_PHY_PLL_CTRL3, phy_regmap 151 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_update_bits(priv->phy_regmap, PCIE_PHY_PLL_CTRL2, phy_regmap 155 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_update_bits(priv->phy_regmap, PCIE_PHY_PLL_CTRL2, phy_regmap 159 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_update_bits(priv->phy_regmap, PCIE_PHY_PLL_A_CTRL3, phy_regmap 163 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_update_bits(priv->phy_regmap, PCIE_PHY_PLL_A_CTRL2, phy_regmap 167 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_PLL_CTRL1, 0x38e4); phy_regmap 169 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_update_bits(priv->phy_regmap, PCIE_PHY_PLL_CTRL2, phy_regmap 175 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_PLL_CTRL7, 0x0002); phy_regmap 176 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_PLL_CTRL6, 0x3a04); phy_regmap 177 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_PLL_CTRL5, 0xfae3); phy_regmap 178 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_PLL_CTRL4, 0x1b72); phy_regmap 187 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c ret = regmap_read_poll_timeout(priv->phy_regmap, PCIE_PHY_PLL_STATUS, phy_regmap 220 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_update_bits(priv->phy_regmap, slices[i].reg, phy_regmap 226 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_update_bits(priv->phy_regmap, slices[i].reg, phy_regmap 232 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_TX2_MOD1, 0x1ffe); phy_regmap 233 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_TX2_MOD2, 0xfffe); phy_regmap 234 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_TX2_MOD3, 0x0601); phy_regmap 236 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_TX2_MOD3, 0x0001); phy_regmap 239 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_TX1_MOD1, 0x1ffe); phy_regmap 240 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_TX1_MOD2, 0xfffe); phy_regmap 241 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_TX1_MOD3, 0x0601); phy_regmap 243 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c regmap_write(priv->phy_regmap, PCIE_PHY_TX1_MOD3, 0x0001); phy_regmap 418 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c priv->phy_regmap = devm_regmap_init_mmio(dev, base, ®map_config); phy_regmap 419 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c if (IS_ERR(priv->phy_regmap)) phy_regmap 420 drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c return PTR_ERR(priv->phy_regmap);