phy_cmn_mmio 93 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c void __iomem *phy_cmn_mmio; phy_cmn_mmio 368 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c u32 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0); phy_cmn_mmio 371 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0, phy_cmn_mmio 378 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c u32 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0); phy_cmn_mmio 380 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0, phy_cmn_mmio 390 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CLK_CFG1); phy_cmn_mmio 391 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CLK_CFG1, phy_cmn_mmio 399 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CLK_CFG1); phy_cmn_mmio 400 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CLK_CFG1, phy_cmn_mmio 421 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c pll_write(pll_10nm->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_PLL_CNTRL, phy_cmn_mmio 443 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c pll_write(pll_10nm->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_RBUF_CTRL, phy_cmn_mmio 446 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c pll_write(pll_10nm->slave->phy_cmn_mmio + phy_cmn_mmio 455 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_RBUF_CTRL, 0); phy_cmn_mmio 470 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c pll_write(pll_10nm->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_PLL_CNTRL, 0); phy_cmn_mmio 537 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c void __iomem *phy_base = pll_10nm->phy_cmn_mmio; phy_cmn_mmio 560 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c void __iomem *phy_base = pll_10nm->phy_cmn_mmio; phy_cmn_mmio 585 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c void __iomem *base = pll_10nm->phy_cmn_mmio; phy_cmn_mmio 704 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c pll_10nm->phy_cmn_mmio + phy_cmn_mmio 762 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c }, 4, 0, pll_10nm->phy_cmn_mmio + phy_cmn_mmio 777 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c 0, pll_10nm->phy_cmn_mmio + phy_cmn_mmio 837 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c pll_10nm->phy_cmn_mmio = msm_ioremap(pdev, "dsi_phy", "DSI_PHY"); phy_cmn_mmio 838 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c if (IS_ERR_OR_NULL(pll_10nm->phy_cmn_mmio)) { phy_cmn_mmio 123 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c void __iomem *phy_cmn_mmio; phy_cmn_mmio 491 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c void __iomem *cmn_base = pll_14nm->phy_cmn_mmio; phy_cmn_mmio 511 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c void __iomem *cmn_base = pll->phy_cmn_mmio; phy_cmn_mmio 682 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c void __iomem *base = pll_14nm->phy_cmn_mmio; phy_cmn_mmio 715 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c void __iomem *base = pll_14nm->phy_cmn_mmio; phy_cmn_mmio 742 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c void __iomem *slave_base = pll_14nm_slave->phy_cmn_mmio; phy_cmn_mmio 766 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c void __iomem *cmn_base = pll_14nm->phy_cmn_mmio; phy_cmn_mmio 788 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c void __iomem *cmn_base = pll_14nm->phy_cmn_mmio; phy_cmn_mmio 799 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c void __iomem *cmn_base = pll_14nm->phy_cmn_mmio; phy_cmn_mmio 817 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c void __iomem *cmn_base = pll_14nm->phy_cmn_mmio; phy_cmn_mmio 839 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c void __iomem *slave_base = pll_14nm_slave->phy_cmn_mmio; phy_cmn_mmio 1060 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c pll_14nm->phy_cmn_mmio = msm_ioremap(pdev, "dsi_phy", "DSI_PHY"); phy_cmn_mmio 1061 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c if (IS_ERR_OR_NULL(pll_14nm->phy_cmn_mmio)) {