phy_clock        1589 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	max_sustainable_clocks->phy_clock = 0xFFFFFFFF;
phy_clock        1618 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 				&(max_sustainable_clocks->phy_clock),
phy_clock         145 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	PP_Clock phy_clock;
phy_clock          79 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h 	uint32_t phy_clock;
phy_clock        1003 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 	max_sustainable_clocks->phy_clock = 0xFFFFFFFF;
phy_clock        1047 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 							  &(max_sustainable_clocks->phy_clock),
phy_clock        1614 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 			(unsigned int) sustainable_clocks->phy_clock * 1000;
phy_clock         831 drivers/gpu/drm/vc4/vc4_dsi.c 	unsigned long phy_clock;
phy_clock         850 drivers/gpu/drm/vc4/vc4_dsi.c 	phy_clock = (pixel_clock_hz + 1000) * dsi->divider;
phy_clock         851 drivers/gpu/drm/vc4/vc4_dsi.c 	ret = clk_set_rate(dsi->pll_phy_clock, phy_clock);
phy_clock         854 drivers/gpu/drm/vc4/vc4_dsi.c 			"Failed to set phy clock to %ld: %d\n", phy_clock, ret);
phy_clock         933 drivers/gpu/drm/vc4/vc4_dsi.c 	dsip_clock = phy_clock / 8;