phy_aux_cntl       55 drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h 	.phy_aux_cntl = REG(PHY_AUX_CNTL), \
phy_aux_cntl       97 drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h 	.phy_aux_cntl = REG(PHY_AUX_CNTL), \
phy_aux_cntl      126 drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h 	uint32_t phy_aux_cntl;
phy_aux_cntl      158 drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c 		if (ddc->regs->phy_aux_cntl != 0) {
phy_aux_cntl      159 drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c 				REG_UPDATE(phy_aux_cntl, AUX_PAD_RXSEL, 1);