phase_shedding_limits_table  399 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries =
phase_shedding_limits_table  403 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			if (!adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries) {
phase_shedding_limits_table  410 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].sclk =
phase_shedding_limits_table  412 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].mclk =
phase_shedding_limits_table  414 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].voltage =
phase_shedding_limits_table  419 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.phase_shedding_limits_table.count =
phase_shedding_limits_table  728 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 	kfree(dyn_state->phase_shedding_limits_table.entries);
phase_shedding_limits_table  227 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h 	struct amdgpu_phase_shedding_limits_table phase_shedding_limits_table;
phase_shedding_limits_table 4556 drivers/gpu/drm/amd/amdgpu/si_dpm.c 							      &adev->pm.dpm.dyn_state.phase_shedding_limits_table)) {
phase_shedding_limits_table 4908 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						 &adev->pm.dpm.dyn_state.phase_shedding_limits_table,
phase_shedding_limits_table 4992 drivers/gpu/drm/amd/amdgpu/si_dpm.c 							 &adev->pm.dpm.dyn_state.phase_shedding_limits_table,
phase_shedding_limits_table 5020 drivers/gpu/drm/amd/amdgpu/si_dpm.c 							 &adev->pm.dpm.dyn_state.phase_shedding_limits_table,
phase_shedding_limits_table 5532 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						       &adev->pm.dpm.dyn_state.phase_shedding_limits_table,
phase_shedding_limits_table 2911 drivers/gpu/drm/radeon/ci_dpm.c 						      &rdev->pm.dpm.dyn_state.phase_shedding_limits_table,
phase_shedding_limits_table 3240 drivers/gpu/drm/radeon/ci_dpm.c 						      &rdev->pm.dpm.dyn_state.phase_shedding_limits_table,
phase_shedding_limits_table 5083 drivers/gpu/drm/radeon/ci_dpm.c 							       &rdev->pm.dpm.dyn_state.phase_shedding_limits_table);
phase_shedding_limits_table  992 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries =
phase_shedding_limits_table  996 drivers/gpu/drm/radeon/r600_dpm.c 			if (!rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries) {
phase_shedding_limits_table 1003 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].sclk =
phase_shedding_limits_table 1005 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].mclk =
phase_shedding_limits_table 1007 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].voltage =
phase_shedding_limits_table 1012 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.phase_shedding_limits_table.count =
phase_shedding_limits_table 1307 drivers/gpu/drm/radeon/r600_dpm.c 	kfree(dyn_state->phase_shedding_limits_table.entries);
phase_shedding_limits_table 1488 drivers/gpu/drm/radeon/radeon.h 	struct radeon_phase_shedding_limits_table phase_shedding_limits_table;
phase_shedding_limits_table 4094 drivers/gpu/drm/radeon/si_dpm.c 							      &rdev->pm.dpm.dyn_state.phase_shedding_limits_table)) {
phase_shedding_limits_table 4444 drivers/gpu/drm/radeon/si_dpm.c 						 &rdev->pm.dpm.dyn_state.phase_shedding_limits_table,
phase_shedding_limits_table 4530 drivers/gpu/drm/radeon/si_dpm.c 							 &rdev->pm.dpm.dyn_state.phase_shedding_limits_table,
phase_shedding_limits_table 4557 drivers/gpu/drm/radeon/si_dpm.c 							 &rdev->pm.dpm.dyn_state.phase_shedding_limits_table,
phase_shedding_limits_table 5070 drivers/gpu/drm/radeon/si_dpm.c 						       &rdev->pm.dpm.dyn_state.phase_shedding_limits_table,