pgshift            28 drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h 		unsigned long pgshift;
pgshift           138 drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c 			tdev->iommu.pgshift = PAGE_SHIFT;
pgshift           140 drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c 			tdev->iommu.pgshift = fls(pgsize_bitmap & ~PAGE_MASK);
pgshift           141 drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c 			if (tdev->iommu.pgshift == 0) {
pgshift           145 drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c 			tdev->iommu.pgshift -= 1;
pgshift           154 drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c 				   tdev->iommu.pgshift, 1);
pgshift           169 drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c 	tdev->iommu.pgshift = 0;
pgshift           592 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c 		imem->iommu_pgshift = tdev->iommu.pgshift;
pgshift          1763 drivers/iommu/arm-smmu.c 	smmu->pgshift = (id & ID1_PAGESIZE) ? 16 : 12;
pgshift          1767 drivers/iommu/arm-smmu.c 	if (smmu->numpage != 2 * size << smmu->pgshift)
pgshift          1770 drivers/iommu/arm-smmu.c 			2 * size << smmu->pgshift, smmu->numpage);
pgshift           230 drivers/iommu/arm-smmu.h 	unsigned int			pgshift;
pgshift           342 drivers/iommu/arm-smmu.h 	return smmu->base + (n << smmu->pgshift);
pgshift           325 drivers/mtd/nand/raw/nandsim.c 		uint pgshift;       /* bits number in page size */
pgshift           646 drivers/mtd/nand/raw/nandsim.c 	ns->geom.pgshift  = chip->page_shift;
pgshift           734 drivers/mtd/nand/raw/nandsim.c 	printk("bits in page size: %u\n",       ns->geom.pgshift);
pgshift          1619 drivers/mtd/nand/raw/nandsim.c 		erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);