pfctx              70 drivers/net/ethernet/mellanox/mlx4/en_main.c MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]."
pfctx             166 drivers/net/ethernet/mellanox/mlx4/en_main.c 		params->prof[i].rx_pause = !(pfcrx || pfctx);
pfctx             168 drivers/net/ethernet/mellanox/mlx4/en_main.c 		params->prof[i].tx_pause = !(pfcrx || pfctx);
pfctx             169 drivers/net/ethernet/mellanox/mlx4/en_main.c 		params->prof[i].tx_ppp = pfctx;
pfctx             365 drivers/net/ethernet/mellanox/mlx4/en_main.c 	if (pfctx > MAX_PFC_TX) {
pfctx             367 drivers/net/ethernet/mellanox/mlx4/en_main.c 			pfctx, MAX_PFC_TX);
pfctx             368 drivers/net/ethernet/mellanox/mlx4/en_main.c 		pfctx = 0;
pfctx             800 drivers/net/ethernet/mellanox/mlx4/mlx4.h 	u8 pfctx;
pfctx            1609 drivers/net/ethernet/mellanox/mlx4/port.c 			  u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx)
pfctx            1622 drivers/net/ethernet/mellanox/mlx4/port.c 	context->pptx = (pptx * (!pfctx)) << 7;
pfctx            1623 drivers/net/ethernet/mellanox/mlx4/port.c 	context->pfctx = pfctx;
pfctx             517 drivers/net/ethernet/mellanox/mlx5/core/port.c 	MLX5_SET(pfcc_reg, in, pfctx, pfc_en_tx);
pfctx             537 drivers/net/ethernet/mellanox/mlx5/core/port.c 		*pfc_en_tx = MLX5_GET(pfcc_reg, out, pfctx);
pfctx            4530 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM32(reg, pfcc, pfctx, 0x08, 16, 8);
pfctx            1395 include/linux/mlx4/device.h 			  u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx);
pfctx            8672 include/linux/mlx5/mlx5_ifc.h 	u8         pfctx[0x8];