pfctl             173 arch/mips/cavium-octeon/executive/cvmx-l2c.c 		union cvmx_l2c_pfctl pfctl;
pfctl             175 arch/mips/cavium-octeon/executive/cvmx-l2c.c 		pfctl.u64 = cvmx_read_csr(CVMX_L2C_PFCTL);
pfctl             179 arch/mips/cavium-octeon/executive/cvmx-l2c.c 			pfctl.s.cnt0sel = event;
pfctl             180 arch/mips/cavium-octeon/executive/cvmx-l2c.c 			pfctl.s.cnt0ena = 1;
pfctl             181 arch/mips/cavium-octeon/executive/cvmx-l2c.c 			pfctl.s.cnt0rdclr = clear_on_read;
pfctl             184 arch/mips/cavium-octeon/executive/cvmx-l2c.c 			pfctl.s.cnt1sel = event;
pfctl             185 arch/mips/cavium-octeon/executive/cvmx-l2c.c 			pfctl.s.cnt1ena = 1;
pfctl             186 arch/mips/cavium-octeon/executive/cvmx-l2c.c 			pfctl.s.cnt1rdclr = clear_on_read;
pfctl             189 arch/mips/cavium-octeon/executive/cvmx-l2c.c 			pfctl.s.cnt2sel = event;
pfctl             190 arch/mips/cavium-octeon/executive/cvmx-l2c.c 			pfctl.s.cnt2ena = 1;
pfctl             191 arch/mips/cavium-octeon/executive/cvmx-l2c.c 			pfctl.s.cnt2rdclr = clear_on_read;
pfctl             195 arch/mips/cavium-octeon/executive/cvmx-l2c.c 			pfctl.s.cnt3sel = event;
pfctl             196 arch/mips/cavium-octeon/executive/cvmx-l2c.c 			pfctl.s.cnt3ena = 1;
pfctl             197 arch/mips/cavium-octeon/executive/cvmx-l2c.c 			pfctl.s.cnt3rdclr = clear_on_read;
pfctl             201 arch/mips/cavium-octeon/executive/cvmx-l2c.c 		cvmx_write_csr(CVMX_L2C_PFCTL, pfctl.u64);