pescx_ctl_status  587 arch/mips/pci/pcie-octeon.c 	union cvmx_pescx_ctl_status pescx_ctl_status;
pescx_ctl_status  594 arch/mips/pci/pcie-octeon.c 	pescx_ctl_status.u64 = cvmx_read_csr(CVMX_PESCX_CTL_STATUS(pcie_port));
pescx_ctl_status  595 arch/mips/pci/pcie-octeon.c 	if (pescx_ctl_status.s.qlm_cfg == 0)
pescx_ctl_status  617 arch/mips/pci/pcie-octeon.c 		pescx_ctl_status.s.lane_swp = 1;
pescx_ctl_status  618 arch/mips/pci/pcie-octeon.c 		cvmx_write_csr(CVMX_PESCX_CTL_STATUS(pcie_port), pescx_ctl_status.u64);
pescx_ctl_status  622 arch/mips/pci/pcie-octeon.c 	pescx_ctl_status.u64 = cvmx_read_csr(CVMX_PESCX_CTL_STATUS(pcie_port));
pescx_ctl_status  623 arch/mips/pci/pcie-octeon.c 	pescx_ctl_status.s.lnk_enb = 1;
pescx_ctl_status  624 arch/mips/pci/pcie-octeon.c 	cvmx_write_csr(CVMX_PESCX_CTL_STATUS(pcie_port), pescx_ctl_status.u64);