period_cycles      67 drivers/pwm/pwm-ep93xx.c 	unsigned long period_cycles;
period_cycles      85 drivers/pwm/pwm-ep93xx.c 	period_cycles = c;
period_cycles      87 drivers/pwm/pwm-ep93xx.c 	c = period_cycles;
period_cycles      92 drivers/pwm/pwm-ep93xx.c 	if (period_cycles < 0x10000 && duty_cycles < 0x10000) {
period_cycles      96 drivers/pwm/pwm-ep93xx.c 		if (period_cycles > term) {
period_cycles      97 drivers/pwm/pwm-ep93xx.c 			writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
period_cycles     101 drivers/pwm/pwm-ep93xx.c 			writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
period_cycles     214 drivers/pwm/pwm-imx27.c 	unsigned long period_cycles, duty_cycles, prescale;
period_cycles     228 drivers/pwm/pwm-imx27.c 		period_cycles = c;
period_cycles     230 drivers/pwm/pwm-imx27.c 		prescale = period_cycles / 0x10000 + 1;
period_cycles     232 drivers/pwm/pwm-imx27.c 		period_cycles /= prescale;
period_cycles     233 drivers/pwm/pwm-imx27.c 		c = (unsigned long long)period_cycles * state->duty_cycle;
period_cycles     241 drivers/pwm/pwm-imx27.c 		if (period_cycles > 2)
period_cycles     242 drivers/pwm/pwm-imx27.c 			period_cycles -= 2;
period_cycles     244 drivers/pwm/pwm-imx27.c 			period_cycles = 0;
period_cycles     262 drivers/pwm/pwm-imx27.c 		writel(period_cycles, imx->mmio_base + MX3_PWMPR);
period_cycles      34 drivers/pwm/pwm-lpc32xx.c 	int period_cycles, duty_cycles;
period_cycles      39 drivers/pwm/pwm-lpc32xx.c 	period_cycles = div64_u64(c * period_ns,
period_cycles      41 drivers/pwm/pwm-lpc32xx.c 	if (!period_cycles || period_cycles > 256)
period_cycles      43 drivers/pwm/pwm-lpc32xx.c 	if (period_cycles == 256)
period_cycles      44 drivers/pwm/pwm-lpc32xx.c 		period_cycles = 0;
period_cycles      56 drivers/pwm/pwm-lpc32xx.c 	val |= (period_cycles << 8) | duty_cycles;
period_cycles      49 drivers/pwm/pwm-mxs.c 	unsigned int period_cycles, duty_cycles;
period_cycles      65 drivers/pwm/pwm-mxs.c 	period_cycles = c;
period_cycles      82 drivers/pwm/pwm-mxs.c 	writel(PERIOD_PERIOD(period_cycles) | PERIOD_ACTIVE_HIGH |
period_cycles      97 drivers/pwm/pwm-omap-dmtimer.c 	u32 period_cycles, duty_cycles;
period_cycles     144 drivers/pwm/pwm-omap-dmtimer.c 	period_cycles = pwm_omap_dmtimer_get_clock_cycles(clk_rate, period_ns);
period_cycles     147 drivers/pwm/pwm-omap-dmtimer.c 	if (period_cycles < 2) {
period_cycles     160 drivers/pwm/pwm-omap-dmtimer.c 	} else if (duty_cycles >= period_cycles) {
period_cycles     165 drivers/pwm/pwm-omap-dmtimer.c 		duty_cycles = period_cycles - 1;
period_cycles     171 drivers/pwm/pwm-omap-dmtimer.c 		DIV_ROUND_CLOSEST_ULL((u64)NSEC_PER_SEC * period_cycles,
period_cycles     174 drivers/pwm/pwm-omap-dmtimer.c 	load_value = (DM_TIMER_MAX - period_cycles) + 1;
period_cycles      41 drivers/pwm/pwm-puv3.c 	unsigned long period_cycles, prescale, pv, dc;
period_cycles      48 drivers/pwm/pwm-puv3.c 	period_cycles = c;
period_cycles      50 drivers/pwm/pwm-puv3.c 	if (period_cycles < 1)
period_cycles      51 drivers/pwm/pwm-puv3.c 		period_cycles = 1;
period_cycles      53 drivers/pwm/pwm-puv3.c 	prescale = (period_cycles - 1) / 1024;
period_cycles      54 drivers/pwm/pwm-puv3.c 	pv = period_cycles / (prescale + 1) - 1;
period_cycles      65 drivers/pwm/pwm-pxa.c 	unsigned long period_cycles, prescale, pv, dc;
period_cycles      74 drivers/pwm/pwm-pxa.c 	period_cycles = c;
period_cycles      76 drivers/pwm/pwm-pxa.c 	if (period_cycles < 1)
period_cycles      77 drivers/pwm/pwm-pxa.c 		period_cycles = 1;
period_cycles      78 drivers/pwm/pwm-pxa.c 	prescale = (period_cycles - 1) / 1024;
period_cycles      79 drivers/pwm/pwm-pxa.c 	pv = period_cycles / (prescale + 1) - 1;
period_cycles      54 drivers/pwm/pwm-tiecap.c 	u32 period_cycles, duty_cycles;
period_cycles      64 drivers/pwm/pwm-tiecap.c 	period_cycles = (u32)c;
period_cycles      66 drivers/pwm/pwm-tiecap.c 	if (period_cycles < 1) {
period_cycles      67 drivers/pwm/pwm-tiecap.c 		period_cycles = 1;
period_cycles      88 drivers/pwm/pwm-tiecap.c 		writel(period_cycles, pc->mmio_base + CAP1);
period_cycles      96 drivers/pwm/pwm-tiecap.c 		writel(period_cycles, pc->mmio_base + CAP3);
period_cycles     111 drivers/pwm/pwm-tiehrpwm.c 	unsigned long period_cycles[NUM_PWM_CHANNEL];
period_cycles     222 drivers/pwm/pwm-tiehrpwm.c 	u32 period_cycles, duty_cycles;
period_cycles     233 drivers/pwm/pwm-tiehrpwm.c 	period_cycles = (unsigned long)c;
period_cycles     235 drivers/pwm/pwm-tiehrpwm.c 	if (period_cycles < 1) {
period_cycles     236 drivers/pwm/pwm-tiehrpwm.c 		period_cycles = 1;
period_cycles     250 drivers/pwm/pwm-tiehrpwm.c 		if (pc->period_cycles[i] &&
period_cycles     251 drivers/pwm/pwm-tiehrpwm.c 				(pc->period_cycles[i] != period_cycles)) {
period_cycles     266 drivers/pwm/pwm-tiehrpwm.c 	pc->period_cycles[pwm->hwpwm] = period_cycles;
period_cycles     269 drivers/pwm/pwm-tiehrpwm.c 	if (set_prescale_div(period_cycles/PERIOD_MAX, &ps_divval,
period_cycles     281 drivers/pwm/pwm-tiehrpwm.c 	period_cycles = period_cycles / ps_divval;
period_cycles     287 drivers/pwm/pwm-tiehrpwm.c 	ehrpwm_write(pc->mmio_base, TBPRD, period_cycles);
period_cycles     401 drivers/pwm/pwm-tiehrpwm.c 	pc->period_cycles[pwm->hwpwm] = 0;
period_cycles      77 drivers/pwm/pwm-vt8500.c 	unsigned long period_cycles, prescale, pv, dc;
period_cycles      90 drivers/pwm/pwm-vt8500.c 	period_cycles = c;
period_cycles      92 drivers/pwm/pwm-vt8500.c 	if (period_cycles < 1)
period_cycles      93 drivers/pwm/pwm-vt8500.c 		period_cycles = 1;
period_cycles      94 drivers/pwm/pwm-vt8500.c 	prescale = (period_cycles - 1) / 4096;
period_cycles      95 drivers/pwm/pwm-vt8500.c 	pv = period_cycles / (prescale + 1) - 1;
period_cycles     101 drivers/pwm/pwm-zx.c 	unsigned int period_cycles, duty_cycles;
period_cycles     124 drivers/pwm/pwm-zx.c 	period_cycles = c;
period_cycles     139 drivers/pwm/pwm-zx.c 	zx_pwm_writel(zpc, pwm->hwpwm, ZX_PWM_PERIOD, period_cycles);