percent_of_ideal_drambw_received_after_urg_latency  212 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->return_bw_todcn_per_state =dcn_bw_min2(v->return_bus_width * v->dcfclk_per_state[i], v->fabric_and_dram_bandwidth_per_state[i] * 1000.0 * v->percent_of_ideal_drambw_received_after_urg_latency / 100.0);
percent_of_ideal_drambw_received_after_urg_latency  231 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if ((v->total_read_bandwidth_consumed_gbyte_per_second * 1000.0 <= v->return_bw_per_state[i]) && (v->total_bandwidth_consumed_gbyte_per_second * 1000.0 <= v->fabric_and_dram_bandwidth_per_state[i] * 1000.0 * v->percent_of_ideal_drambw_received_after_urg_latency / 100.0)) {
percent_of_ideal_drambw_received_after_urg_latency 1226 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	v->return_bandwidth_to_dcn =dcn_bw_min2(v->return_bus_width * v->dcfclk, v->fabric_and_dram_bandwidth * 1000.0 * v->percent_of_ideal_drambw_received_after_urg_latency / 100.0);
percent_of_ideal_drambw_received_after_urg_latency   70 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		.percent_of_ideal_drambw_received_after_urg_latency = 80, /*%*/
percent_of_ideal_drambw_received_after_urg_latency  650 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	if ((int)(dc->dcn_soc->percent_of_ideal_drambw_received_after_urg_latency * 1000)
percent_of_ideal_drambw_received_after_urg_latency  654 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		dc->dcn_soc->percent_of_ideal_drambw_received_after_urg_latency =
percent_of_ideal_drambw_received_after_urg_latency  751 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	v->percent_of_ideal_drambw_received_after_urg_latency =
percent_of_ideal_drambw_received_after_urg_latency  752 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			dc->dcn_soc->percent_of_ideal_drambw_received_after_urg_latency;
percent_of_ideal_drambw_received_after_urg_latency 1605 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			dc->dcn_soc->percent_of_ideal_drambw_received_after_urg_latency,
percent_of_ideal_drambw_received_after_urg_latency 1709 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			dc->dcn_soc->percent_of_ideal_drambw_received_after_urg_latency;
percent_of_ideal_drambw_received_after_urg_latency  114 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h 	float percent_of_ideal_drambw_received_after_urg_latency;
percent_of_ideal_drambw_received_after_urg_latency  550 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h 	float percent_of_ideal_drambw_received_after_urg_latency; /*%*/