pe_dma_cfg         57 drivers/crypto/amcc/crypto4xx_core.c 	union ce_pe_dma_cfg pe_dma_cfg;
pe_dma_cfg         62 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.w = 0;
pe_dma_cfg         63 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.bo_sgpd_en = 1;
pe_dma_cfg         64 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.bo_data_en = 0;
pe_dma_cfg         65 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.bo_sa_en = 1;
pe_dma_cfg         66 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.bo_pd_en = 1;
pe_dma_cfg         67 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.dynamic_sa_en = 1;
pe_dma_cfg         68 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.reset_sg = 1;
pe_dma_cfg         69 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.reset_pdr = 1;
pe_dma_cfg         70 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.reset_pe = 1;
pe_dma_cfg         71 drivers/crypto/amcc/crypto4xx_core.c 	writel(pe_dma_cfg.w, dev->ce_base + CRYPTO4XX_PE_DMA_CFG);
pe_dma_cfg         73 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.pe_mode = 0;
pe_dma_cfg         74 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.reset_sg = 0;
pe_dma_cfg         75 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.reset_pdr = 0;
pe_dma_cfg         76 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.reset_pe = 0;
pe_dma_cfg         77 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.bo_td_en = 0;
pe_dma_cfg         78 drivers/crypto/amcc/crypto4xx_core.c 	writel(pe_dma_cfg.w, dev->ce_base + CRYPTO4XX_PE_DMA_CFG);
pe_dma_cfg        114 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.pe_mode = 1;
pe_dma_cfg        115 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.reset_sg = 0;
pe_dma_cfg        116 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.reset_pdr = 0;
pe_dma_cfg        117 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.reset_pe = 0;
pe_dma_cfg        118 drivers/crypto/amcc/crypto4xx_core.c 	pe_dma_cfg.bf.bo_td_en = 0;
pe_dma_cfg        119 drivers/crypto/amcc/crypto4xx_core.c 	writel(pe_dma_cfg.w, dev->ce_base + CRYPTO4XX_PE_DMA_CFG);