pdma               89 arch/arm/mach-dove/common.c 	struct clk *nand, *camera, *i2s0, *i2s1, *crypto, *ac97, *pdma;
pdma              107 arch/arm/mach-dove/common.c 	pdma = dove_register_gate("pdma", "tclk", CLOCK_GATING_BIT_PDMA);
pdma              132 arch/arm/mach-dove/common.c 	orion_clkdev_add(NULL, "dove-pdma", pdma);
pdma              215 drivers/dma/xgene-dma.c 	struct xgene_dma *pdma;
pdma              271 drivers/dma/xgene-dma.c 	struct xgene_dma *pdma;
pdma              341 drivers/dma/xgene-dma.c static bool is_pq_enabled(struct xgene_dma *pdma)
pdma              345 drivers/dma/xgene-dma.c 	val = ioread32(pdma->csr_efuse + XGENE_SOC_JTAG1_SHADOW);
pdma             1011 drivers/dma/xgene-dma.c 	struct xgene_dma *pdma = (struct xgene_dma *)id;
pdma             1015 drivers/dma/xgene-dma.c 	val = ioread32(pdma->csr_dma + XGENE_DMA_INT);
pdma             1018 drivers/dma/xgene-dma.c 	iowrite32(val, pdma->csr_dma + XGENE_DMA_INT);
pdma             1023 drivers/dma/xgene-dma.c 		dev_err(pdma->dev,
pdma             1033 drivers/dma/xgene-dma.c 	iowrite32(ring->num, ring->pdma->csr_ring + XGENE_DMA_RING_STATE);
pdma             1036 drivers/dma/xgene-dma.c 		iowrite32(ring->state[i], ring->pdma->csr_ring +
pdma             1080 drivers/dma/xgene-dma.c 		  ring->pdma->csr_ring + XGENE_DMA_RING_ID);
pdma             1084 drivers/dma/xgene-dma.c 		  ring->pdma->csr_ring + XGENE_DMA_RING_ID_BUF);
pdma             1098 drivers/dma/xgene-dma.c 	val = ioread32(ring->pdma->csr_ring + XGENE_DMA_RING_NE_INT_MODE);
pdma             1100 drivers/dma/xgene-dma.c 	iowrite32(val, ring->pdma->csr_ring + XGENE_DMA_RING_NE_INT_MODE);
pdma             1109 drivers/dma/xgene-dma.c 		val = ioread32(ring->pdma->csr_ring +
pdma             1112 drivers/dma/xgene-dma.c 		iowrite32(val, ring->pdma->csr_ring +
pdma             1118 drivers/dma/xgene-dma.c 	iowrite32(ring_id, ring->pdma->csr_ring + XGENE_DMA_RING_ID);
pdma             1120 drivers/dma/xgene-dma.c 	iowrite32(0, ring->pdma->csr_ring + XGENE_DMA_RING_ID_BUF);
pdma             1126 drivers/dma/xgene-dma.c 	ring->cmd_base = ring->pdma->csr_ring_cmd +
pdma             1169 drivers/dma/xgene-dma.c 		dma_free_coherent(ring->pdma->dev, ring->size,
pdma             1188 drivers/dma/xgene-dma.c 	ring->pdma = chan->pdma;
pdma             1190 drivers/dma/xgene-dma.c 	ring->num = chan->pdma->ring_num++;
pdma             1254 drivers/dma/xgene-dma.c static int xgene_dma_init_rings(struct xgene_dma *pdma)
pdma             1259 drivers/dma/xgene-dma.c 		ret = xgene_dma_create_chan_rings(&pdma->chan[i]);
pdma             1262 drivers/dma/xgene-dma.c 				xgene_dma_delete_chan_rings(&pdma->chan[j]);
pdma             1270 drivers/dma/xgene-dma.c static void xgene_dma_enable(struct xgene_dma *pdma)
pdma             1275 drivers/dma/xgene-dma.c 	val = ioread32(pdma->csr_dma + XGENE_DMA_GCR);
pdma             1278 drivers/dma/xgene-dma.c 	iowrite32(val, pdma->csr_dma + XGENE_DMA_GCR);
pdma             1281 drivers/dma/xgene-dma.c static void xgene_dma_disable(struct xgene_dma *pdma)
pdma             1285 drivers/dma/xgene-dma.c 	val = ioread32(pdma->csr_dma + XGENE_DMA_GCR);
pdma             1287 drivers/dma/xgene-dma.c 	iowrite32(val, pdma->csr_dma + XGENE_DMA_GCR);
pdma             1290 drivers/dma/xgene-dma.c static void xgene_dma_mask_interrupts(struct xgene_dma *pdma)
pdma             1297 drivers/dma/xgene-dma.c 		  pdma->csr_dma + XGENE_DMA_RING_INT0_MASK);
pdma             1299 drivers/dma/xgene-dma.c 		  pdma->csr_dma + XGENE_DMA_RING_INT1_MASK);
pdma             1301 drivers/dma/xgene-dma.c 		  pdma->csr_dma + XGENE_DMA_RING_INT2_MASK);
pdma             1303 drivers/dma/xgene-dma.c 		  pdma->csr_dma + XGENE_DMA_RING_INT3_MASK);
pdma             1305 drivers/dma/xgene-dma.c 		  pdma->csr_dma + XGENE_DMA_RING_INT4_MASK);
pdma             1308 drivers/dma/xgene-dma.c 	iowrite32(XGENE_DMA_INT_ALL_MASK, pdma->csr_dma + XGENE_DMA_INT_MASK);
pdma             1311 drivers/dma/xgene-dma.c static void xgene_dma_unmask_interrupts(struct xgene_dma *pdma)
pdma             1318 drivers/dma/xgene-dma.c 		  pdma->csr_dma + XGENE_DMA_RING_INT0_MASK);
pdma             1320 drivers/dma/xgene-dma.c 		  pdma->csr_dma + XGENE_DMA_RING_INT1_MASK);
pdma             1322 drivers/dma/xgene-dma.c 		  pdma->csr_dma + XGENE_DMA_RING_INT2_MASK);
pdma             1324 drivers/dma/xgene-dma.c 		  pdma->csr_dma + XGENE_DMA_RING_INT3_MASK);
pdma             1326 drivers/dma/xgene-dma.c 		  pdma->csr_dma + XGENE_DMA_RING_INT4_MASK);
pdma             1330 drivers/dma/xgene-dma.c 		  pdma->csr_dma + XGENE_DMA_INT_MASK);
pdma             1333 drivers/dma/xgene-dma.c static void xgene_dma_init_hw(struct xgene_dma *pdma)
pdma             1339 drivers/dma/xgene-dma.c 		  pdma->csr_dma + XGENE_DMA_CFG_RING_WQ_ASSOC);
pdma             1342 drivers/dma/xgene-dma.c 	if (is_pq_enabled(pdma))
pdma             1344 drivers/dma/xgene-dma.c 			  pdma->csr_dma + XGENE_DMA_RAID6_CONT);
pdma             1346 drivers/dma/xgene-dma.c 		dev_info(pdma->dev, "PQ is disabled in HW\n");
pdma             1348 drivers/dma/xgene-dma.c 	xgene_dma_enable(pdma);
pdma             1349 drivers/dma/xgene-dma.c 	xgene_dma_unmask_interrupts(pdma);
pdma             1352 drivers/dma/xgene-dma.c 	val = ioread32(pdma->csr_dma + XGENE_DMA_IPBRR);
pdma             1355 drivers/dma/xgene-dma.c 	dev_info(pdma->dev,
pdma             1361 drivers/dma/xgene-dma.c static int xgene_dma_init_ring_mngr(struct xgene_dma *pdma)
pdma             1363 drivers/dma/xgene-dma.c 	if (ioread32(pdma->csr_ring + XGENE_DMA_RING_CLKEN) &&
pdma             1364 drivers/dma/xgene-dma.c 	    (!ioread32(pdma->csr_ring + XGENE_DMA_RING_SRST)))
pdma             1367 drivers/dma/xgene-dma.c 	iowrite32(0x3, pdma->csr_ring + XGENE_DMA_RING_CLKEN);
pdma             1368 drivers/dma/xgene-dma.c 	iowrite32(0x0, pdma->csr_ring + XGENE_DMA_RING_SRST);
pdma             1371 drivers/dma/xgene-dma.c 	iowrite32(0x0, pdma->csr_ring + XGENE_DMA_RING_MEM_RAM_SHUTDOWN);
pdma             1374 drivers/dma/xgene-dma.c 	ioread32(pdma->csr_ring + XGENE_DMA_RING_MEM_RAM_SHUTDOWN);
pdma             1379 drivers/dma/xgene-dma.c 	if (ioread32(pdma->csr_ring + XGENE_DMA_RING_BLK_MEM_RDY)
pdma             1381 drivers/dma/xgene-dma.c 		dev_err(pdma->dev,
pdma             1388 drivers/dma/xgene-dma.c 		  pdma->csr_ring + XGENE_DMA_RING_THRESLD0_SET1);
pdma             1390 drivers/dma/xgene-dma.c 		  pdma->csr_ring + XGENE_DMA_RING_THRESLD1_SET1);
pdma             1392 drivers/dma/xgene-dma.c 		  pdma->csr_ring + XGENE_DMA_RING_HYSTERESIS);
pdma             1396 drivers/dma/xgene-dma.c 		  pdma->csr_ring + XGENE_DMA_RING_CONFIG);
pdma             1401 drivers/dma/xgene-dma.c static int xgene_dma_init_mem(struct xgene_dma *pdma)
pdma             1405 drivers/dma/xgene-dma.c 	ret = xgene_dma_init_ring_mngr(pdma);
pdma             1410 drivers/dma/xgene-dma.c 	iowrite32(0x0, pdma->csr_dma + XGENE_DMA_MEM_RAM_SHUTDOWN);
pdma             1413 drivers/dma/xgene-dma.c 	ioread32(pdma->csr_dma + XGENE_DMA_MEM_RAM_SHUTDOWN);
pdma             1418 drivers/dma/xgene-dma.c 	if (ioread32(pdma->csr_dma + XGENE_DMA_BLK_MEM_RDY)
pdma             1420 drivers/dma/xgene-dma.c 		dev_err(pdma->dev,
pdma             1428 drivers/dma/xgene-dma.c static int xgene_dma_request_irqs(struct xgene_dma *pdma)
pdma             1434 drivers/dma/xgene-dma.c 	ret = devm_request_irq(pdma->dev, pdma->err_irq, xgene_dma_err_isr,
pdma             1435 drivers/dma/xgene-dma.c 			       0, "dma_error", pdma);
pdma             1437 drivers/dma/xgene-dma.c 		dev_err(pdma->dev,
pdma             1438 drivers/dma/xgene-dma.c 			"Failed to register error IRQ %d\n", pdma->err_irq);
pdma             1444 drivers/dma/xgene-dma.c 		chan = &pdma->chan[i];
pdma             1452 drivers/dma/xgene-dma.c 			devm_free_irq(pdma->dev, pdma->err_irq, pdma);
pdma             1455 drivers/dma/xgene-dma.c 				chan = &pdma->chan[i];
pdma             1467 drivers/dma/xgene-dma.c static void xgene_dma_free_irqs(struct xgene_dma *pdma)
pdma             1473 drivers/dma/xgene-dma.c 	devm_free_irq(pdma->dev, pdma->err_irq, pdma);
pdma             1476 drivers/dma/xgene-dma.c 		chan = &pdma->chan[i];
pdma             1500 drivers/dma/xgene-dma.c 	    is_pq_enabled(chan->pdma)) {
pdma             1504 drivers/dma/xgene-dma.c 		   !is_pq_enabled(chan->pdma)) {
pdma             1528 drivers/dma/xgene-dma.c static int xgene_dma_async_register(struct xgene_dma *pdma, int id)
pdma             1530 drivers/dma/xgene-dma.c 	struct xgene_dma_chan *chan = &pdma->chan[id];
pdma             1531 drivers/dma/xgene-dma.c 	struct dma_device *dma_dev = &pdma->dma_dev[id];
pdma             1564 drivers/dma/xgene-dma.c 	dev_info(pdma->dev,
pdma             1572 drivers/dma/xgene-dma.c static int xgene_dma_init_async(struct xgene_dma *pdma)
pdma             1577 drivers/dma/xgene-dma.c 		ret = xgene_dma_async_register(pdma, i);
pdma             1580 drivers/dma/xgene-dma.c 				dma_async_device_unregister(&pdma->dma_dev[j]);
pdma             1581 drivers/dma/xgene-dma.c 				tasklet_kill(&pdma->chan[j].tasklet);
pdma             1591 drivers/dma/xgene-dma.c static void xgene_dma_async_unregister(struct xgene_dma *pdma)
pdma             1596 drivers/dma/xgene-dma.c 		dma_async_device_unregister(&pdma->dma_dev[i]);
pdma             1599 drivers/dma/xgene-dma.c static void xgene_dma_init_channels(struct xgene_dma *pdma)
pdma             1604 drivers/dma/xgene-dma.c 	pdma->ring_num = XGENE_DMA_RING_NUM;
pdma             1607 drivers/dma/xgene-dma.c 		chan = &pdma->chan[i];
pdma             1608 drivers/dma/xgene-dma.c 		chan->dev = pdma->dev;
pdma             1609 drivers/dma/xgene-dma.c 		chan->pdma = pdma;
pdma             1616 drivers/dma/xgene-dma.c 				   struct xgene_dma *pdma)
pdma             1628 drivers/dma/xgene-dma.c 	pdma->csr_dma = devm_ioremap(&pdev->dev, res->start,
pdma             1630 drivers/dma/xgene-dma.c 	if (!pdma->csr_dma) {
pdma             1642 drivers/dma/xgene-dma.c 	pdma->csr_ring =  devm_ioremap(&pdev->dev, res->start,
pdma             1644 drivers/dma/xgene-dma.c 	if (!pdma->csr_ring) {
pdma             1656 drivers/dma/xgene-dma.c 	pdma->csr_ring_cmd = devm_ioremap(&pdev->dev, res->start,
pdma             1658 drivers/dma/xgene-dma.c 	if (!pdma->csr_ring_cmd) {
pdma             1663 drivers/dma/xgene-dma.c 	pdma->csr_ring_cmd += XGENE_DMA_RING_CMD_SM_OFFSET;
pdma             1672 drivers/dma/xgene-dma.c 	pdma->csr_efuse = devm_ioremap(&pdev->dev, res->start,
pdma             1674 drivers/dma/xgene-dma.c 	if (!pdma->csr_efuse) {
pdma             1684 drivers/dma/xgene-dma.c 	pdma->err_irq = irq;
pdma             1692 drivers/dma/xgene-dma.c 		pdma->chan[i - 1].rx_irq = irq;
pdma             1700 drivers/dma/xgene-dma.c 	struct xgene_dma *pdma;
pdma             1703 drivers/dma/xgene-dma.c 	pdma = devm_kzalloc(&pdev->dev, sizeof(*pdma), GFP_KERNEL);
pdma             1704 drivers/dma/xgene-dma.c 	if (!pdma)
pdma             1707 drivers/dma/xgene-dma.c 	pdma->dev = &pdev->dev;
pdma             1708 drivers/dma/xgene-dma.c 	platform_set_drvdata(pdev, pdma);
pdma             1710 drivers/dma/xgene-dma.c 	ret = xgene_dma_get_resources(pdev, pdma);
pdma             1714 drivers/dma/xgene-dma.c 	pdma->clk = devm_clk_get(&pdev->dev, NULL);
pdma             1715 drivers/dma/xgene-dma.c 	if (IS_ERR(pdma->clk) && !ACPI_COMPANION(&pdev->dev)) {
pdma             1717 drivers/dma/xgene-dma.c 		return PTR_ERR(pdma->clk);
pdma             1721 drivers/dma/xgene-dma.c 	if (!IS_ERR(pdma->clk)) {
pdma             1722 drivers/dma/xgene-dma.c 		ret = clk_prepare_enable(pdma->clk);
pdma             1730 drivers/dma/xgene-dma.c 	ret = xgene_dma_init_mem(pdma);
pdma             1741 drivers/dma/xgene-dma.c 	xgene_dma_init_channels(pdma);
pdma             1744 drivers/dma/xgene-dma.c 	ret = xgene_dma_init_rings(pdma);
pdma             1748 drivers/dma/xgene-dma.c 	ret = xgene_dma_request_irqs(pdma);
pdma             1753 drivers/dma/xgene-dma.c 	xgene_dma_init_hw(pdma);
pdma             1756 drivers/dma/xgene-dma.c 	ret = xgene_dma_init_async(pdma);
pdma             1763 drivers/dma/xgene-dma.c 	xgene_dma_free_irqs(pdma);
pdma             1767 drivers/dma/xgene-dma.c 		xgene_dma_delete_chan_rings(&pdma->chan[i]);
pdma             1771 drivers/dma/xgene-dma.c 	if (!IS_ERR(pdma->clk))
pdma             1772 drivers/dma/xgene-dma.c 		clk_disable_unprepare(pdma->clk);
pdma             1779 drivers/dma/xgene-dma.c 	struct xgene_dma *pdma = platform_get_drvdata(pdev);
pdma             1783 drivers/dma/xgene-dma.c 	xgene_dma_async_unregister(pdma);
pdma             1786 drivers/dma/xgene-dma.c 	xgene_dma_mask_interrupts(pdma);
pdma             1787 drivers/dma/xgene-dma.c 	xgene_dma_disable(pdma);
pdma             1788 drivers/dma/xgene-dma.c 	xgene_dma_free_irqs(pdma);
pdma             1791 drivers/dma/xgene-dma.c 		chan = &pdma->chan[i];
pdma             1796 drivers/dma/xgene-dma.c 	if (!IS_ERR(pdma->clk))
pdma             1797 drivers/dma/xgene-dma.c 		clk_disable_unprepare(pdma->clk);
pdma              759 drivers/gpu/drm/i915/i915_gem_gtt.c write_dma_entry(struct i915_page_dma * const pdma,
pdma              763 drivers/gpu/drm/i915/i915_gem_gtt.c 	u64 * const vaddr = kmap_atomic(pdma->page);
pdma              107 drivers/gpu/drm/nouveau/nvkm/engine/dma/base.c 	      int index, struct nvkm_dma **pdma)
pdma              111 drivers/gpu/drm/nouveau/nvkm/engine/dma/base.c 	if (!(dma = *pdma = kzalloc(sizeof(*dma), GFP_KERNEL)))
pdma               33 drivers/gpu/drm/nouveau/nvkm/engine/dma/gf100.c gf100_dma_new(struct nvkm_device *device, int index, struct nvkm_dma **pdma)
pdma               35 drivers/gpu/drm/nouveau/nvkm/engine/dma/gf100.c 	return nvkm_dma_new_(&gf100_dma, device, index, pdma);
pdma               33 drivers/gpu/drm/nouveau/nvkm/engine/dma/gf119.c gf119_dma_new(struct nvkm_device *device, int index, struct nvkm_dma **pdma)
pdma               35 drivers/gpu/drm/nouveau/nvkm/engine/dma/gf119.c 	return nvkm_dma_new_(&gf119_dma, device, index, pdma);
pdma               31 drivers/gpu/drm/nouveau/nvkm/engine/dma/gv100.c gv100_dma_new(struct nvkm_device *device, int index, struct nvkm_dma **pdma)
pdma               33 drivers/gpu/drm/nouveau/nvkm/engine/dma/gv100.c 	return nvkm_dma_new_(&gv100_dma, device, index, pdma);
pdma               33 drivers/gpu/drm/nouveau/nvkm/engine/dma/nv04.c nv04_dma_new(struct nvkm_device *device, int index, struct nvkm_dma **pdma)
pdma               35 drivers/gpu/drm/nouveau/nvkm/engine/dma/nv04.c 	return nvkm_dma_new_(&nv04_dma, device, index, pdma);
pdma               33 drivers/gpu/drm/nouveau/nvkm/engine/dma/nv50.c nv50_dma_new(struct nvkm_device *device, int index, struct nvkm_dma **pdma)
pdma               35 drivers/gpu/drm/nouveau/nvkm/engine/dma/nv50.c 	return nvkm_dma_new_(&nv50_dma, device, index, pdma);