pcw_addr           45 drivers/clk/mediatek/clk-pll.c 	void __iomem	*pcw_addr;
pcw_addr          129 drivers/clk/mediatek/clk-pll.c 	if (pll->pd_addr != pll->pcw_addr) {
pcw_addr          131 drivers/clk/mediatek/clk-pll.c 		val = readl(pll->pcw_addr);
pcw_addr          138 drivers/clk/mediatek/clk-pll.c 	writel(val, pll->pcw_addr);
pcw_addr          219 drivers/clk/mediatek/clk-pll.c 	pcw = readl(pll->pcw_addr) >> pll->data->pcw_shift;
pcw_addr          315 drivers/clk/mediatek/clk-pll.c 	pll->pcw_addr = base + data->pcw_reg;