pcu_base           37 arch/arm/mach-zx/platsmp.c static void __iomem *pcu_base;
pcu_base           83 arch/arm/mach-zx/platsmp.c 	pcu_base = of_iomap(np, 0);
pcu_base           85 arch/arm/mach-zx/platsmp.c 	WARN_ON(!pcu_base);
pcu_base          112 arch/arm/mach-zx/platsmp.c 	writel_relaxed(0x0, pcu_base + PCU_CPU1_CTRL);
pcu_base          115 arch/arm/mach-zx/platsmp.c 	while (readl_relaxed(pcu_base + PCU_CPU1_ST) & 0x4)
pcu_base          150 arch/arm/mach-zx/platsmp.c 	writel_relaxed(0x2, pcu_base + PCU_CPU1_CTRL);
pcu_base          152 arch/arm/mach-zx/platsmp.c 	while ((readl_relaxed(pcu_base + PCU_CPU1_ST) & 0x3) != 0x0) {
pcu_base           83 drivers/platform/x86/intel_speed_select_if/isst_if_mmio.c 	u32 mmio_base, pcu_base;
pcu_base           99 drivers/platform/x86/intel_speed_select_if/isst_if_mmio.c 	ret = pci_read_config_dword(pdev, 0xFC, &pcu_base);
pcu_base          103 drivers/platform/x86/intel_speed_select_if/isst_if_mmio.c 	pcu_base &= GENMASK(10, 0);
pcu_base          104 drivers/platform/x86/intel_speed_select_if/isst_if_mmio.c 	base_addr = (u64)mmio_base << 23 | (u64) pcu_base << 12;
pcu_base           19 drivers/power/reset/zx-reboot.c static void __iomem *pcu_base;
pcu_base           25 drivers/power/reset/zx-reboot.c 	writel_relaxed(1, pcu_base + 0x34);
pcu_base           50 drivers/power/reset/zx-reboot.c 	pcu_base = of_iomap(np, 0);
pcu_base           52 drivers/power/reset/zx-reboot.c 	if (!pcu_base) {
pcu_base           61 drivers/power/reset/zx-reboot.c 		iounmap(pcu_base);