pct_ideal_dram_sdp_bw_after_urgent_pixel_only   47 drivers/gpu/drm/amd/amdgpu/amdgpu_socbb.h 	uint32_t pct_ideal_dram_sdp_bw_after_urgent_pixel_only; // PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelDataOnly
pct_ideal_dram_sdp_bw_after_urgent_pixel_only  241 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	.pct_ideal_dram_sdp_bw_after_urgent_pixel_only = 40.0,
pct_ideal_dram_sdp_bw_after_urgent_pixel_only  352 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	.pct_ideal_dram_sdp_bw_after_urgent_pixel_only = 40.0,
pct_ideal_dram_sdp_bw_after_urgent_pixel_only 3310 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only =
pct_ideal_dram_sdp_bw_after_urgent_pixel_only 3311 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 				fixed16_to_double_to_cpu(bb->pct_ideal_dram_sdp_bw_after_urgent_pixel_only);
pct_ideal_dram_sdp_bw_after_urgent_pixel_only  240 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	.pct_ideal_dram_sdp_bw_after_urgent_pixel_only = 80.0,
pct_ideal_dram_sdp_bw_after_urgent_pixel_only   77 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h 	double pct_ideal_dram_sdp_bw_after_urgent_pixel_only; // PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelDataOnly
pct_ideal_dram_sdp_bw_after_urgent_pixel_only  202 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c 			soc->pct_ideal_dram_sdp_bw_after_urgent_pixel_only; // there's always that one bastard variable that's so long it throws everything out of alignment!