pcnt1            1385 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint64_t pcnt1:1;
pcnt1            1423 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint64_t pcnt1:1;
pcnt1            1525 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint64_t pcnt1:1;
pcnt1            1563 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint64_t pcnt1:1;
pcnt1            1602 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint64_t pcnt1:1;
pcnt1            1640 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint64_t pcnt1:1;
pcnt1            1742 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint64_t pcnt1:1;
pcnt1            1780 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint64_t pcnt1:1;
pcnt1              56 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c 	s32 pcnt1 = (bit_rate > 1200000000) ? 15 : 10;
pcnt1              90 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c 	timing->hs_prepare = linear_inter(tmax, tmin, pcnt1, 0, true);
pcnt1             151 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c 	s32 pcnt1 = 50;
pcnt1             200 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c 	timing->hs_prepare = linear_inter(tmax, tmin, pcnt1, 0, false);
pcnt1             268 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c 	s32 pcnt1 = 50;
pcnt1             309 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c 	timing->hs_prepare = linear_inter(tmax, tmin, pcnt1, 0, false);