pciexbar          147 arch/x86/pci/mmconfig-shared.c 	u32 pciexbar, mask = 0, len = 0;
pciexbar          149 arch/x86/pci/mmconfig-shared.c 	raw_pci_ops->read(0, 0, PCI_DEVFN(0, 0), 0x48, 4, &pciexbar);
pciexbar          152 arch/x86/pci/mmconfig-shared.c 	if (!(pciexbar & 1))
pciexbar          156 arch/x86/pci/mmconfig-shared.c 	switch ((pciexbar >> 1) & 3) {
pciexbar          176 arch/x86/pci/mmconfig-shared.c 	if ((pciexbar & mask) & 0x0fffffffU)
pciexbar          180 arch/x86/pci/mmconfig-shared.c 	if ((pciexbar & mask) >= 0xf0000000U)
pciexbar          183 arch/x86/pci/mmconfig-shared.c 	if (pci_mmconfig_add(0, 0, (len >> 20) - 1, pciexbar & mask) == NULL)