pciercx_cfg001    386 arch/mips/pci/pcie-octeon.c 	union cvmx_pciercx_cfg001 pciercx_cfg001;
pciercx_cfg001    480 arch/mips/pci/pcie-octeon.c 	pciercx_cfg001.u32 = cvmx_pcie_cfgx_read(pcie_port, CVMX_PCIERCX_CFG001(pcie_port));
pciercx_cfg001    481 arch/mips/pci/pcie-octeon.c 	pciercx_cfg001.s.msae = 1;	/* Memory space enable. */
pciercx_cfg001    482 arch/mips/pci/pcie-octeon.c 	pciercx_cfg001.s.me = 1;	/* Bus master enable. */
pciercx_cfg001    483 arch/mips/pci/pcie-octeon.c 	pciercx_cfg001.s.i_dis = 1;	/* INTx assertion disable. */
pciercx_cfg001    484 arch/mips/pci/pcie-octeon.c 	pciercx_cfg001.s.see = 1;	/* SERR# enable */
pciercx_cfg001    485 arch/mips/pci/pcie-octeon.c 	cvmx_pcie_cfgx_write(pcie_port, CVMX_PCIERCX_CFG001(pcie_port), pciercx_cfg001.u32);