pcie_dpm_enable_mask 2605 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (data->dpm_level_enable_mask.pcie_dpm_enable_mask) { pcie_dpm_enable_mask 2607 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c tmp = data->dpm_level_enable_mask.pcie_dpm_enable_mask; pcie_dpm_enable_mask 2715 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (data->dpm_level_enable_mask.pcie_dpm_enable_mask) { pcie_dpm_enable_mask 2717 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c data->dpm_level_enable_mask.pcie_dpm_enable_mask); pcie_dpm_enable_mask 3867 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c data->dpm_level_enable_mask.pcie_dpm_enable_mask = pcie_dpm_enable_mask 4422 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c uint32_t tmp = mask & data->dpm_level_enable_mask.pcie_dpm_enable_mask; pcie_dpm_enable_mask 169 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h uint32_t pcie_dpm_enable_mask; pcie_dpm_enable_mask 1015 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c data->dpm_level_enable_mask.pcie_dpm_enable_mask = pcie_dpm_enable_mask 851 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c data->dpm_level_enable_mask.pcie_dpm_enable_mask = pcie_dpm_enable_mask 1059 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c while (data->dpm_level_enable_mask.pcie_dpm_enable_mask && pcie_dpm_enable_mask 1060 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & pcie_dpm_enable_mask 1064 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c while (data->dpm_level_enable_mask.pcie_dpm_enable_mask && pcie_dpm_enable_mask 1065 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & pcie_dpm_enable_mask 1070 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & pcie_dpm_enable_mask 789 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c data->dpm_level_enable_mask.pcie_dpm_enable_mask = pcie_dpm_enable_mask 1005 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c while ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & pcie_dpm_enable_mask 1010 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c while ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & pcie_dpm_enable_mask 1016 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & pcie_dpm_enable_mask 791 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c data->dpm_level_enable_mask.pcie_dpm_enable_mask = pcie_dpm_enable_mask 1033 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask && pcie_dpm_enable_mask 1034 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & pcie_dpm_enable_mask 1038 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask && pcie_dpm_enable_mask 1039 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & pcie_dpm_enable_mask 1044 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & pcie_dpm_enable_mask 532 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c data->dpm_level_enable_mask.pcie_dpm_enable_mask = pcie_dpm_enable_mask 745 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c if (0 == data->dpm_level_enable_mask.pcie_dpm_enable_mask) pcie_dpm_enable_mask 748 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c while (data->dpm_level_enable_mask.pcie_dpm_enable_mask && pcie_dpm_enable_mask 749 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & pcie_dpm_enable_mask 754 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c while (data->dpm_level_enable_mask.pcie_dpm_enable_mask && pcie_dpm_enable_mask 755 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & pcie_dpm_enable_mask 761 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & pcie_dpm_enable_mask 593 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c data->dpm_level_enable_mask.pcie_dpm_enable_mask = pcie_dpm_enable_mask 923 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask && pcie_dpm_enable_mask 924 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & pcie_dpm_enable_mask 928 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask && pcie_dpm_enable_mask 929 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & pcie_dpm_enable_mask 934 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & pcie_dpm_enable_mask 2644 drivers/gpu/drm/radeon/ci_dpm.c pi->dpm_level_enable_mask.pcie_dpm_enable_mask = pcie_dpm_enable_mask 3843 drivers/gpu/drm/radeon/ci_dpm.c if (pi->dpm_level_enable_mask.pcie_dpm_enable_mask) { pcie_dpm_enable_mask 3846 drivers/gpu/drm/radeon/ci_dpm.c pi->dpm_level_enable_mask.pcie_dpm_enable_mask); pcie_dpm_enable_mask 4188 drivers/gpu/drm/radeon/ci_dpm.c pi->dpm_level_enable_mask.pcie_dpm_enable_mask = pcie_dpm_enable_mask 4215 drivers/gpu/drm/radeon/ci_dpm.c pi->dpm_level_enable_mask.pcie_dpm_enable_mask) { pcie_dpm_enable_mask 4217 drivers/gpu/drm/radeon/ci_dpm.c tmp = pi->dpm_level_enable_mask.pcie_dpm_enable_mask; pcie_dpm_enable_mask 4303 drivers/gpu/drm/radeon/ci_dpm.c pi->dpm_level_enable_mask.pcie_dpm_enable_mask) { pcie_dpm_enable_mask 4305 drivers/gpu/drm/radeon/ci_dpm.c pi->dpm_level_enable_mask.pcie_dpm_enable_mask); pcie_dpm_enable_mask 113 drivers/gpu/drm/radeon/ci_dpm.h u32 pcie_dpm_enable_mask;