pcie 707 arch/powerpc/sysdev/fsl_pci.c struct mpc83xx_pcie_priv *pcie = hose->dn->data; pcie 719 arch/powerpc/sysdev/fsl_pci.c return pcie->cfg_type0 + offset; pcie 721 arch/powerpc/sysdev/fsl_pci.c if (pcie->dev_base == dev_base) pcie 724 arch/powerpc/sysdev/fsl_pci.c out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAL, dev_base); pcie 726 arch/powerpc/sysdev/fsl_pci.c pcie->dev_base = dev_base; pcie 728 arch/powerpc/sysdev/fsl_pci.c return pcie->cfg_type1 + offset; pcie 752 arch/powerpc/sysdev/fsl_pci.c struct mpc83xx_pcie_priv *pcie; pcie 756 arch/powerpc/sysdev/fsl_pci.c pcie = zalloc_maybe_bootmem(sizeof(*pcie), GFP_KERNEL); pcie 757 arch/powerpc/sysdev/fsl_pci.c if (!pcie) pcie 760 arch/powerpc/sysdev/fsl_pci.c pcie->cfg_type0 = ioremap(reg->start, resource_size(reg)); pcie 761 arch/powerpc/sysdev/fsl_pci.c if (!pcie->cfg_type0) pcie 764 arch/powerpc/sysdev/fsl_pci.c cfg_bar = in_le32(pcie->cfg_type0 + PEX_OUTWIN0_BAR); pcie 771 arch/powerpc/sysdev/fsl_pci.c pcie->cfg_type1 = ioremap(cfg_bar, 0x1000); pcie 772 arch/powerpc/sysdev/fsl_pci.c if (!pcie->cfg_type1) pcie 776 arch/powerpc/sysdev/fsl_pci.c hose->dn->data = pcie; pcie 780 arch/powerpc/sysdev/fsl_pci.c out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAH, 0); pcie 781 arch/powerpc/sysdev/fsl_pci.c out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAL, 0); pcie 788 arch/powerpc/sysdev/fsl_pci.c iounmap(pcie->cfg_type0); pcie 790 arch/powerpc/sysdev/fsl_pci.c kfree(pcie); pcie 891 arch/powerpc/sysdev/fsl_pci.c struct mpc83xx_pcie_priv *pcie = hose->dn->data; pcie 896 arch/powerpc/sysdev/fsl_pci.c in = pcie->cfg_type0 + PEX_RC_INWIN_BASE; pcie 282 drivers/bcma/driver_mips.c struct bcma_device *cpu, *pcie, *i2s; pcie 292 drivers/bcma/driver_mips.c pcie = bcma_find_core(bus, BCMA_CORE_PCIE); pcie 294 drivers/bcma/driver_mips.c if (cpu && pcie && i2s && pcie 296 drivers/bcma/driver_mips.c bcma_aread32(pcie, BCMA_MIPS_OOBSELINA74) == 0x08060504 && pcie 299 drivers/bcma/driver_mips.c bcma_awrite32(pcie, BCMA_MIPS_OOBSELINA74, 0x07060504); pcie 359 drivers/firmware/efi/cper.c static void cper_print_pcie(const char *pfx, const struct cper_sec_pcie *pcie, pcie 362 drivers/firmware/efi/cper.c if (pcie->validation_bits & CPER_PCIE_VALID_PORT_TYPE) pcie 363 drivers/firmware/efi/cper.c printk("%s""port_type: %d, %s\n", pfx, pcie->port_type, pcie 364 drivers/firmware/efi/cper.c pcie->port_type < ARRAY_SIZE(pcie_port_type_strs) ? pcie 365 drivers/firmware/efi/cper.c pcie_port_type_strs[pcie->port_type] : "unknown"); pcie 366 drivers/firmware/efi/cper.c if (pcie->validation_bits & CPER_PCIE_VALID_VERSION) pcie 368 drivers/firmware/efi/cper.c pcie->version.major, pcie->version.minor); pcie 369 drivers/firmware/efi/cper.c if (pcie->validation_bits & CPER_PCIE_VALID_COMMAND_STATUS) pcie 371 drivers/firmware/efi/cper.c pcie->command, pcie->status); pcie 372 drivers/firmware/efi/cper.c if (pcie->validation_bits & CPER_PCIE_VALID_DEVICE_ID) { pcie 375 drivers/firmware/efi/cper.c pcie->device_id.segment, pcie->device_id.bus, pcie 376 drivers/firmware/efi/cper.c pcie->device_id.device, pcie->device_id.function); pcie 378 drivers/firmware/efi/cper.c pcie->device_id.slot >> CPER_PCIE_SLOT_SHIFT); pcie 380 drivers/firmware/efi/cper.c pcie->device_id.secondary_bus); pcie 382 drivers/firmware/efi/cper.c pcie->device_id.vendor_id, pcie->device_id.device_id); pcie 383 drivers/firmware/efi/cper.c p = pcie->device_id.class_code; pcie 386 drivers/firmware/efi/cper.c if (pcie->validation_bits & CPER_PCIE_VALID_SERIAL_NUMBER) pcie 388 drivers/firmware/efi/cper.c pcie->serial_number.lower, pcie->serial_number.upper); pcie 389 drivers/firmware/efi/cper.c if (pcie->validation_bits & CPER_PCIE_VALID_BRIDGE_CONTROL_STATUS) pcie 392 drivers/firmware/efi/cper.c pfx, pcie->bridge.secondary_status, pcie->bridge.control); pcie 395 drivers/firmware/efi/cper.c if ((pcie->validation_bits & CPER_PCIE_VALID_AER_INFO) && pcie 399 drivers/firmware/efi/cper.c aer = (struct aer_capability_regs *)pcie->aer_info; pcie 470 drivers/firmware/efi/cper.c struct cper_sec_pcie *pcie = acpi_hest_get_payload(gdata); pcie 473 drivers/firmware/efi/cper.c if (gdata->error_data_length >= sizeof(*pcie)) pcie 474 drivers/firmware/efi/cper.c cper_print_pcie(newpfx, pcie, gdata); pcie 703 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c ps->pcie.lanes = ((le32_to_cpu(pnon_clock_info->ulCapsAndSettings) & pcie 707 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c ps->pcie.lanes = 0; pcie 3154 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c power_state->pcie.lanes = 0; pcie 145 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h struct smu_state_pcie_block pcie; pcie 157 drivers/gpu/drm/amd/powerplay/inc/power_state.h struct PP_StatePcieBlock pcie; pcie 31 drivers/gpu/drm/nouveau/include/nvkm/subdev/pci.h } pcie; pcie 196 drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c pci->pcie.speed = -1; pcie 197 drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c pci->pcie.width = -1; pcie 141 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c .pcie.init = g84_pcie_init, pcie 142 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c .pcie.set_link = g84_pcie_set_link, pcie 144 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c .pcie.max_speed = g84_pcie_max_speed, pcie 145 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c .pcie.cur_speed = g84_pcie_cur_speed, pcie 147 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c .pcie.set_version = g84_pcie_set_version, pcie 148 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c .pcie.version = g84_pcie_version, pcie 149 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c .pcie.version_supported = g84_pcie_version_supported, pcie 42 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g92.c .pcie.init = g84_pcie_init, pcie 43 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g92.c .pcie.set_link = g84_pcie_set_link, pcie 45 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g92.c .pcie.max_speed = g84_pcie_max_speed, pcie 46 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g92.c .pcie.cur_speed = g84_pcie_cur_speed, pcie 48 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g92.c .pcie.set_version = g84_pcie_set_version, pcie 49 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g92.c .pcie.version = g84_pcie_version, pcie 50 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g92.c .pcie.version_supported = g92_pcie_version_supported, pcie 34 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g94.c .pcie.init = g84_pcie_init, pcie 35 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g94.c .pcie.set_link = g84_pcie_set_link, pcie 37 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g94.c .pcie.max_speed = g84_pcie_max_speed, pcie 38 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g94.c .pcie.cur_speed = g84_pcie_cur_speed, pcie 40 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g94.c .pcie.set_version = g84_pcie_set_version, pcie 41 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g94.c .pcie.version = g84_pcie_version, pcie 42 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g94.c .pcie.version_supported = g92_pcie_version_supported, pcie 87 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf100.c .pcie.init = gf100_pcie_init, pcie 88 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf100.c .pcie.set_link = gf100_pcie_set_link, pcie 90 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf100.c .pcie.max_speed = g84_pcie_max_speed, pcie 91 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf100.c .pcie.cur_speed = g84_pcie_cur_speed, pcie 93 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf100.c .pcie.set_version = gf100_pcie_set_version, pcie 94 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf100.c .pcie.version = gf100_pcie_version, pcie 95 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf100.c .pcie.version_supported = g92_pcie_version_supported, pcie 34 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf106.c .pcie.init = gf100_pcie_init, pcie 35 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf106.c .pcie.set_link = gf100_pcie_set_link, pcie 37 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf106.c .pcie.max_speed = g84_pcie_max_speed, pcie 38 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf106.c .pcie.cur_speed = g84_pcie_cur_speed, pcie 40 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf106.c .pcie.set_version = gf100_pcie_set_version, pcie 41 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf106.c .pcie.version = gf100_pcie_version, pcie 42 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf106.c .pcie.version_supported = g92_pcie_version_supported, pcie 213 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.c .pcie.init = gk104_pcie_init, pcie 214 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.c .pcie.set_link = gk104_pcie_set_link, pcie 216 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.c .pcie.max_speed = gk104_pcie_max_speed, pcie 217 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.c .pcie.cur_speed = g84_pcie_cur_speed, pcie 219 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.c .pcie.set_version = gf100_pcie_set_version, pcie 220 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.c .pcie.version = gf100_pcie_version, pcie 221 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.c .pcie.version_supported = gk104_pcie_version_supported, pcie 53 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c if (!pci->func->pcie.version) pcie 56 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c return pci->func->pcie.version(pci); pcie 62 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c if (!pci->func->pcie.version_supported) pcie 65 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c return pci->func->pcie.version_supported(pci); pcie 71 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c if (!pci->func->pcie.set_version) pcie 75 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c pci->func->pcie.set_version(pci, version); pcie 82 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c if (pci->func->pcie.max_speed) pcie 84 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c nvkm_pcie_speeds[pci->func->pcie.max_speed(pci)]); pcie 105 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c if (pci->func->pcie.init) pcie 106 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c pci->func->pcie.init(pci); pcie 108 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c if (pci->pcie.speed != -1) pcie 109 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c nvkm_pcie_set_link(pci, pci->pcie.speed, pci->pcie.width); pcie 126 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c if (!pci->func->pcie.set_link) pcie 131 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c if (pci->func->pcie.version(pci) < 2) { pcie 136 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c cur_speed = pci->func->pcie.cur_speed(pci); pcie 138 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c pci->func->pcie.max_speed(pci)); pcie 149 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c pci->pcie.speed = speed; pcie 150 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c pci->pcie.width = width; pcie 160 drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c ret = pci->func->pcie.set_link(pci, speed, width); pcie 27 drivers/gpu/drm/nouveau/nvkm/subdev/pci/priv.h } pcie; pcie 324 drivers/net/can/kvaser_pciefd.c static int kvaser_pciefd_spi_wait_loop(struct kvaser_pciefd *pcie, int msk) pcie 329 drivers/net/can/kvaser_pciefd.c ret = readl_poll_timeout(pcie->reg_base + KVASER_PCIEFD_SPI_STATUS_REG, pcie 335 drivers/net/can/kvaser_pciefd.c static int kvaser_pciefd_spi_cmd(struct kvaser_pciefd *pcie, const u8 *tx, pcie 340 drivers/net/can/kvaser_pciefd.c iowrite32(BIT(0), pcie->reg_base + KVASER_PCIEFD_SPI_SSEL_REG); pcie 341 drivers/net/can/kvaser_pciefd.c iowrite32(BIT(10), pcie->reg_base + KVASER_PCIEFD_SPI_CTRL_REG); pcie 342 drivers/net/can/kvaser_pciefd.c ioread32(pcie->reg_base + KVASER_PCIEFD_SPI_RX_REG); pcie 346 drivers/net/can/kvaser_pciefd.c if (kvaser_pciefd_spi_wait_loop(pcie, KVASER_PCIEFD_SPI_TRDY)) pcie 349 drivers/net/can/kvaser_pciefd.c iowrite32(*tx++, pcie->reg_base + KVASER_PCIEFD_SPI_TX_REG); pcie 351 drivers/net/can/kvaser_pciefd.c if (kvaser_pciefd_spi_wait_loop(pcie, KVASER_PCIEFD_SPI_RRDY)) pcie 354 drivers/net/can/kvaser_pciefd.c ioread32(pcie->reg_base + KVASER_PCIEFD_SPI_RX_REG); pcie 359 drivers/net/can/kvaser_pciefd.c if (kvaser_pciefd_spi_wait_loop(pcie, KVASER_PCIEFD_SPI_TRDY)) pcie 362 drivers/net/can/kvaser_pciefd.c iowrite32(0, pcie->reg_base + KVASER_PCIEFD_SPI_TX_REG); pcie 364 drivers/net/can/kvaser_pciefd.c if (kvaser_pciefd_spi_wait_loop(pcie, KVASER_PCIEFD_SPI_RRDY)) pcie 367 drivers/net/can/kvaser_pciefd.c *rx++ = ioread32(pcie->reg_base + KVASER_PCIEFD_SPI_RX_REG); pcie 370 drivers/net/can/kvaser_pciefd.c if (kvaser_pciefd_spi_wait_loop(pcie, KVASER_PCIEFD_SPI_TMT)) pcie 373 drivers/net/can/kvaser_pciefd.c iowrite32(0, pcie->reg_base + KVASER_PCIEFD_SPI_CTRL_REG); pcie 376 drivers/net/can/kvaser_pciefd.c dev_err(&pcie->pci->dev, "Flash SPI transfer failed\n"); pcie 383 drivers/net/can/kvaser_pciefd.c static int kvaser_pciefd_cfg_read_and_verify(struct kvaser_pciefd *pcie, pcie 397 drivers/net/can/kvaser_pciefd.c res = kvaser_pciefd_spi_cmd(pcie, cmd, ARRAY_SIZE(cmd), (u8 *)img, pcie 405 drivers/net/can/kvaser_pciefd.c dev_err(&pcie->pci->dev, pcie 411 drivers/net/can/kvaser_pciefd.c dev_err(&pcie->pci->dev, pcie 418 drivers/net/can/kvaser_pciefd.c dev_err(&pcie->pci->dev, pcie 426 drivers/net/can/kvaser_pciefd.c static void kvaser_pciefd_cfg_read_params(struct kvaser_pciefd *pcie, pcie 432 drivers/net/can/kvaser_pciefd.c memcpy(&pcie->nr_channels, param->data, le32_to_cpu(param->len)); pcie 435 drivers/net/can/kvaser_pciefd.c static int kvaser_pciefd_read_cfg(struct kvaser_pciefd *pcie) pcie 443 drivers/net/can/kvaser_pciefd.c res = kvaser_pciefd_spi_cmd(pcie, cmd, ARRAY_SIZE(cmd), cmd, 1); pcie 452 drivers/net/can/kvaser_pciefd.c dev_err(&pcie->pci->dev, pcie 461 drivers/net/can/kvaser_pciefd.c res = kvaser_pciefd_spi_cmd(pcie, cmd, 1, cmd, 1); pcie 467 drivers/net/can/kvaser_pciefd.c dev_err(&pcie->pci->dev, "Unexpected WIP bit set in flash\n"); pcie 471 drivers/net/can/kvaser_pciefd.c res = kvaser_pciefd_cfg_read_and_verify(pcie, img); pcie 477 drivers/net/can/kvaser_pciefd.c kvaser_pciefd_cfg_read_params(pcie, img); pcie 920 drivers/net/can/kvaser_pciefd.c static int kvaser_pciefd_setup_can_ctrls(struct kvaser_pciefd *pcie) pcie 924 drivers/net/can/kvaser_pciefd.c for (i = 0; i < pcie->nr_channels; i++) { pcie 936 drivers/net/can/kvaser_pciefd.c can->reg_base = pcie->reg_base + KVASER_PCIEFD_KCAN0_BASE + pcie 939 drivers/net/can/kvaser_pciefd.c can->kv_pcie = pcie; pcie 954 drivers/net/can/kvaser_pciefd.c dev_err(&pcie->pci->dev, pcie 961 drivers/net/can/kvaser_pciefd.c can->can.clock.freq = pcie->freq; pcie 982 drivers/net/can/kvaser_pciefd.c dev_err(&pcie->pci->dev, pcie 994 drivers/net/can/kvaser_pciefd.c SET_NETDEV_DEV(netdev, &pcie->pci->dev); pcie 1001 drivers/net/can/kvaser_pciefd.c pcie->can[i] = can; pcie 1008 drivers/net/can/kvaser_pciefd.c static int kvaser_pciefd_reg_candev(struct kvaser_pciefd *pcie) pcie 1012 drivers/net/can/kvaser_pciefd.c for (i = 0; i < pcie->nr_channels; i++) { pcie 1013 drivers/net/can/kvaser_pciefd.c int err = register_candev(pcie->can[i]->can.dev); pcie 1020 drivers/net/can/kvaser_pciefd.c unregister_candev(pcie->can[j]->can.dev); pcie 1028 drivers/net/can/kvaser_pciefd.c static void kvaser_pciefd_write_dma_map(struct kvaser_pciefd *pcie, pcie 1040 drivers/net/can/kvaser_pciefd.c iowrite32(word1, pcie->reg_base + offset); pcie 1041 drivers/net/can/kvaser_pciefd.c iowrite32(word2, pcie->reg_base + offset + 4); pcie 1044 drivers/net/can/kvaser_pciefd.c static int kvaser_pciefd_setup_dma(struct kvaser_pciefd *pcie) pcie 1051 drivers/net/can/kvaser_pciefd.c iowrite32(0, pcie->reg_base + KVASER_PCIEFD_SRB_CTRL_REG); pcie 1055 drivers/net/can/kvaser_pciefd.c pcie->dma_data[i] = pcie 1056 drivers/net/can/kvaser_pciefd.c dmam_alloc_coherent(&pcie->pci->dev, pcie 1061 drivers/net/can/kvaser_pciefd.c if (!pcie->dma_data[i] || !dma_addr[i]) { pcie 1062 drivers/net/can/kvaser_pciefd.c dev_err(&pcie->pci->dev, "Rx dma_alloc(%u) failure\n", pcie 1067 drivers/net/can/kvaser_pciefd.c kvaser_pciefd_write_dma_map(pcie, dma_addr[i], offset); pcie 1073 drivers/net/can/kvaser_pciefd.c pcie->reg_base + KVASER_PCIEFD_SRB_CMD_REG); pcie 1075 drivers/net/can/kvaser_pciefd.c srb_status = ioread32(pcie->reg_base + KVASER_PCIEFD_SRB_STAT_REG); pcie 1077 drivers/net/can/kvaser_pciefd.c dev_err(&pcie->pci->dev, "DMA not idle before enabling\n"); pcie 1083 drivers/net/can/kvaser_pciefd.c pcie->reg_base + KVASER_PCIEFD_SRB_CTRL_REG); pcie 1088 drivers/net/can/kvaser_pciefd.c static int kvaser_pciefd_setup_board(struct kvaser_pciefd *pcie) pcie 1094 drivers/net/can/kvaser_pciefd.c ret = kvaser_pciefd_read_cfg(pcie); pcie 1098 drivers/net/can/kvaser_pciefd.c sysid = ioread32(pcie->reg_base + KVASER_PCIEFD_SYSID_VERSION_REG); pcie 1100 drivers/net/can/kvaser_pciefd.c if (pcie->nr_channels != sysid_nr_chan) { pcie 1101 drivers/net/can/kvaser_pciefd.c dev_err(&pcie->pci->dev, pcie 1103 drivers/net/can/kvaser_pciefd.c pcie->nr_channels, pcie 1108 drivers/net/can/kvaser_pciefd.c if (pcie->nr_channels > KVASER_PCIEFD_MAX_CAN_CHANNELS) pcie 1109 drivers/net/can/kvaser_pciefd.c pcie->nr_channels = KVASER_PCIEFD_MAX_CAN_CHANNELS; pcie 1111 drivers/net/can/kvaser_pciefd.c build = ioread32(pcie->reg_base + KVASER_PCIEFD_SYSID_BUILD_REG); pcie 1112 drivers/net/can/kvaser_pciefd.c dev_dbg(&pcie->pci->dev, "Version %u.%u.%u\n", pcie 1117 drivers/net/can/kvaser_pciefd.c srb_status = ioread32(pcie->reg_base + KVASER_PCIEFD_SRB_STAT_REG); pcie 1119 drivers/net/can/kvaser_pciefd.c dev_err(&pcie->pci->dev, pcie 1124 drivers/net/can/kvaser_pciefd.c pcie->bus_freq = ioread32(pcie->reg_base + pcie 1126 drivers/net/can/kvaser_pciefd.c pcie->freq = ioread32(pcie->reg_base + KVASER_PCIEFD_SYSID_CANFREQ_REG); pcie 1127 drivers/net/can/kvaser_pciefd.c pcie->freq_to_ticks_div = pcie->freq / 1000000; pcie 1128 drivers/net/can/kvaser_pciefd.c if (pcie->freq_to_ticks_div == 0) pcie 1129 drivers/net/can/kvaser_pciefd.c pcie->freq_to_ticks_div = 1; pcie 1132 drivers/net/can/kvaser_pciefd.c iowrite32(0, pcie->reg_base + KVASER_PCIEFD_LOOP_REG); pcie 1136 drivers/net/can/kvaser_pciefd.c static int kvaser_pciefd_handle_data_packet(struct kvaser_pciefd *pcie, pcie 1147 drivers/net/can/kvaser_pciefd.c if (ch_id >= pcie->nr_channels) pcie 1150 drivers/net/can/kvaser_pciefd.c priv = &pcie->can[ch_id]->can; pcie 1188 drivers/net/can/kvaser_pciefd.c pcie->freq_to_ticks_div)); pcie 1308 drivers/net/can/kvaser_pciefd.c static int kvaser_pciefd_handle_error_packet(struct kvaser_pciefd *pcie, pcie 1314 drivers/net/can/kvaser_pciefd.c if (ch_id >= pcie->nr_channels) pcie 1317 drivers/net/can/kvaser_pciefd.c can = pcie->can[ch_id]; pcie 1385 drivers/net/can/kvaser_pciefd.c static int kvaser_pciefd_handle_status_packet(struct kvaser_pciefd *pcie, pcie 1393 drivers/net/can/kvaser_pciefd.c if (ch_id >= pcie->nr_channels) pcie 1396 drivers/net/can/kvaser_pciefd.c can = pcie->can[ch_id]; pcie 1447 drivers/net/can/kvaser_pciefd.c static int kvaser_pciefd_handle_eack_packet(struct kvaser_pciefd *pcie, pcie 1453 drivers/net/can/kvaser_pciefd.c if (ch_id >= pcie->nr_channels) pcie 1456 drivers/net/can/kvaser_pciefd.c can = pcie->can[ch_id]; pcie 1510 drivers/net/can/kvaser_pciefd.c static int kvaser_pciefd_handle_ack_packet(struct kvaser_pciefd *pcie, pcie 1517 drivers/net/can/kvaser_pciefd.c if (ch_id >= pcie->nr_channels) pcie 1520 drivers/net/can/kvaser_pciefd.c can = pcie->can[ch_id]; pcie 1553 drivers/net/can/kvaser_pciefd.c static int kvaser_pciefd_handle_eflush_packet(struct kvaser_pciefd *pcie, pcie 1559 drivers/net/can/kvaser_pciefd.c if (ch_id >= pcie->nr_channels) pcie 1562 drivers/net/can/kvaser_pciefd.c can = pcie->can[ch_id]; pcie 1570 drivers/net/can/kvaser_pciefd.c static int kvaser_pciefd_read_packet(struct kvaser_pciefd *pcie, int *start_pos, pcie 1573 drivers/net/can/kvaser_pciefd.c __le32 *buffer = pcie->dma_data[dma_buf]; pcie 1599 drivers/net/can/kvaser_pciefd.c ret = kvaser_pciefd_handle_data_packet(pcie, p, &buffer[pos]); pcie 1610 drivers/net/can/kvaser_pciefd.c ret = kvaser_pciefd_handle_ack_packet(pcie, p); pcie 1614 drivers/net/can/kvaser_pciefd.c ret = kvaser_pciefd_handle_status_packet(pcie, p); pcie 1618 drivers/net/can/kvaser_pciefd.c ret = kvaser_pciefd_handle_error_packet(pcie, p); pcie 1622 drivers/net/can/kvaser_pciefd.c ret = kvaser_pciefd_handle_eack_packet(pcie, p); pcie 1626 drivers/net/can/kvaser_pciefd.c ret = kvaser_pciefd_handle_eflush_packet(pcie, p); pcie 1632 drivers/net/can/kvaser_pciefd.c dev_info(&pcie->pci->dev, pcie 1637 drivers/net/can/kvaser_pciefd.c dev_err(&pcie->pci->dev, "Unknown packet type 0x%08X\n", type); pcie 1657 drivers/net/can/kvaser_pciefd.c static int kvaser_pciefd_read_buffer(struct kvaser_pciefd *pcie, int dma_buf) pcie 1663 drivers/net/can/kvaser_pciefd.c res = kvaser_pciefd_read_packet(pcie, &pos, dma_buf); pcie 1669 drivers/net/can/kvaser_pciefd.c static int kvaser_pciefd_receive_irq(struct kvaser_pciefd *pcie) pcie 1673 drivers/net/can/kvaser_pciefd.c irq = ioread32(pcie->reg_base + KVASER_PCIEFD_SRB_IRQ_REG); pcie 1675 drivers/net/can/kvaser_pciefd.c kvaser_pciefd_read_buffer(pcie, 0); pcie 1678 drivers/net/can/kvaser_pciefd.c pcie->reg_base + KVASER_PCIEFD_SRB_CMD_REG); pcie 1682 drivers/net/can/kvaser_pciefd.c kvaser_pciefd_read_buffer(pcie, 1); pcie 1685 drivers/net/can/kvaser_pciefd.c pcie->reg_base + KVASER_PCIEFD_SRB_CMD_REG); pcie 1692 drivers/net/can/kvaser_pciefd.c dev_err(&pcie->pci->dev, "DMA IRQ error 0x%08X\n", irq); pcie 1694 drivers/net/can/kvaser_pciefd.c iowrite32(irq, pcie->reg_base + KVASER_PCIEFD_SRB_IRQ_REG); pcie 1730 drivers/net/can/kvaser_pciefd.c struct kvaser_pciefd *pcie = (struct kvaser_pciefd *)dev; pcie 1734 drivers/net/can/kvaser_pciefd.c board_irq = ioread32(pcie->reg_base + KVASER_PCIEFD_IRQ_REG); pcie 1740 drivers/net/can/kvaser_pciefd.c kvaser_pciefd_receive_irq(pcie); pcie 1742 drivers/net/can/kvaser_pciefd.c for (i = 0; i < pcie->nr_channels; i++) { pcie 1743 drivers/net/can/kvaser_pciefd.c if (!pcie->can[i]) { pcie 1744 drivers/net/can/kvaser_pciefd.c dev_err(&pcie->pci->dev, pcie 1751 drivers/net/can/kvaser_pciefd.c kvaser_pciefd_transmit_irq(pcie->can[i]); pcie 1754 drivers/net/can/kvaser_pciefd.c iowrite32(board_irq, pcie->reg_base + KVASER_PCIEFD_IRQ_REG); pcie 1758 drivers/net/can/kvaser_pciefd.c static void kvaser_pciefd_teardown_can_ctrls(struct kvaser_pciefd *pcie) pcie 1763 drivers/net/can/kvaser_pciefd.c for (i = 0; i < pcie->nr_channels; i++) { pcie 1764 drivers/net/can/kvaser_pciefd.c can = pcie->can[i]; pcie 1778 drivers/net/can/kvaser_pciefd.c struct kvaser_pciefd *pcie; pcie 1780 drivers/net/can/kvaser_pciefd.c pcie = devm_kzalloc(&pdev->dev, sizeof(*pcie), GFP_KERNEL); pcie 1781 drivers/net/can/kvaser_pciefd.c if (!pcie) pcie 1784 drivers/net/can/kvaser_pciefd.c pci_set_drvdata(pdev, pcie); pcie 1785 drivers/net/can/kvaser_pciefd.c pcie->pci = pdev; pcie 1795 drivers/net/can/kvaser_pciefd.c pcie->reg_base = pci_iomap(pdev, 0, 0); pcie 1796 drivers/net/can/kvaser_pciefd.c if (!pcie->reg_base) { pcie 1801 drivers/net/can/kvaser_pciefd.c err = kvaser_pciefd_setup_board(pcie); pcie 1805 drivers/net/can/kvaser_pciefd.c err = kvaser_pciefd_setup_dma(pcie); pcie 1811 drivers/net/can/kvaser_pciefd.c err = kvaser_pciefd_setup_can_ctrls(pcie); pcie 1816 drivers/net/can/kvaser_pciefd.c pcie->reg_base + KVASER_PCIEFD_SRB_IRQ_REG); pcie 1821 drivers/net/can/kvaser_pciefd.c pcie->reg_base + KVASER_PCIEFD_SRB_IEN_REG); pcie 1825 drivers/net/can/kvaser_pciefd.c pcie->reg_base + KVASER_PCIEFD_IRQ_REG); pcie 1827 drivers/net/can/kvaser_pciefd.c pcie->reg_base + KVASER_PCIEFD_IEN_REG); pcie 1831 drivers/net/can/kvaser_pciefd.c pcie->reg_base + KVASER_PCIEFD_SRB_CMD_REG); pcie 1833 drivers/net/can/kvaser_pciefd.c pcie->reg_base + KVASER_PCIEFD_SRB_CMD_REG); pcie 1835 drivers/net/can/kvaser_pciefd.c err = request_irq(pcie->pci->irq, kvaser_pciefd_irq_handler, pcie 1836 drivers/net/can/kvaser_pciefd.c IRQF_SHARED, KVASER_PCIEFD_DRV_NAME, pcie); pcie 1840 drivers/net/can/kvaser_pciefd.c err = kvaser_pciefd_reg_candev(pcie); pcie 1847 drivers/net/can/kvaser_pciefd.c free_irq(pcie->pci->irq, pcie); pcie 1850 drivers/net/can/kvaser_pciefd.c kvaser_pciefd_teardown_can_ctrls(pcie); pcie 1851 drivers/net/can/kvaser_pciefd.c iowrite32(0, pcie->reg_base + KVASER_PCIEFD_SRB_CTRL_REG); pcie 1855 drivers/net/can/kvaser_pciefd.c pci_iounmap(pdev, pcie->reg_base); pcie 1866 drivers/net/can/kvaser_pciefd.c static void kvaser_pciefd_remove_all_ctrls(struct kvaser_pciefd *pcie) pcie 1871 drivers/net/can/kvaser_pciefd.c for (i = 0; i < pcie->nr_channels; i++) { pcie 1872 drivers/net/can/kvaser_pciefd.c can = pcie->can[i]; pcie 1886 drivers/net/can/kvaser_pciefd.c struct kvaser_pciefd *pcie = pci_get_drvdata(pdev); pcie 1888 drivers/net/can/kvaser_pciefd.c kvaser_pciefd_remove_all_ctrls(pcie); pcie 1891 drivers/net/can/kvaser_pciefd.c iowrite32(0, pcie->reg_base + KVASER_PCIEFD_SRB_CTRL_REG); pcie 1893 drivers/net/can/kvaser_pciefd.c pcie->reg_base + KVASER_PCIEFD_IRQ_REG); pcie 1894 drivers/net/can/kvaser_pciefd.c iowrite32(0, pcie->reg_base + KVASER_PCIEFD_IEN_REG); pcie 1896 drivers/net/can/kvaser_pciefd.c free_irq(pcie->pci->irq, pcie); pcie 1899 drivers/net/can/kvaser_pciefd.c pci_iounmap(pdev, pcie->reg_base); pcie 748 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c ldst_cmd.u.pcie.select_naccess = FW_LDST_CMD_NACCESS_V(1); pcie 749 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c ldst_cmd.u.pcie.ctrl_to_fn = pcie 751 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c ldst_cmd.u.pcie.r = reg; pcie 759 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c val = be32_to_cpu(ldst_cmd.u.pcie.data[0]); pcie 960 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h } pcie; pcie 4288 drivers/net/ethernet/emulex/benet/be_cmds.c struct be_pcie_res_desc *pcie; pcie 4294 drivers/net/ethernet/emulex/benet/be_cmds.c pcie = (struct be_pcie_res_desc *)hdr; pcie 4295 drivers/net/ethernet/emulex/benet/be_cmds.c if (pcie->pf_num == pf_num) pcie 4296 drivers/net/ethernet/emulex/benet/be_cmds.c return pcie; pcie 4410 drivers/net/ethernet/emulex/benet/be_cmds.c struct be_pcie_res_desc *pcie = NULL; pcie 4417 drivers/net/ethernet/emulex/benet/be_cmds.c pcie = (struct be_pcie_res_desc *)hdr; pcie 4418 drivers/net/ethernet/emulex/benet/be_cmds.c if (pcie->pf_state && (pcie->pf_type == MISSION_NIC || pcie 4419 drivers/net/ethernet/emulex/benet/be_cmds.c pcie->pf_type == MISSION_RDMA)) { pcie 4420 drivers/net/ethernet/emulex/benet/be_cmds.c nic_pf_nums[nic_pf_count++] = pcie->pf_num; pcie 4439 drivers/net/ethernet/emulex/benet/be_cmds.c struct be_pcie_res_desc *pcie; pcie 4491 drivers/net/ethernet/emulex/benet/be_cmds.c pcie = be_get_pcie_desc(resp->func_param, pcie 4494 drivers/net/ethernet/emulex/benet/be_cmds.c port_res->max_vfs += le16_to_cpu(pcie->num_vfs); pcie 4500 drivers/net/ethernet/emulex/benet/be_cmds.c pcie = be_get_pcie_desc(resp->func_param, desc_count, pcie 4502 drivers/net/ethernet/emulex/benet/be_cmds.c if (pcie) pcie 4503 drivers/net/ethernet/emulex/benet/be_cmds.c res->max_vfs = le16_to_cpu(pcie->num_vfs); pcie 4585 drivers/net/ethernet/emulex/benet/be_cmds.c static void be_reset_pcie_desc(struct be_pcie_res_desc *pcie) pcie 4587 drivers/net/ethernet/emulex/benet/be_cmds.c memset(pcie, 0, sizeof(*pcie)); pcie 4588 drivers/net/ethernet/emulex/benet/be_cmds.c pcie->sriov_state = 0xFF; pcie 4589 drivers/net/ethernet/emulex/benet/be_cmds.c pcie->pf_state = 0xFF; pcie 4590 drivers/net/ethernet/emulex/benet/be_cmds.c pcie->pf_type = 0xFF; pcie 4591 drivers/net/ethernet/emulex/benet/be_cmds.c pcie->num_vfs = 0xFFFF; pcie 4633 drivers/net/ethernet/emulex/benet/be_cmds.c struct be_pcie_res_desc pcie; pcie 4638 drivers/net/ethernet/emulex/benet/be_cmds.c be_reset_pcie_desc(&desc.pcie); pcie 4639 drivers/net/ethernet/emulex/benet/be_cmds.c desc.pcie.hdr.desc_type = PCIE_RESOURCE_DESC_TYPE_V1; pcie 4640 drivers/net/ethernet/emulex/benet/be_cmds.c desc.pcie.hdr.desc_len = RESOURCE_DESC_SIZE_V1; pcie 4641 drivers/net/ethernet/emulex/benet/be_cmds.c desc.pcie.flags = BIT(IMM_SHIFT) | BIT(NOSV_SHIFT); pcie 4642 drivers/net/ethernet/emulex/benet/be_cmds.c desc.pcie.pf_num = adapter->pdev->devfn; pcie 4643 drivers/net/ethernet/emulex/benet/be_cmds.c desc.pcie.sriov_state = num_vfs ? 1 : 0; pcie 4644 drivers/net/ethernet/emulex/benet/be_cmds.c desc.pcie.num_vfs = cpu_to_le16(num_vfs); pcie 956 drivers/net/ethernet/mellanox/mlx5/core/en_stats.c MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters, pcie 962 drivers/net/ethernet/mellanox/mlx5/core/en_stats.c MLX5E_READ_CTR64_BE(&priv->stats.pcie.pcie_perf_counters, pcie 968 drivers/net/ethernet/mellanox/mlx5/core/en_stats.c MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters, pcie 975 drivers/net/ethernet/mellanox/mlx5/core/en_stats.c struct mlx5e_pcie_stats *pcie_stats = &priv->stats.pcie; pcie 322 drivers/net/ethernet/mellanox/mlx5/core/en_stats.h struct mlx5e_pcie_stats pcie; pcie 140 drivers/net/wireless/broadcom/brcm80211/brcmfmac/bus.h struct brcmf_pciedev *pcie; pcie 1373 drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c struct brcmf_pciedev *buspub = bus_if->bus_priv.pcie; pcie 1384 drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c struct brcmf_pciedev *buspub = bus_if->bus_priv.pcie; pcie 1394 drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c struct brcmf_pciedev *buspub = bus_if->bus_priv.pcie; pcie 1425 drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c struct brcmf_pciedev *buspub = bus_if->bus_priv.pcie; pcie 1766 drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c pcie_bus_dev = bus->bus_priv.pcie; pcie 1925 drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c bus->bus_priv.pcie = pcie_bus_dev; pcie 1977 drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c devinfo = bus->bus_priv.pcie->devinfo; pcie 1986 drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c kfree(bus->bus_priv.pcie); pcie 2018 drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c devinfo = bus->bus_priv.pcie->devinfo; pcie 2049 drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c devinfo = bus->bus_priv.pcie->devinfo; pcie 124 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 247 drivers/net/wireless/marvell/mwifiex/pcie.c card->pcie.reg = data->reg; pcie 248 drivers/net/wireless/marvell/mwifiex/pcie.c card->pcie.blksz_fw_dl = data->blksz_fw_dl; pcie 249 drivers/net/wireless/marvell/mwifiex/pcie.c card->pcie.tx_buf_size = data->tx_buf_size; pcie 250 drivers/net/wireless/marvell/mwifiex/pcie.c card->pcie.can_dump_fw = data->can_dump_fw; pcie 251 drivers/net/wireless/marvell/mwifiex/pcie.c card->pcie.mem_type_mapping_tbl = data->mem_type_mapping_tbl; pcie 252 drivers/net/wireless/marvell/mwifiex/pcie.c card->pcie.num_mem_types = data->num_mem_types; pcie 253 drivers/net/wireless/marvell/mwifiex/pcie.c card->pcie.can_ext_scan = data->can_ext_scan; pcie 293 drivers/net/wireless/marvell/mwifiex/pcie.c reg = card->pcie.reg; pcie 492 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 583 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 613 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 721 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 760 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 822 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 869 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 892 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 937 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 960 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 1001 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 1154 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 1249 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 1379 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 1521 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 1585 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 1604 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 1722 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 1837 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 1931 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 2116 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 2214 drivers/net/wireless/marvell/mwifiex/pcie.c tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) / pcie 2215 drivers/net/wireless/marvell/mwifiex/pcie.c card->pcie.blksz_fw_dl; pcie 2222 drivers/net/wireless/marvell/mwifiex/pcie.c skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl); pcie 2282 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 2335 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 2581 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 2620 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 2661 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *creg = card->pcie.reg; pcie 2669 drivers/net/wireless/marvell/mwifiex/pcie.c if (!card->pcie.can_dump_fw) pcie 2845 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 2900 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 2994 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 3025 drivers/net/wireless/marvell/mwifiex/pcie.c if (card->pcie.reg->msix_support) { pcie 3143 drivers/net/wireless/marvell/mwifiex/pcie.c adapter->tx_buf_size = card->pcie.tx_buf_size; pcie 3144 drivers/net/wireless/marvell/mwifiex/pcie.c adapter->mem_type_mapping_tbl = card->pcie.mem_type_mapping_tbl; pcie 3145 drivers/net/wireless/marvell/mwifiex/pcie.c adapter->num_mem_types = card->pcie.num_mem_types; pcie 3146 drivers/net/wireless/marvell/mwifiex/pcie.c adapter->ext_scan = card->pcie.can_ext_scan; pcie 3197 drivers/net/wireless/marvell/mwifiex/pcie.c adapter->tx_buf_size = card->pcie.tx_buf_size; pcie 3208 drivers/net/wireless/marvell/mwifiex/pcie.c const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 351 drivers/net/wireless/marvell/mwifiex/pcie.h struct mwifiex_pcie_device pcie; pcie 399 drivers/net/wireless/marvell/mwifiex/pcie.h const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 425 drivers/net/wireless/marvell/mwifiex/pcie.h const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; pcie 106 drivers/pci/controller/dwc/pci-dra7xx.c static inline u32 dra7xx_pcie_readl(struct dra7xx_pcie *pcie, u32 offset) pcie 108 drivers/pci/controller/dwc/pci-dra7xx.c return readl(pcie->base + offset); pcie 111 drivers/pci/controller/dwc/pci-dra7xx.c static inline void dra7xx_pcie_writel(struct dra7xx_pcie *pcie, u32 offset, pcie 114 drivers/pci/controller/dwc/pci-dra7xx.c writel(value, pcie->base + offset); pcie 70 drivers/pci/controller/dwc/pci-imx6.c struct clk *pcie; pcie 523 drivers/pci/controller/dwc/pci-imx6.c ret = clk_prepare_enable(imx6_pcie->pcie); pcie 592 drivers/pci/controller/dwc/pci-imx6.c clk_disable_unprepare(imx6_pcie->pcie); pcie 949 drivers/pci/controller/dwc/pci-imx6.c clk_disable_unprepare(imx6_pcie->pcie); pcie 1089 drivers/pci/controller/dwc/pci-imx6.c imx6_pcie->pcie = devm_clk_get(dev, "pcie"); pcie 1090 drivers/pci/controller/dwc/pci-imx6.c if (IS_ERR(imx6_pcie->pcie)) { pcie 1092 drivers/pci/controller/dwc/pci-imx6.c return PTR_ERR(imx6_pcie->pcie); pcie 89 drivers/pci/controller/dwc/pci-layerscape-ep.c static int __init ls_add_pcie_ep(struct ls_pcie_ep *pcie, pcie 92 drivers/pci/controller/dwc/pci-layerscape-ep.c struct dw_pcie *pci = pcie->pci; pcie 121 drivers/pci/controller/dwc/pci-layerscape-ep.c struct ls_pcie_ep *pcie; pcie 125 drivers/pci/controller/dwc/pci-layerscape-ep.c pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); pcie 126 drivers/pci/controller/dwc/pci-layerscape-ep.c if (!pcie) pcie 141 drivers/pci/controller/dwc/pci-layerscape-ep.c pcie->pci = pci; pcie 143 drivers/pci/controller/dwc/pci-layerscape-ep.c platform_set_drvdata(pdev, pcie); pcie 145 drivers/pci/controller/dwc/pci-layerscape-ep.c ret = ls_add_pcie_ep(pcie, pdev); pcie 56 drivers/pci/controller/dwc/pci-layerscape.c static bool ls_pcie_is_bridge(struct ls_pcie *pcie) pcie 58 drivers/pci/controller/dwc/pci-layerscape.c struct dw_pcie *pci = pcie->pci; pcie 68 drivers/pci/controller/dwc/pci-layerscape.c static void ls_pcie_clear_multifunction(struct ls_pcie *pcie) pcie 70 drivers/pci/controller/dwc/pci-layerscape.c struct dw_pcie *pci = pcie->pci; pcie 76 drivers/pci/controller/dwc/pci-layerscape.c static void ls_pcie_drop_msg_tlp(struct ls_pcie *pcie) pcie 79 drivers/pci/controller/dwc/pci-layerscape.c struct dw_pcie *pci = pcie->pci; pcie 86 drivers/pci/controller/dwc/pci-layerscape.c static void ls_pcie_disable_outbound_atus(struct ls_pcie *pcie) pcie 91 drivers/pci/controller/dwc/pci-layerscape.c dw_pcie_disable_atu(pcie->pci, i, DW_PCIE_REGION_OUTBOUND); pcie 97 drivers/pci/controller/dwc/pci-layerscape.c struct ls_pcie *pcie = to_ls_pcie(pci); pcie 99 drivers/pci/controller/dwc/pci-layerscape.c if (!pcie->scfg) pcie 102 drivers/pci/controller/dwc/pci-layerscape.c regmap_read(pcie->scfg, SCFG_PEXMSCPORTSR(pcie->index), &state); pcie 113 drivers/pci/controller/dwc/pci-layerscape.c struct ls_pcie *pcie = to_ls_pcie(pci); pcie 116 drivers/pci/controller/dwc/pci-layerscape.c state = (ioread32(pcie->lut + pcie->drvdata->lut_dbg) >> pcie 117 drivers/pci/controller/dwc/pci-layerscape.c pcie->drvdata->ltssm_shift) & pcie 127 drivers/pci/controller/dwc/pci-layerscape.c static void ls_pcie_fix_error_response(struct ls_pcie *pcie) pcie 129 drivers/pci/controller/dwc/pci-layerscape.c struct dw_pcie *pci = pcie->pci; pcie 137 drivers/pci/controller/dwc/pci-layerscape.c struct ls_pcie *pcie = to_ls_pcie(pci); pcie 144 drivers/pci/controller/dwc/pci-layerscape.c ls_pcie_disable_outbound_atus(pcie); pcie 145 drivers/pci/controller/dwc/pci-layerscape.c ls_pcie_fix_error_response(pcie); pcie 148 drivers/pci/controller/dwc/pci-layerscape.c ls_pcie_clear_multifunction(pcie); pcie 151 drivers/pci/controller/dwc/pci-layerscape.c ls_pcie_drop_msg_tlp(pcie); pcie 161 drivers/pci/controller/dwc/pci-layerscape.c struct ls_pcie *pcie = to_ls_pcie(pci); pcie 166 drivers/pci/controller/dwc/pci-layerscape.c pcie->scfg = syscon_regmap_lookup_by_phandle(dev->of_node, pcie 168 drivers/pci/controller/dwc/pci-layerscape.c if (IS_ERR(pcie->scfg)) { pcie 169 drivers/pci/controller/dwc/pci-layerscape.c ret = PTR_ERR(pcie->scfg); pcie 171 drivers/pci/controller/dwc/pci-layerscape.c pcie->scfg = NULL; pcie 177 drivers/pci/controller/dwc/pci-layerscape.c pcie->scfg = NULL; pcie 180 drivers/pci/controller/dwc/pci-layerscape.c pcie->index = index[1]; pcie 275 drivers/pci/controller/dwc/pci-layerscape.c static int __init ls_add_pcie_port(struct ls_pcie *pcie) pcie 277 drivers/pci/controller/dwc/pci-layerscape.c struct dw_pcie *pci = pcie->pci; pcie 282 drivers/pci/controller/dwc/pci-layerscape.c pp->ops = pcie->drvdata->ops; pcie 297 drivers/pci/controller/dwc/pci-layerscape.c struct ls_pcie *pcie; pcie 301 drivers/pci/controller/dwc/pci-layerscape.c pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); pcie 302 drivers/pci/controller/dwc/pci-layerscape.c if (!pcie) pcie 309 drivers/pci/controller/dwc/pci-layerscape.c pcie->drvdata = of_device_get_match_data(dev); pcie 312 drivers/pci/controller/dwc/pci-layerscape.c pci->ops = pcie->drvdata->dw_pcie_ops; pcie 314 drivers/pci/controller/dwc/pci-layerscape.c pcie->pci = pci; pcie 321 drivers/pci/controller/dwc/pci-layerscape.c pcie->lut = pci->dbi_base + pcie->drvdata->lut_offset; pcie 323 drivers/pci/controller/dwc/pci-layerscape.c if (!ls_pcie_is_bridge(pcie)) pcie 326 drivers/pci/controller/dwc/pci-layerscape.c platform_set_drvdata(pdev, pcie); pcie 328 drivers/pci/controller/dwc/pci-layerscape.c ret = ls_add_pcie_port(pcie); pcie 26 drivers/pci/controller/dwc/pcie-al.c struct al_pcie_acpi *pcie = cfg->priv; pcie 27 drivers/pci/controller/dwc/pcie-al.c void __iomem *dbi_base = pcie->dbi_base; pcie 150 drivers/pci/controller/dwc/pcie-al.c static inline u32 al_pcie_controller_readl(struct al_pcie *pcie, u32 offset) pcie 152 drivers/pci/controller/dwc/pcie-al.c return readl_relaxed(pcie->controller_base + offset); pcie 155 drivers/pci/controller/dwc/pcie-al.c static inline void al_pcie_controller_writel(struct al_pcie *pcie, u32 offset, pcie 158 drivers/pci/controller/dwc/pcie-al.c writel_relaxed(val, pcie->controller_base + offset); pcie 161 drivers/pci/controller/dwc/pcie-al.c static int al_pcie_rev_id_get(struct al_pcie *pcie, unsigned int *rev_id) pcie 166 drivers/pci/controller/dwc/pcie-al.c dev_rev_id_val = al_pcie_controller_readl(pcie, AXI_BASE_OFFSET + pcie 182 drivers/pci/controller/dwc/pcie-al.c dev_err(pcie->dev, "Unsupported dev_id_val (0x%x)\n", pcie 187 drivers/pci/controller/dwc/pcie-al.c dev_dbg(pcie->dev, "dev_id_val: 0x%x\n", dev_id_val); pcie 192 drivers/pci/controller/dwc/pcie-al.c static int al_pcie_reg_offsets_set(struct al_pcie *pcie) pcie 194 drivers/pci/controller/dwc/pcie-al.c switch (pcie->controller_rev_id) { pcie 196 drivers/pci/controller/dwc/pcie-al.c pcie->reg_offsets.ob_ctrl = OB_CTRL_REV1_2_OFFSET; pcie 200 drivers/pci/controller/dwc/pcie-al.c pcie->reg_offsets.ob_ctrl = OB_CTRL_REV3_5_OFFSET; pcie 203 drivers/pci/controller/dwc/pcie-al.c dev_err(pcie->dev, "Unsupported controller rev_id: 0x%x\n", pcie 204 drivers/pci/controller/dwc/pcie-al.c pcie->controller_rev_id); pcie 211 drivers/pci/controller/dwc/pcie-al.c static inline void al_pcie_target_bus_set(struct al_pcie *pcie, pcie 220 drivers/pci/controller/dwc/pcie-al.c al_pcie_controller_writel(pcie, AXI_BASE_OFFSET + pcie 221 drivers/pci/controller/dwc/pcie-al.c pcie->reg_offsets.ob_ctrl + CFG_TARGET_BUS, pcie 225 drivers/pci/controller/dwc/pcie-al.c static void __iomem *al_pcie_conf_addr_map(struct al_pcie *pcie, pcie 229 drivers/pci/controller/dwc/pcie-al.c struct al_pcie_target_bus_cfg *target_bus_cfg = &pcie->target_bus_cfg; pcie 232 drivers/pci/controller/dwc/pcie-al.c struct pcie_port *pp = &pcie->pci->pp; pcie 240 drivers/pci/controller/dwc/pcie-al.c dev_dbg(pcie->pci->dev, "Changing target bus busnum val from 0x%x to 0x%x\n", pcie 243 drivers/pci/controller/dwc/pcie-al.c al_pcie_target_bus_set(pcie, pcie 256 drivers/pci/controller/dwc/pcie-al.c struct al_pcie *pcie = to_al_pcie(pci); pcie 261 drivers/pci/controller/dwc/pcie-al.c pci_addr = al_pcie_conf_addr_map(pcie, busnr, devfn); pcie 278 drivers/pci/controller/dwc/pcie-al.c struct al_pcie *pcie = to_al_pcie(pci); pcie 283 drivers/pci/controller/dwc/pcie-al.c pci_addr = al_pcie_conf_addr_map(pcie, busnr, devfn); pcie 295 drivers/pci/controller/dwc/pcie-al.c static void al_pcie_config_prepare(struct al_pcie *pcie) pcie 298 drivers/pci/controller/dwc/pcie-al.c struct pcie_port *pp = &pcie->pci->pp; pcie 306 drivers/pci/controller/dwc/pcie-al.c target_bus_cfg = &pcie->target_bus_cfg; pcie 308 drivers/pci/controller/dwc/pcie-al.c ecam_bus_mask = (pcie->ecam_size >> 20) - 1; pcie 310 drivers/pci/controller/dwc/pcie-al.c dev_warn(pcie->dev, "ECAM window size is larger than 256MB. Cutting off at 256\n"); pcie 320 drivers/pci/controller/dwc/pcie-al.c al_pcie_target_bus_set(pcie, target_bus_cfg->reg_val, pcie 327 drivers/pci/controller/dwc/pcie-al.c cfg_control_offset = AXI_BASE_OFFSET + pcie->reg_offsets.ob_ctrl + pcie 330 drivers/pci/controller/dwc/pcie-al.c cfg_control = al_pcie_controller_readl(pcie, cfg_control_offset); pcie 338 drivers/pci/controller/dwc/pcie-al.c al_pcie_controller_writel(pcie, cfg_control_offset, reg); pcie 344 drivers/pci/controller/dwc/pcie-al.c struct al_pcie *pcie = to_al_pcie(pci); pcie 347 drivers/pci/controller/dwc/pcie-al.c rc = al_pcie_rev_id_get(pcie, &pcie->controller_rev_id); pcie 351 drivers/pci/controller/dwc/pcie-al.c rc = al_pcie_reg_offsets_set(pcie); pcie 355 drivers/pci/controller/dwc/pcie-al.c al_pcie_config_prepare(pcie); pcie 74 drivers/pci/controller/dwc/pcie-armada8k.c static void armada8k_pcie_disable_phys(struct armada8k_pcie *pcie) pcie 79 drivers/pci/controller/dwc/pcie-armada8k.c phy_power_off(pcie->phy[i]); pcie 80 drivers/pci/controller/dwc/pcie-armada8k.c phy_exit(pcie->phy[i]); pcie 84 drivers/pci/controller/dwc/pcie-armada8k.c static int armada8k_pcie_enable_phys(struct armada8k_pcie *pcie) pcie 90 drivers/pci/controller/dwc/pcie-armada8k.c ret = phy_init(pcie->phy[i]); pcie 94 drivers/pci/controller/dwc/pcie-armada8k.c ret = phy_set_mode_ext(pcie->phy[i], PHY_MODE_PCIE, pcie 95 drivers/pci/controller/dwc/pcie-armada8k.c pcie->phy_count); pcie 97 drivers/pci/controller/dwc/pcie-armada8k.c phy_exit(pcie->phy[i]); pcie 101 drivers/pci/controller/dwc/pcie-armada8k.c ret = phy_power_on(pcie->phy[i]); pcie 103 drivers/pci/controller/dwc/pcie-armada8k.c phy_exit(pcie->phy[i]); pcie 111 drivers/pci/controller/dwc/pcie-armada8k.c static int armada8k_pcie_setup_phys(struct armada8k_pcie *pcie) pcie 113 drivers/pci/controller/dwc/pcie-armada8k.c struct dw_pcie *pci = pcie->pci; pcie 120 drivers/pci/controller/dwc/pcie-armada8k.c pcie->phy[i] = devm_of_phy_get_by_index(dev, node, i); pcie 121 drivers/pci/controller/dwc/pcie-armada8k.c if (IS_ERR(pcie->phy[i])) { pcie 122 drivers/pci/controller/dwc/pcie-armada8k.c if (PTR_ERR(pcie->phy[i]) != -ENODEV) pcie 123 drivers/pci/controller/dwc/pcie-armada8k.c return PTR_ERR(pcie->phy[i]); pcie 125 drivers/pci/controller/dwc/pcie-armada8k.c pcie->phy[i] = NULL; pcie 129 drivers/pci/controller/dwc/pcie-armada8k.c pcie->phy_count++; pcie 133 drivers/pci/controller/dwc/pcie-armada8k.c if (!pcie->phy_count) pcie 136 drivers/pci/controller/dwc/pcie-armada8k.c ret = armada8k_pcie_enable_phys(pcie); pcie 157 drivers/pci/controller/dwc/pcie-armada8k.c static void armada8k_pcie_establish_link(struct armada8k_pcie *pcie) pcie 159 drivers/pci/controller/dwc/pcie-armada8k.c struct dw_pcie *pci = pcie->pci; pcie 211 drivers/pci/controller/dwc/pcie-armada8k.c struct armada8k_pcie *pcie = to_armada8k_pcie(pci); pcie 214 drivers/pci/controller/dwc/pcie-armada8k.c armada8k_pcie_establish_link(pcie); pcie 221 drivers/pci/controller/dwc/pcie-armada8k.c struct armada8k_pcie *pcie = arg; pcie 222 drivers/pci/controller/dwc/pcie-armada8k.c struct dw_pcie *pci = pcie->pci; pcie 240 drivers/pci/controller/dwc/pcie-armada8k.c static int armada8k_add_pcie_port(struct armada8k_pcie *pcie, pcie 243 drivers/pci/controller/dwc/pcie-armada8k.c struct dw_pcie *pci = pcie->pci; pcie 257 drivers/pci/controller/dwc/pcie-armada8k.c IRQF_SHARED, "armada8k-pcie", pcie); pcie 279 drivers/pci/controller/dwc/pcie-armada8k.c struct armada8k_pcie *pcie; pcie 284 drivers/pci/controller/dwc/pcie-armada8k.c pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); pcie 285 drivers/pci/controller/dwc/pcie-armada8k.c if (!pcie) pcie 295 drivers/pci/controller/dwc/pcie-armada8k.c pcie->pci = pci; pcie 297 drivers/pci/controller/dwc/pcie-armada8k.c pcie->clk = devm_clk_get(dev, NULL); pcie 298 drivers/pci/controller/dwc/pcie-armada8k.c if (IS_ERR(pcie->clk)) pcie 299 drivers/pci/controller/dwc/pcie-armada8k.c return PTR_ERR(pcie->clk); pcie 301 drivers/pci/controller/dwc/pcie-armada8k.c ret = clk_prepare_enable(pcie->clk); pcie 305 drivers/pci/controller/dwc/pcie-armada8k.c pcie->clk_reg = devm_clk_get(dev, "reg"); pcie 306 drivers/pci/controller/dwc/pcie-armada8k.c if (pcie->clk_reg == ERR_PTR(-EPROBE_DEFER)) { pcie 310 drivers/pci/controller/dwc/pcie-armada8k.c if (!IS_ERR(pcie->clk_reg)) { pcie 311 drivers/pci/controller/dwc/pcie-armada8k.c ret = clk_prepare_enable(pcie->clk_reg); pcie 325 drivers/pci/controller/dwc/pcie-armada8k.c ret = armada8k_pcie_setup_phys(pcie); pcie 329 drivers/pci/controller/dwc/pcie-armada8k.c platform_set_drvdata(pdev, pcie); pcie 331 drivers/pci/controller/dwc/pcie-armada8k.c ret = armada8k_add_pcie_port(pcie, pdev); pcie 338 drivers/pci/controller/dwc/pcie-armada8k.c armada8k_pcie_disable_phys(pcie); pcie 340 drivers/pci/controller/dwc/pcie-armada8k.c clk_disable_unprepare(pcie->clk_reg); pcie 342 drivers/pci/controller/dwc/pcie-armada8k.c clk_disable_unprepare(pcie->clk); pcie 230 drivers/pci/controller/dwc/pcie-designware.h u64 (*cpu_addr_fixup)(struct dw_pcie *pcie, u64 cpu_addr); pcie 231 drivers/pci/controller/dwc/pcie-designware.h u32 (*read_dbi)(struct dw_pcie *pcie, void __iomem *base, u32 reg, pcie 233 drivers/pci/controller/dwc/pcie-designware.h void (*write_dbi)(struct dw_pcie *pcie, void __iomem *base, u32 reg, pcie 235 drivers/pci/controller/dwc/pcie-designware.h u32 (*read_dbi2)(struct dw_pcie *pcie, void __iomem *base, u32 reg, pcie 237 drivers/pci/controller/dwc/pcie-designware.h void (*write_dbi2)(struct dw_pcie *pcie, void __iomem *base, u32 reg, pcie 239 drivers/pci/controller/dwc/pcie-designware.h int (*link_up)(struct dw_pcie *pcie); pcie 240 drivers/pci/controller/dwc/pcie-designware.h int (*start_link)(struct dw_pcie *pcie); pcie 241 drivers/pci/controller/dwc/pcie-designware.h void (*stop_link)(struct dw_pcie *pcie); pcie 153 drivers/pci/controller/dwc/pcie-qcom.c int (*get_resources)(struct qcom_pcie *pcie); pcie 154 drivers/pci/controller/dwc/pcie-qcom.c int (*init)(struct qcom_pcie *pcie); pcie 155 drivers/pci/controller/dwc/pcie-qcom.c int (*post_init)(struct qcom_pcie *pcie); pcie 156 drivers/pci/controller/dwc/pcie-qcom.c void (*deinit)(struct qcom_pcie *pcie); pcie 157 drivers/pci/controller/dwc/pcie-qcom.c void (*post_deinit)(struct qcom_pcie *pcie); pcie 158 drivers/pci/controller/dwc/pcie-qcom.c void (*ltssm_enable)(struct qcom_pcie *pcie); pcie 173 drivers/pci/controller/dwc/pcie-qcom.c static void qcom_ep_reset_assert(struct qcom_pcie *pcie) pcie 175 drivers/pci/controller/dwc/pcie-qcom.c gpiod_set_value_cansleep(pcie->reset, 1); pcie 179 drivers/pci/controller/dwc/pcie-qcom.c static void qcom_ep_reset_deassert(struct qcom_pcie *pcie) pcie 183 drivers/pci/controller/dwc/pcie-qcom.c gpiod_set_value_cansleep(pcie->reset, 0); pcie 187 drivers/pci/controller/dwc/pcie-qcom.c static int qcom_pcie_establish_link(struct qcom_pcie *pcie) pcie 189 drivers/pci/controller/dwc/pcie-qcom.c struct dw_pcie *pci = pcie->pci; pcie 195 drivers/pci/controller/dwc/pcie-qcom.c if (pcie->ops->ltssm_enable) pcie 196 drivers/pci/controller/dwc/pcie-qcom.c pcie->ops->ltssm_enable(pcie); pcie 201 drivers/pci/controller/dwc/pcie-qcom.c static void qcom_pcie_2_1_0_ltssm_enable(struct qcom_pcie *pcie) pcie 206 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->elbi + PCIE20_ELBI_SYS_CTRL); pcie 208 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->elbi + PCIE20_ELBI_SYS_CTRL); pcie 211 drivers/pci/controller/dwc/pcie-qcom.c static int qcom_pcie_get_resources_2_1_0(struct qcom_pcie *pcie) pcie 213 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0; pcie 214 drivers/pci/controller/dwc/pcie-qcom.c struct dw_pcie *pci = pcie->pci; pcie 258 drivers/pci/controller/dwc/pcie-qcom.c static void qcom_pcie_deinit_2_1_0(struct qcom_pcie *pcie) pcie 260 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0; pcie 273 drivers/pci/controller/dwc/pcie-qcom.c static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie) pcie 275 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0; pcie 276 drivers/pci/controller/dwc/pcie-qcom.c struct dw_pcie *pci = pcie->pci; pcie 318 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); pcie 320 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL); pcie 323 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_PHY_REFCLK); pcie 325 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK); pcie 375 drivers/pci/controller/dwc/pcie-qcom.c static int qcom_pcie_get_resources_1_0_0(struct qcom_pcie *pcie) pcie 377 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie_resources_1_0_0 *res = &pcie->res.v1_0_0; pcie 378 drivers/pci/controller/dwc/pcie-qcom.c struct dw_pcie *pci = pcie->pci; pcie 405 drivers/pci/controller/dwc/pcie-qcom.c static void qcom_pcie_deinit_1_0_0(struct qcom_pcie *pcie) pcie 407 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie_resources_1_0_0 *res = &pcie->res.v1_0_0; pcie 417 drivers/pci/controller/dwc/pcie-qcom.c static int qcom_pcie_init_1_0_0(struct qcom_pcie *pcie) pcie 419 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie_resources_1_0_0 *res = &pcie->res.v1_0_0; pcie 420 drivers/pci/controller/dwc/pcie-qcom.c struct dw_pcie *pci = pcie->pci; pcie 461 drivers/pci/controller/dwc/pcie-qcom.c writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR); pcie 464 drivers/pci/controller/dwc/pcie-qcom.c u32 val = readl(pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT); pcie 467 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT); pcie 485 drivers/pci/controller/dwc/pcie-qcom.c static void qcom_pcie_2_3_2_ltssm_enable(struct qcom_pcie *pcie) pcie 490 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_LTSSM); pcie 492 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_LTSSM); pcie 495 drivers/pci/controller/dwc/pcie-qcom.c static int qcom_pcie_get_resources_2_3_2(struct qcom_pcie *pcie) pcie 497 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie_resources_2_3_2 *res = &pcie->res.v2_3_2; pcie 498 drivers/pci/controller/dwc/pcie-qcom.c struct dw_pcie *pci = pcie->pci; pcie 529 drivers/pci/controller/dwc/pcie-qcom.c static void qcom_pcie_deinit_2_3_2(struct qcom_pcie *pcie) pcie 531 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie_resources_2_3_2 *res = &pcie->res.v2_3_2; pcie 541 drivers/pci/controller/dwc/pcie-qcom.c static void qcom_pcie_post_deinit_2_3_2(struct qcom_pcie *pcie) pcie 543 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie_resources_2_3_2 *res = &pcie->res.v2_3_2; pcie 548 drivers/pci/controller/dwc/pcie-qcom.c static int qcom_pcie_init_2_3_2(struct qcom_pcie *pcie) pcie 550 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie_resources_2_3_2 *res = &pcie->res.v2_3_2; pcie 551 drivers/pci/controller/dwc/pcie-qcom.c struct dw_pcie *pci = pcie->pci; pcie 587 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); pcie 589 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL); pcie 592 drivers/pci/controller/dwc/pcie-qcom.c writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR); pcie 595 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_SYS_CTRL); pcie 597 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_SYS_CTRL); pcie 599 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL); pcie 601 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL); pcie 603 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2); pcie 605 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2); pcie 622 drivers/pci/controller/dwc/pcie-qcom.c static int qcom_pcie_post_init_2_3_2(struct qcom_pcie *pcie) pcie 624 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie_resources_2_3_2 *res = &pcie->res.v2_3_2; pcie 625 drivers/pci/controller/dwc/pcie-qcom.c struct dw_pcie *pci = pcie->pci; pcie 638 drivers/pci/controller/dwc/pcie-qcom.c static int qcom_pcie_get_resources_2_4_0(struct qcom_pcie *pcie) pcie 640 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie_resources_2_4_0 *res = &pcie->res.v2_4_0; pcie 641 drivers/pci/controller/dwc/pcie-qcom.c struct dw_pcie *pci = pcie->pci; pcie 721 drivers/pci/controller/dwc/pcie-qcom.c static void qcom_pcie_deinit_2_4_0(struct qcom_pcie *pcie) pcie 723 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie_resources_2_4_0 *res = &pcie->res.v2_4_0; pcie 737 drivers/pci/controller/dwc/pcie-qcom.c static int qcom_pcie_init_2_4_0(struct qcom_pcie *pcie) pcie 739 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie_resources_2_4_0 *res = &pcie->res.v2_4_0; pcie 740 drivers/pci/controller/dwc/pcie-qcom.c struct dw_pcie *pci = pcie->pci; pcie 868 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); pcie 870 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL); pcie 873 drivers/pci/controller/dwc/pcie-qcom.c writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR); pcie 876 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_SYS_CTRL); pcie 878 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_SYS_CTRL); pcie 880 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL); pcie 882 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL); pcie 884 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2); pcie 886 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2); pcie 911 drivers/pci/controller/dwc/pcie-qcom.c static int qcom_pcie_get_resources_2_3_3(struct qcom_pcie *pcie) pcie 913 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie_resources_2_3_3 *res = &pcie->res.v2_3_3; pcie 914 drivers/pci/controller/dwc/pcie-qcom.c struct dw_pcie *pci = pcie->pci; pcie 950 drivers/pci/controller/dwc/pcie-qcom.c static void qcom_pcie_deinit_2_3_3(struct qcom_pcie *pcie) pcie 952 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie_resources_2_3_3 *res = &pcie->res.v2_3_3; pcie 961 drivers/pci/controller/dwc/pcie-qcom.c static int qcom_pcie_init_2_3_3(struct qcom_pcie *pcie) pcie 963 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie_resources_2_3_3 *res = &pcie->res.v2_3_3; pcie 964 drivers/pci/controller/dwc/pcie-qcom.c struct dw_pcie *pci = pcie->pci; pcie 1025 drivers/pci/controller/dwc/pcie-qcom.c pcie->parf + PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE); pcie 1027 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); pcie 1029 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL); pcie 1031 drivers/pci/controller/dwc/pcie-qcom.c writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR); pcie 1036 drivers/pci/controller/dwc/pcie-qcom.c pcie->parf + PCIE20_PARF_SYS_CTRL); pcie 1037 drivers/pci/controller/dwc/pcie-qcom.c writel(0, pcie->parf + PCIE20_PARF_Q2A_FLUSH); pcie 1081 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie *pcie = to_qcom_pcie(pci); pcie 1084 drivers/pci/controller/dwc/pcie-qcom.c qcom_ep_reset_assert(pcie); pcie 1086 drivers/pci/controller/dwc/pcie-qcom.c ret = pcie->ops->init(pcie); pcie 1090 drivers/pci/controller/dwc/pcie-qcom.c ret = phy_power_on(pcie->phy); pcie 1094 drivers/pci/controller/dwc/pcie-qcom.c if (pcie->ops->post_init) { pcie 1095 drivers/pci/controller/dwc/pcie-qcom.c ret = pcie->ops->post_init(pcie); pcie 1105 drivers/pci/controller/dwc/pcie-qcom.c qcom_ep_reset_deassert(pcie); pcie 1107 drivers/pci/controller/dwc/pcie-qcom.c ret = qcom_pcie_establish_link(pcie); pcie 1113 drivers/pci/controller/dwc/pcie-qcom.c qcom_ep_reset_assert(pcie); pcie 1114 drivers/pci/controller/dwc/pcie-qcom.c if (pcie->ops->post_deinit) pcie 1115 drivers/pci/controller/dwc/pcie-qcom.c pcie->ops->post_deinit(pcie); pcie 1117 drivers/pci/controller/dwc/pcie-qcom.c phy_power_off(pcie->phy); pcie 1119 drivers/pci/controller/dwc/pcie-qcom.c pcie->ops->deinit(pcie); pcie 1180 drivers/pci/controller/dwc/pcie-qcom.c struct qcom_pcie *pcie; pcie 1183 drivers/pci/controller/dwc/pcie-qcom.c pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); pcie 1184 drivers/pci/controller/dwc/pcie-qcom.c if (!pcie) pcie 1202 drivers/pci/controller/dwc/pcie-qcom.c pcie->pci = pci; pcie 1204 drivers/pci/controller/dwc/pcie-qcom.c pcie->ops = of_device_get_match_data(dev); pcie 1206 drivers/pci/controller/dwc/pcie-qcom.c pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_HIGH); pcie 1207 drivers/pci/controller/dwc/pcie-qcom.c if (IS_ERR(pcie->reset)) { pcie 1208 drivers/pci/controller/dwc/pcie-qcom.c ret = PTR_ERR(pcie->reset); pcie 1213 drivers/pci/controller/dwc/pcie-qcom.c pcie->parf = devm_ioremap_resource(dev, res); pcie 1214 drivers/pci/controller/dwc/pcie-qcom.c if (IS_ERR(pcie->parf)) { pcie 1215 drivers/pci/controller/dwc/pcie-qcom.c ret = PTR_ERR(pcie->parf); pcie 1227 drivers/pci/controller/dwc/pcie-qcom.c pcie->elbi = devm_ioremap_resource(dev, res); pcie 1228 drivers/pci/controller/dwc/pcie-qcom.c if (IS_ERR(pcie->elbi)) { pcie 1229 drivers/pci/controller/dwc/pcie-qcom.c ret = PTR_ERR(pcie->elbi); pcie 1233 drivers/pci/controller/dwc/pcie-qcom.c pcie->phy = devm_phy_optional_get(dev, "pciephy"); pcie 1234 drivers/pci/controller/dwc/pcie-qcom.c if (IS_ERR(pcie->phy)) { pcie 1235 drivers/pci/controller/dwc/pcie-qcom.c ret = PTR_ERR(pcie->phy); pcie 1239 drivers/pci/controller/dwc/pcie-qcom.c ret = pcie->ops->get_resources(pcie); pcie 1253 drivers/pci/controller/dwc/pcie-qcom.c ret = phy_init(pcie->phy); pcie 1259 drivers/pci/controller/dwc/pcie-qcom.c platform_set_drvdata(pdev, pcie); pcie 295 drivers/pci/controller/dwc/pcie-tegra194.c static inline void appl_writel(struct tegra_pcie_dw *pcie, const u32 value, pcie 298 drivers/pci/controller/dwc/pcie-tegra194.c writel_relaxed(value, pcie->appl_base + reg); pcie 301 drivers/pci/controller/dwc/pcie-tegra194.c static inline u32 appl_readl(struct tegra_pcie_dw *pcie, const u32 reg) pcie 303 drivers/pci/controller/dwc/pcie-tegra194.c return readl_relaxed(pcie->appl_base + reg); pcie 313 drivers/pci/controller/dwc/pcie-tegra194.c struct tegra_pcie_dw *pcie = to_tegra_pcie(pci); pcie 322 drivers/pci/controller/dwc/pcie-tegra194.c val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKSTA); pcie 326 drivers/pci/controller/dwc/pcie-tegra194.c if (pcie->init_link_width > current_link_width) { pcie 328 drivers/pci/controller/dwc/pcie-tegra194.c val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + pcie 332 drivers/pci/controller/dwc/pcie-tegra194.c dw_pcie_writew_dbi(pci, pcie->pcie_cap_base + pcie 335 drivers/pci/controller/dwc/pcie-tegra194.c val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + pcie 338 drivers/pci/controller/dwc/pcie-tegra194.c dw_pcie_writew_dbi(pci, pcie->pcie_cap_base + pcie 344 drivers/pci/controller/dwc/pcie-tegra194.c static irqreturn_t tegra_pcie_rp_irq_handler(struct tegra_pcie_dw *pcie) pcie 346 drivers/pci/controller/dwc/pcie-tegra194.c struct dw_pcie *pci = &pcie->pci; pcie 351 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_INTR_STATUS_L0); pcie 353 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_INTR_STATUS_L1_0_0); pcie 355 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_INTR_STATUS_L1_0_0); pcie 358 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_CAR_RESET_OVRD); pcie 360 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_CAR_RESET_OVRD); pcie 362 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_CAR_RESET_OVRD); pcie 364 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_CAR_RESET_OVRD); pcie 373 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_INTR_STATUS_L1_8_0); pcie 375 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, pcie 381 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, pcie 385 drivers/pci/controller/dwc/pcie-tegra194.c val_w = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + pcie 392 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_INTR_STATUS_L0); pcie 394 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_INTR_STATUS_L1_18); pcie 418 drivers/pci/controller/dwc/pcie-tegra194.c struct tegra_pcie_dw *pcie = arg; pcie 420 drivers/pci/controller/dwc/pcie-tegra194.c return tegra_pcie_rp_irq_handler(pcie); pcie 460 drivers/pci/controller/dwc/pcie-tegra194.c static void disable_aspm_l11(struct tegra_pcie_dw *pcie) pcie 464 drivers/pci/controller/dwc/pcie-tegra194.c val = dw_pcie_readl_dbi(&pcie->pci, pcie->cfg_link_cap_l1sub); pcie 466 drivers/pci/controller/dwc/pcie-tegra194.c dw_pcie_writel_dbi(&pcie->pci, pcie->cfg_link_cap_l1sub, val); pcie 469 drivers/pci/controller/dwc/pcie-tegra194.c static void disable_aspm_l12(struct tegra_pcie_dw *pcie) pcie 473 drivers/pci/controller/dwc/pcie-tegra194.c val = dw_pcie_readl_dbi(&pcie->pci, pcie->cfg_link_cap_l1sub); pcie 475 drivers/pci/controller/dwc/pcie-tegra194.c dw_pcie_writel_dbi(&pcie->pci, pcie->cfg_link_cap_l1sub, val); pcie 478 drivers/pci/controller/dwc/pcie-tegra194.c static inline u32 event_counter_prog(struct tegra_pcie_dw *pcie, u32 event) pcie 482 drivers/pci/controller/dwc/pcie-tegra194.c val = dw_pcie_readl_dbi(&pcie->pci, event_cntr_ctrl_offset[pcie->cid]); pcie 487 drivers/pci/controller/dwc/pcie-tegra194.c dw_pcie_writel_dbi(&pcie->pci, event_cntr_ctrl_offset[pcie->cid], val); pcie 488 drivers/pci/controller/dwc/pcie-tegra194.c val = dw_pcie_readl_dbi(&pcie->pci, event_cntr_data_offset[pcie->cid]); pcie 495 drivers/pci/controller/dwc/pcie-tegra194.c struct tegra_pcie_dw *pcie = (struct tegra_pcie_dw *) pcie 500 drivers/pci/controller/dwc/pcie-tegra194.c event_counter_prog(pcie, EVENT_COUNTER_EVENT_Tx_L0S)); pcie 503 drivers/pci/controller/dwc/pcie-tegra194.c event_counter_prog(pcie, EVENT_COUNTER_EVENT_Rx_L0S)); pcie 506 drivers/pci/controller/dwc/pcie-tegra194.c event_counter_prog(pcie, EVENT_COUNTER_EVENT_L1)); pcie 509 drivers/pci/controller/dwc/pcie-tegra194.c event_counter_prog(pcie, EVENT_COUNTER_EVENT_L1_1)); pcie 512 drivers/pci/controller/dwc/pcie-tegra194.c event_counter_prog(pcie, EVENT_COUNTER_EVENT_L1_2)); pcie 515 drivers/pci/controller/dwc/pcie-tegra194.c dw_pcie_writel_dbi(&pcie->pci, event_cntr_ctrl_offset[pcie->cid], pcie 521 drivers/pci/controller/dwc/pcie-tegra194.c dw_pcie_writel_dbi(&pcie->pci, event_cntr_ctrl_offset[pcie->cid], val); pcie 526 drivers/pci/controller/dwc/pcie-tegra194.c static void init_host_aspm(struct tegra_pcie_dw *pcie) pcie 528 drivers/pci/controller/dwc/pcie-tegra194.c struct dw_pcie *pci = &pcie->pci; pcie 532 drivers/pci/controller/dwc/pcie-tegra194.c pcie->cfg_link_cap_l1sub = val + PCI_L1SS_CAP; pcie 537 drivers/pci/controller/dwc/pcie-tegra194.c dw_pcie_writel_dbi(pci, event_cntr_ctrl_offset[pcie->cid], val); pcie 540 drivers/pci/controller/dwc/pcie-tegra194.c val = dw_pcie_readl_dbi(pci, pcie->cfg_link_cap_l1sub); pcie 542 drivers/pci/controller/dwc/pcie-tegra194.c val |= (pcie->aspm_cmrt << 8); pcie 543 drivers/pci/controller/dwc/pcie-tegra194.c val |= (pcie->aspm_pwr_on_t << 19); pcie 544 drivers/pci/controller/dwc/pcie-tegra194.c dw_pcie_writel_dbi(pci, pcie->cfg_link_cap_l1sub, val); pcie 549 drivers/pci/controller/dwc/pcie-tegra194.c val |= (pcie->aspm_l0s_enter_lat << L0S_ENTRANCE_LAT_SHIFT); pcie 554 drivers/pci/controller/dwc/pcie-tegra194.c static int init_debugfs(struct tegra_pcie_dw *pcie) pcie 558 drivers/pci/controller/dwc/pcie-tegra194.c d = debugfs_create_devm_seqfile(pcie->dev, "aspm_state_cnt", pcie 559 drivers/pci/controller/dwc/pcie-tegra194.c pcie->debugfs, aspm_state_cnt); pcie 561 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, pcie 567 drivers/pci/controller/dwc/pcie-tegra194.c static inline void disable_aspm_l12(struct tegra_pcie_dw *pcie) { return; } pcie 568 drivers/pci/controller/dwc/pcie-tegra194.c static inline void disable_aspm_l11(struct tegra_pcie_dw *pcie) { return; } pcie 569 drivers/pci/controller/dwc/pcie-tegra194.c static inline void init_host_aspm(struct tegra_pcie_dw *pcie) { return; } pcie 570 drivers/pci/controller/dwc/pcie-tegra194.c static inline int init_debugfs(struct tegra_pcie_dw *pcie) { return 0; } pcie 576 drivers/pci/controller/dwc/pcie-tegra194.c struct tegra_pcie_dw *pcie = to_tegra_pcie(pci); pcie 580 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_INTR_EN_L0_0); pcie 582 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_INTR_EN_L0_0); pcie 584 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_INTR_EN_L1_0_0); pcie 586 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_INTR_EN_L1_0_0); pcie 588 drivers/pci/controller/dwc/pcie-tegra194.c if (pcie->enable_cdm_check) { pcie 589 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_INTR_EN_L0_0); pcie 591 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_INTR_EN_L0_0); pcie 593 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_INTR_EN_L1_18); pcie 596 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_INTR_EN_L1_18); pcie 599 drivers/pci/controller/dwc/pcie-tegra194.c val_w = dw_pcie_readw_dbi(&pcie->pci, pcie->pcie_cap_base + pcie 601 drivers/pci/controller/dwc/pcie-tegra194.c pcie->init_link_width = (val_w & PCI_EXP_LNKSTA_NLW) >> pcie 604 drivers/pci/controller/dwc/pcie-tegra194.c val_w = dw_pcie_readw_dbi(&pcie->pci, pcie->pcie_cap_base + pcie 607 drivers/pci/controller/dwc/pcie-tegra194.c dw_pcie_writew_dbi(&pcie->pci, pcie->pcie_cap_base + PCI_EXP_LNKCTL, pcie 614 drivers/pci/controller/dwc/pcie-tegra194.c struct tegra_pcie_dw *pcie = to_tegra_pcie(pci); pcie 618 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_INTR_EN_L0_0); pcie 621 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_INTR_EN_L0_0); pcie 623 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_INTR_EN_L1_8_0); pcie 629 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_INTR_EN_L1_8_0); pcie 635 drivers/pci/controller/dwc/pcie-tegra194.c struct tegra_pcie_dw *pcie = to_tegra_pcie(pci); pcie 641 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_INTR_EN_L0_0); pcie 644 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_INTR_EN_L0_0); pcie 650 drivers/pci/controller/dwc/pcie-tegra194.c struct tegra_pcie_dw *pcie = to_tegra_pcie(pci); pcie 653 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L0); pcie 654 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_0_0); pcie 655 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_1); pcie 656 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_2); pcie 657 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_3); pcie 658 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_6); pcie 659 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_7); pcie 660 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_8_0); pcie 661 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_9); pcie 662 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_10); pcie 663 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_11); pcie 664 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_13); pcie 665 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_14); pcie 666 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_15); pcie 667 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_17); pcie 675 drivers/pci/controller/dwc/pcie-tegra194.c static void config_gen3_gen4_eq_presets(struct tegra_pcie_dw *pcie) pcie 677 drivers/pci/controller/dwc/pcie-tegra194.c struct dw_pcie *pci = &pcie->pci; pcie 681 drivers/pci/controller/dwc/pcie-tegra194.c for (i = 0; i < pcie->num_lanes; i++) { pcie 733 drivers/pci/controller/dwc/pcie-tegra194.c struct tegra_pcie_dw *pcie = to_tegra_pcie(pci); pcie 766 drivers/pci/controller/dwc/pcie-tegra194.c if (pcie->max_speed && pcie->max_speed != -EINVAL) { pcie 767 drivers/pci/controller/dwc/pcie-tegra194.c val = dw_pcie_readl_dbi(pci, pcie->pcie_cap_base + pcie 770 drivers/pci/controller/dwc/pcie-tegra194.c val |= pcie->max_speed; pcie 771 drivers/pci/controller/dwc/pcie-tegra194.c dw_pcie_writel_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKCAP, pcie 776 drivers/pci/controller/dwc/pcie-tegra194.c val = dw_pcie_readl_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKCAP); pcie 778 drivers/pci/controller/dwc/pcie-tegra194.c val |= (pcie->num_lanes << PCI_EXP_LNKSTA_NLW_SHIFT); pcie 779 drivers/pci/controller/dwc/pcie-tegra194.c dw_pcie_writel_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKCAP, val); pcie 781 drivers/pci/controller/dwc/pcie-tegra194.c config_gen3_gen4_eq_presets(pcie); pcie 783 drivers/pci/controller/dwc/pcie-tegra194.c init_host_aspm(pcie); pcie 789 drivers/pci/controller/dwc/pcie-tegra194.c if (pcie->update_fc_fixup) { pcie 797 drivers/pci/controller/dwc/pcie-tegra194.c clk_set_rate(pcie->core_clk, GEN4_CORE_CLK_FREQ); pcie 800 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_PINMUX); pcie 802 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_PINMUX); pcie 807 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_CTRL); pcie 809 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_CTRL); pcie 812 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_PINMUX); pcie 814 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_PINMUX); pcie 822 drivers/pci/controller/dwc/pcie-tegra194.c struct tegra_pcie_dw *pcie = to_tegra_pcie(pci); pcie 836 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_DEBUG); pcie 839 drivers/pci/controller/dwc/pcie-tegra194.c tmp = appl_readl(pcie, APPL_LINK_STATUS); pcie 849 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_CTRL); pcie 851 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_CTRL); pcie 853 drivers/pci/controller/dwc/pcie-tegra194.c reset_control_assert(pcie->core_rst); pcie 854 drivers/pci/controller/dwc/pcie-tegra194.c reset_control_deassert(pcie->core_rst); pcie 867 drivers/pci/controller/dwc/pcie-tegra194.c speed = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKSTA) & pcie 869 drivers/pci/controller/dwc/pcie-tegra194.c clk_set_rate(pcie->core_clk, pcie_gen_freq[speed - 1]); pcie 878 drivers/pci/controller/dwc/pcie-tegra194.c struct tegra_pcie_dw *pcie = to_tegra_pcie(pci); pcie 879 drivers/pci/controller/dwc/pcie-tegra194.c u32 val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKSTA); pcie 900 drivers/pci/controller/dwc/pcie-tegra194.c static void tegra_pcie_disable_phy(struct tegra_pcie_dw *pcie) pcie 902 drivers/pci/controller/dwc/pcie-tegra194.c unsigned int phy_count = pcie->phy_count; pcie 905 drivers/pci/controller/dwc/pcie-tegra194.c phy_power_off(pcie->phys[phy_count]); pcie 906 drivers/pci/controller/dwc/pcie-tegra194.c phy_exit(pcie->phys[phy_count]); pcie 910 drivers/pci/controller/dwc/pcie-tegra194.c static int tegra_pcie_enable_phy(struct tegra_pcie_dw *pcie) pcie 915 drivers/pci/controller/dwc/pcie-tegra194.c for (i = 0; i < pcie->phy_count; i++) { pcie 916 drivers/pci/controller/dwc/pcie-tegra194.c ret = phy_init(pcie->phys[i]); pcie 920 drivers/pci/controller/dwc/pcie-tegra194.c ret = phy_power_on(pcie->phys[i]); pcie 929 drivers/pci/controller/dwc/pcie-tegra194.c phy_power_off(pcie->phys[i]); pcie 931 drivers/pci/controller/dwc/pcie-tegra194.c phy_exit(pcie->phys[i]); pcie 937 drivers/pci/controller/dwc/pcie-tegra194.c static int tegra_pcie_dw_parse_dt(struct tegra_pcie_dw *pcie) pcie 939 drivers/pci/controller/dwc/pcie-tegra194.c struct device_node *np = pcie->dev->of_node; pcie 942 drivers/pci/controller/dwc/pcie-tegra194.c ret = of_property_read_u32(np, "nvidia,aspm-cmrt-us", &pcie->aspm_cmrt); pcie 944 drivers/pci/controller/dwc/pcie-tegra194.c dev_info(pcie->dev, "Failed to read ASPM T_cmrt: %d\n", ret); pcie 949 drivers/pci/controller/dwc/pcie-tegra194.c &pcie->aspm_pwr_on_t); pcie 951 drivers/pci/controller/dwc/pcie-tegra194.c dev_info(pcie->dev, "Failed to read ASPM Power On time: %d\n", pcie 955 drivers/pci/controller/dwc/pcie-tegra194.c &pcie->aspm_l0s_enter_lat); pcie 957 drivers/pci/controller/dwc/pcie-tegra194.c dev_info(pcie->dev, pcie 960 drivers/pci/controller/dwc/pcie-tegra194.c ret = of_property_read_u32(np, "num-lanes", &pcie->num_lanes); pcie 962 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, "Failed to read num-lanes: %d\n", ret); pcie 966 drivers/pci/controller/dwc/pcie-tegra194.c pcie->max_speed = of_pci_get_max_link_speed(np); pcie 968 drivers/pci/controller/dwc/pcie-tegra194.c ret = of_property_read_u32_index(np, "nvidia,bpmp", 1, &pcie->cid); pcie 970 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, "Failed to read Controller-ID: %d\n", ret); pcie 976 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, "Failed to find PHY entries: %d\n", pcie 980 drivers/pci/controller/dwc/pcie-tegra194.c pcie->phy_count = ret; pcie 983 drivers/pci/controller/dwc/pcie-tegra194.c pcie->update_fc_fixup = true; pcie 985 drivers/pci/controller/dwc/pcie-tegra194.c pcie->supports_clkreq = pcie 986 drivers/pci/controller/dwc/pcie-tegra194.c of_property_read_bool(pcie->dev->of_node, "supports-clkreq"); pcie 988 drivers/pci/controller/dwc/pcie-tegra194.c pcie->enable_cdm_check = pcie 994 drivers/pci/controller/dwc/pcie-tegra194.c static int tegra_pcie_bpmp_set_ctrl_state(struct tegra_pcie_dw *pcie, pcie 1002 drivers/pci/controller/dwc/pcie-tegra194.c if (pcie->cid == 5) pcie 1009 drivers/pci/controller/dwc/pcie-tegra194.c req.controller_state.pcie_controller = pcie->cid; pcie 1019 drivers/pci/controller/dwc/pcie-tegra194.c return tegra_bpmp_transfer(pcie->bpmp, &msg); pcie 1022 drivers/pci/controller/dwc/pcie-tegra194.c static void tegra_pcie_downstream_dev_to_D0(struct tegra_pcie_dw *pcie) pcie 1024 drivers/pci/controller/dwc/pcie-tegra194.c struct pcie_port *pp = &pcie->pci.pp; pcie 1046 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, "Failed to find downstream devices\n"); pcie 1053 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, pcie 1060 drivers/pci/controller/dwc/pcie-tegra194.c static int tegra_pcie_get_slot_regulators(struct tegra_pcie_dw *pcie) pcie 1062 drivers/pci/controller/dwc/pcie-tegra194.c pcie->slot_ctl_3v3 = devm_regulator_get_optional(pcie->dev, "vpcie3v3"); pcie 1063 drivers/pci/controller/dwc/pcie-tegra194.c if (IS_ERR(pcie->slot_ctl_3v3)) { pcie 1064 drivers/pci/controller/dwc/pcie-tegra194.c if (PTR_ERR(pcie->slot_ctl_3v3) != -ENODEV) pcie 1065 drivers/pci/controller/dwc/pcie-tegra194.c return PTR_ERR(pcie->slot_ctl_3v3); pcie 1067 drivers/pci/controller/dwc/pcie-tegra194.c pcie->slot_ctl_3v3 = NULL; pcie 1070 drivers/pci/controller/dwc/pcie-tegra194.c pcie->slot_ctl_12v = devm_regulator_get_optional(pcie->dev, "vpcie12v"); pcie 1071 drivers/pci/controller/dwc/pcie-tegra194.c if (IS_ERR(pcie->slot_ctl_12v)) { pcie 1072 drivers/pci/controller/dwc/pcie-tegra194.c if (PTR_ERR(pcie->slot_ctl_12v) != -ENODEV) pcie 1073 drivers/pci/controller/dwc/pcie-tegra194.c return PTR_ERR(pcie->slot_ctl_12v); pcie 1075 drivers/pci/controller/dwc/pcie-tegra194.c pcie->slot_ctl_12v = NULL; pcie 1081 drivers/pci/controller/dwc/pcie-tegra194.c static int tegra_pcie_enable_slot_regulators(struct tegra_pcie_dw *pcie) pcie 1085 drivers/pci/controller/dwc/pcie-tegra194.c if (pcie->slot_ctl_3v3) { pcie 1086 drivers/pci/controller/dwc/pcie-tegra194.c ret = regulator_enable(pcie->slot_ctl_3v3); pcie 1088 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, pcie 1094 drivers/pci/controller/dwc/pcie-tegra194.c if (pcie->slot_ctl_12v) { pcie 1095 drivers/pci/controller/dwc/pcie-tegra194.c ret = regulator_enable(pcie->slot_ctl_12v); pcie 1097 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, pcie 1108 drivers/pci/controller/dwc/pcie-tegra194.c if (pcie->slot_ctl_3v3 || pcie->slot_ctl_12v) pcie 1114 drivers/pci/controller/dwc/pcie-tegra194.c if (pcie->slot_ctl_3v3) pcie 1115 drivers/pci/controller/dwc/pcie-tegra194.c regulator_disable(pcie->slot_ctl_3v3); pcie 1119 drivers/pci/controller/dwc/pcie-tegra194.c static void tegra_pcie_disable_slot_regulators(struct tegra_pcie_dw *pcie) pcie 1121 drivers/pci/controller/dwc/pcie-tegra194.c if (pcie->slot_ctl_12v) pcie 1122 drivers/pci/controller/dwc/pcie-tegra194.c regulator_disable(pcie->slot_ctl_12v); pcie 1123 drivers/pci/controller/dwc/pcie-tegra194.c if (pcie->slot_ctl_3v3) pcie 1124 drivers/pci/controller/dwc/pcie-tegra194.c regulator_disable(pcie->slot_ctl_3v3); pcie 1127 drivers/pci/controller/dwc/pcie-tegra194.c static int tegra_pcie_config_controller(struct tegra_pcie_dw *pcie, pcie 1133 drivers/pci/controller/dwc/pcie-tegra194.c ret = tegra_pcie_bpmp_set_ctrl_state(pcie, true); pcie 1135 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, pcie 1136 drivers/pci/controller/dwc/pcie-tegra194.c "Failed to enable controller %u: %d\n", pcie->cid, ret); pcie 1140 drivers/pci/controller/dwc/pcie-tegra194.c ret = tegra_pcie_enable_slot_regulators(pcie); pcie 1144 drivers/pci/controller/dwc/pcie-tegra194.c ret = regulator_enable(pcie->pex_ctl_supply); pcie 1146 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, "Failed to enable regulator: %d\n", ret); pcie 1150 drivers/pci/controller/dwc/pcie-tegra194.c ret = clk_prepare_enable(pcie->core_clk); pcie 1152 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, "Failed to enable core clock: %d\n", ret); pcie 1156 drivers/pci/controller/dwc/pcie-tegra194.c ret = reset_control_deassert(pcie->core_apb_rst); pcie 1158 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, "Failed to deassert core APB reset: %d\n", pcie 1165 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_CTRL); pcie 1169 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_CTRL); pcie 1172 drivers/pci/controller/dwc/pcie-tegra194.c ret = tegra_pcie_enable_phy(pcie); pcie 1174 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, "Failed to enable PHY: %d\n", ret); pcie 1179 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, pcie->dbi_res->start & APPL_CFG_BASE_ADDR_MASK, pcie 1183 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, APPL_DM_TYPE_RP, APPL_DM_TYPE); pcie 1185 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, 0x0, APPL_CFG_SLCG_OVERRIDE); pcie 1187 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_CTRL); pcie 1188 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val | APPL_CTRL_SYS_PRE_DET_STATE, APPL_CTRL); pcie 1190 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_CFG_MISC); pcie 1192 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_CFG_MISC); pcie 1194 drivers/pci/controller/dwc/pcie-tegra194.c if (!pcie->supports_clkreq) { pcie 1195 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_PINMUX); pcie 1198 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_PINMUX); pcie 1202 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, pcie 1203 drivers/pci/controller/dwc/pcie-tegra194.c pcie->atu_dma_res->start & APPL_CFG_IATU_DMA_BASE_ADDR_MASK, pcie 1206 drivers/pci/controller/dwc/pcie-tegra194.c reset_control_deassert(pcie->core_rst); pcie 1208 drivers/pci/controller/dwc/pcie-tegra194.c pcie->pcie_cap_base = dw_pcie_find_capability(&pcie->pci, pcie 1212 drivers/pci/controller/dwc/pcie-tegra194.c if (!pcie->supports_clkreq) { pcie 1213 drivers/pci/controller/dwc/pcie-tegra194.c disable_aspm_l11(pcie); pcie 1214 drivers/pci/controller/dwc/pcie-tegra194.c disable_aspm_l12(pcie); pcie 1220 drivers/pci/controller/dwc/pcie-tegra194.c reset_control_assert(pcie->core_apb_rst); pcie 1222 drivers/pci/controller/dwc/pcie-tegra194.c clk_disable_unprepare(pcie->core_clk); pcie 1224 drivers/pci/controller/dwc/pcie-tegra194.c regulator_disable(pcie->pex_ctl_supply); pcie 1226 drivers/pci/controller/dwc/pcie-tegra194.c tegra_pcie_disable_slot_regulators(pcie); pcie 1228 drivers/pci/controller/dwc/pcie-tegra194.c tegra_pcie_bpmp_set_ctrl_state(pcie, false); pcie 1233 drivers/pci/controller/dwc/pcie-tegra194.c static int __deinit_controller(struct tegra_pcie_dw *pcie) pcie 1237 drivers/pci/controller/dwc/pcie-tegra194.c ret = reset_control_assert(pcie->core_rst); pcie 1239 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, "Failed to assert \"core\" reset: %d\n", pcie 1244 drivers/pci/controller/dwc/pcie-tegra194.c tegra_pcie_disable_phy(pcie); pcie 1246 drivers/pci/controller/dwc/pcie-tegra194.c ret = reset_control_assert(pcie->core_apb_rst); pcie 1248 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, "Failed to assert APB reset: %d\n", ret); pcie 1252 drivers/pci/controller/dwc/pcie-tegra194.c clk_disable_unprepare(pcie->core_clk); pcie 1254 drivers/pci/controller/dwc/pcie-tegra194.c ret = regulator_disable(pcie->pex_ctl_supply); pcie 1256 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, "Failed to disable regulator: %d\n", ret); pcie 1260 drivers/pci/controller/dwc/pcie-tegra194.c tegra_pcie_disable_slot_regulators(pcie); pcie 1262 drivers/pci/controller/dwc/pcie-tegra194.c ret = tegra_pcie_bpmp_set_ctrl_state(pcie, false); pcie 1264 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, "Failed to disable controller %d: %d\n", pcie 1265 drivers/pci/controller/dwc/pcie-tegra194.c pcie->cid, ret); pcie 1272 drivers/pci/controller/dwc/pcie-tegra194.c static int tegra_pcie_init_controller(struct tegra_pcie_dw *pcie) pcie 1274 drivers/pci/controller/dwc/pcie-tegra194.c struct dw_pcie *pci = &pcie->pci; pcie 1278 drivers/pci/controller/dwc/pcie-tegra194.c ret = tegra_pcie_config_controller(pcie, false); pcie 1286 drivers/pci/controller/dwc/pcie-tegra194.c dev_err(pcie->dev, "Failed to add PCIe port: %d\n", ret); pcie 1293 drivers/pci/controller/dwc/pcie-tegra194.c return __deinit_controller(pcie); pcie 1296 drivers/pci/controller/dwc/pcie-tegra194.c static int tegra_pcie_try_link_l2(struct tegra_pcie_dw *pcie) pcie 1300 drivers/pci/controller/dwc/pcie-tegra194.c if (!tegra_pcie_dw_link_up(&pcie->pci)) pcie 1303 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_RADM_STATUS); pcie 1305 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_RADM_STATUS); pcie 1307 drivers/pci/controller/dwc/pcie-tegra194.c return readl_poll_timeout_atomic(pcie->appl_base + APPL_DEBUG, val, pcie 1312 drivers/pci/controller/dwc/pcie-tegra194.c static void tegra_pcie_dw_pme_turnoff(struct tegra_pcie_dw *pcie) pcie 1317 drivers/pci/controller/dwc/pcie-tegra194.c if (!tegra_pcie_dw_link_up(&pcie->pci)) { pcie 1318 drivers/pci/controller/dwc/pcie-tegra194.c dev_dbg(pcie->dev, "PCIe link is not up...!\n"); pcie 1322 drivers/pci/controller/dwc/pcie-tegra194.c if (tegra_pcie_try_link_l2(pcie)) { pcie 1323 drivers/pci/controller/dwc/pcie-tegra194.c dev_info(pcie->dev, "Link didn't transition to L2 state\n"); pcie 1330 drivers/pci/controller/dwc/pcie-tegra194.c data = appl_readl(pcie, APPL_PINMUX); pcie 1332 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, data, APPL_PINMUX); pcie 1334 drivers/pci/controller/dwc/pcie-tegra194.c err = readl_poll_timeout_atomic(pcie->appl_base + APPL_DEBUG, pcie 1342 drivers/pci/controller/dwc/pcie-tegra194.c dev_info(pcie->dev, "Link didn't go to detect state\n"); pcie 1345 drivers/pci/controller/dwc/pcie-tegra194.c data = appl_readl(pcie, APPL_CTRL); pcie 1347 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, data, APPL_CTRL); pcie 1354 drivers/pci/controller/dwc/pcie-tegra194.c data = appl_readl(pcie, APPL_PINMUX); pcie 1359 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, data, APPL_PINMUX); pcie 1362 drivers/pci/controller/dwc/pcie-tegra194.c static int tegra_pcie_deinit_controller(struct tegra_pcie_dw *pcie) pcie 1364 drivers/pci/controller/dwc/pcie-tegra194.c tegra_pcie_downstream_dev_to_D0(pcie); pcie 1365 drivers/pci/controller/dwc/pcie-tegra194.c dw_pcie_host_deinit(&pcie->pci.pp); pcie 1366 drivers/pci/controller/dwc/pcie-tegra194.c tegra_pcie_dw_pme_turnoff(pcie); pcie 1368 drivers/pci/controller/dwc/pcie-tegra194.c return __deinit_controller(pcie); pcie 1371 drivers/pci/controller/dwc/pcie-tegra194.c static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie) pcie 1373 drivers/pci/controller/dwc/pcie-tegra194.c struct pcie_port *pp = &pcie->pci.pp; pcie 1374 drivers/pci/controller/dwc/pcie-tegra194.c struct device *dev = pcie->dev; pcie 1401 drivers/pci/controller/dwc/pcie-tegra194.c tegra_pcie_init_controller(pcie); pcie 1403 drivers/pci/controller/dwc/pcie-tegra194.c pcie->link_state = tegra_pcie_dw_link_up(&pcie->pci); pcie 1404 drivers/pci/controller/dwc/pcie-tegra194.c if (!pcie->link_state) { pcie 1415 drivers/pci/controller/dwc/pcie-tegra194.c pcie->debugfs = debugfs_create_dir(name, NULL); pcie 1416 drivers/pci/controller/dwc/pcie-tegra194.c if (!pcie->debugfs) pcie 1419 drivers/pci/controller/dwc/pcie-tegra194.c init_debugfs(pcie); pcie 1424 drivers/pci/controller/dwc/pcie-tegra194.c tegra_pcie_deinit_controller(pcie); pcie 1436 drivers/pci/controller/dwc/pcie-tegra194.c struct tegra_pcie_dw *pcie; pcie 1445 drivers/pci/controller/dwc/pcie-tegra194.c pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); pcie 1446 drivers/pci/controller/dwc/pcie-tegra194.c if (!pcie) pcie 1449 drivers/pci/controller/dwc/pcie-tegra194.c pci = &pcie->pci; pcie 1453 drivers/pci/controller/dwc/pcie-tegra194.c pcie->dev = &pdev->dev; pcie 1455 drivers/pci/controller/dwc/pcie-tegra194.c ret = tegra_pcie_dw_parse_dt(pcie); pcie 1461 drivers/pci/controller/dwc/pcie-tegra194.c ret = tegra_pcie_get_slot_regulators(pcie); pcie 1467 drivers/pci/controller/dwc/pcie-tegra194.c pcie->pex_ctl_supply = devm_regulator_get(dev, "vddio-pex-ctl"); pcie 1468 drivers/pci/controller/dwc/pcie-tegra194.c if (IS_ERR(pcie->pex_ctl_supply)) { pcie 1469 drivers/pci/controller/dwc/pcie-tegra194.c ret = PTR_ERR(pcie->pex_ctl_supply); pcie 1472 drivers/pci/controller/dwc/pcie-tegra194.c PTR_ERR(pcie->pex_ctl_supply)); pcie 1476 drivers/pci/controller/dwc/pcie-tegra194.c pcie->core_clk = devm_clk_get(dev, "core"); pcie 1477 drivers/pci/controller/dwc/pcie-tegra194.c if (IS_ERR(pcie->core_clk)) { pcie 1479 drivers/pci/controller/dwc/pcie-tegra194.c PTR_ERR(pcie->core_clk)); pcie 1480 drivers/pci/controller/dwc/pcie-tegra194.c return PTR_ERR(pcie->core_clk); pcie 1483 drivers/pci/controller/dwc/pcie-tegra194.c pcie->appl_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, pcie 1485 drivers/pci/controller/dwc/pcie-tegra194.c if (!pcie->appl_res) { pcie 1490 drivers/pci/controller/dwc/pcie-tegra194.c pcie->appl_base = devm_ioremap_resource(dev, pcie->appl_res); pcie 1491 drivers/pci/controller/dwc/pcie-tegra194.c if (IS_ERR(pcie->appl_base)) pcie 1492 drivers/pci/controller/dwc/pcie-tegra194.c return PTR_ERR(pcie->appl_base); pcie 1494 drivers/pci/controller/dwc/pcie-tegra194.c pcie->core_apb_rst = devm_reset_control_get(dev, "apb"); pcie 1495 drivers/pci/controller/dwc/pcie-tegra194.c if (IS_ERR(pcie->core_apb_rst)) { pcie 1497 drivers/pci/controller/dwc/pcie-tegra194.c PTR_ERR(pcie->core_apb_rst)); pcie 1498 drivers/pci/controller/dwc/pcie-tegra194.c return PTR_ERR(pcie->core_apb_rst); pcie 1501 drivers/pci/controller/dwc/pcie-tegra194.c phys = devm_kcalloc(dev, pcie->phy_count, sizeof(*phys), GFP_KERNEL); pcie 1505 drivers/pci/controller/dwc/pcie-tegra194.c for (i = 0; i < pcie->phy_count; i++) { pcie 1521 drivers/pci/controller/dwc/pcie-tegra194.c pcie->phys = phys; pcie 1528 drivers/pci/controller/dwc/pcie-tegra194.c pcie->dbi_res = dbi_res; pcie 1543 drivers/pci/controller/dwc/pcie-tegra194.c pcie->atu_dma_res = atu_dma_res; pcie 1549 drivers/pci/controller/dwc/pcie-tegra194.c pcie->core_rst = devm_reset_control_get(dev, "core"); pcie 1550 drivers/pci/controller/dwc/pcie-tegra194.c if (IS_ERR(pcie->core_rst)) { pcie 1552 drivers/pci/controller/dwc/pcie-tegra194.c PTR_ERR(pcie->core_rst)); pcie 1553 drivers/pci/controller/dwc/pcie-tegra194.c return PTR_ERR(pcie->core_rst); pcie 1563 drivers/pci/controller/dwc/pcie-tegra194.c IRQF_SHARED, "tegra-pcie-intr", pcie); pcie 1569 drivers/pci/controller/dwc/pcie-tegra194.c pcie->bpmp = tegra_bpmp_get(dev); pcie 1570 drivers/pci/controller/dwc/pcie-tegra194.c if (IS_ERR(pcie->bpmp)) pcie 1571 drivers/pci/controller/dwc/pcie-tegra194.c return PTR_ERR(pcie->bpmp); pcie 1573 drivers/pci/controller/dwc/pcie-tegra194.c platform_set_drvdata(pdev, pcie); pcie 1575 drivers/pci/controller/dwc/pcie-tegra194.c ret = tegra_pcie_config_rp(pcie); pcie 1582 drivers/pci/controller/dwc/pcie-tegra194.c tegra_bpmp_put(pcie->bpmp); pcie 1588 drivers/pci/controller/dwc/pcie-tegra194.c struct tegra_pcie_dw *pcie = platform_get_drvdata(pdev); pcie 1590 drivers/pci/controller/dwc/pcie-tegra194.c if (!pcie->link_state) pcie 1593 drivers/pci/controller/dwc/pcie-tegra194.c debugfs_remove_recursive(pcie->debugfs); pcie 1594 drivers/pci/controller/dwc/pcie-tegra194.c tegra_pcie_deinit_controller(pcie); pcie 1595 drivers/pci/controller/dwc/pcie-tegra194.c pm_runtime_put_sync(pcie->dev); pcie 1596 drivers/pci/controller/dwc/pcie-tegra194.c pm_runtime_disable(pcie->dev); pcie 1597 drivers/pci/controller/dwc/pcie-tegra194.c tegra_bpmp_put(pcie->bpmp); pcie 1604 drivers/pci/controller/dwc/pcie-tegra194.c struct tegra_pcie_dw *pcie = dev_get_drvdata(dev); pcie 1607 drivers/pci/controller/dwc/pcie-tegra194.c if (!pcie->link_state) pcie 1611 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_CTRL); pcie 1615 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_CTRL); pcie 1622 drivers/pci/controller/dwc/pcie-tegra194.c struct tegra_pcie_dw *pcie = dev_get_drvdata(dev); pcie 1624 drivers/pci/controller/dwc/pcie-tegra194.c if (!pcie->link_state) pcie 1628 drivers/pci/controller/dwc/pcie-tegra194.c pcie->msi_ctrl_int = dw_pcie_readl_dbi(&pcie->pci, pcie 1630 drivers/pci/controller/dwc/pcie-tegra194.c tegra_pcie_downstream_dev_to_D0(pcie); pcie 1631 drivers/pci/controller/dwc/pcie-tegra194.c tegra_pcie_dw_pme_turnoff(pcie); pcie 1633 drivers/pci/controller/dwc/pcie-tegra194.c return __deinit_controller(pcie); pcie 1638 drivers/pci/controller/dwc/pcie-tegra194.c struct tegra_pcie_dw *pcie = dev_get_drvdata(dev); pcie 1641 drivers/pci/controller/dwc/pcie-tegra194.c if (!pcie->link_state) pcie 1644 drivers/pci/controller/dwc/pcie-tegra194.c ret = tegra_pcie_config_controller(pcie, true); pcie 1648 drivers/pci/controller/dwc/pcie-tegra194.c ret = tegra_pcie_dw_host_init(&pcie->pci.pp); pcie 1655 drivers/pci/controller/dwc/pcie-tegra194.c dw_pcie_writel_dbi(&pcie->pci, PORT_LOGIC_MSI_CTRL_INT_0_EN, pcie 1656 drivers/pci/controller/dwc/pcie-tegra194.c pcie->msi_ctrl_int); pcie 1661 drivers/pci/controller/dwc/pcie-tegra194.c return __deinit_controller(pcie); pcie 1666 drivers/pci/controller/dwc/pcie-tegra194.c struct tegra_pcie_dw *pcie = dev_get_drvdata(dev); pcie 1669 drivers/pci/controller/dwc/pcie-tegra194.c if (!pcie->link_state) pcie 1673 drivers/pci/controller/dwc/pcie-tegra194.c val = appl_readl(pcie, APPL_CTRL); pcie 1679 drivers/pci/controller/dwc/pcie-tegra194.c appl_writel(pcie, val, APPL_CTRL); pcie 1686 drivers/pci/controller/dwc/pcie-tegra194.c struct tegra_pcie_dw *pcie = platform_get_drvdata(pdev); pcie 1688 drivers/pci/controller/dwc/pcie-tegra194.c if (!pcie->link_state) pcie 1691 drivers/pci/controller/dwc/pcie-tegra194.c debugfs_remove_recursive(pcie->debugfs); pcie 1692 drivers/pci/controller/dwc/pcie-tegra194.c tegra_pcie_downstream_dev_to_D0(pcie); pcie 1694 drivers/pci/controller/dwc/pcie-tegra194.c disable_irq(pcie->pci.pp.irq); pcie 1696 drivers/pci/controller/dwc/pcie-tegra194.c disable_irq(pcie->pci.pp.msi_irq); pcie 1698 drivers/pci/controller/dwc/pcie-tegra194.c tegra_pcie_dw_pme_turnoff(pcie); pcie 1699 drivers/pci/controller/dwc/pcie-tegra194.c __deinit_controller(pcie); pcie 206 drivers/pci/controller/pci-aardvark.c static inline void advk_writel(struct advk_pcie *pcie, u32 val, u64 reg) pcie 208 drivers/pci/controller/pci-aardvark.c writel(val, pcie->base + reg); pcie 211 drivers/pci/controller/pci-aardvark.c static inline u32 advk_readl(struct advk_pcie *pcie, u64 reg) pcie 213 drivers/pci/controller/pci-aardvark.c return readl(pcie->base + reg); pcie 216 drivers/pci/controller/pci-aardvark.c static int advk_pcie_link_up(struct advk_pcie *pcie) pcie 220 drivers/pci/controller/pci-aardvark.c val = advk_readl(pcie, CFG_REG); pcie 225 drivers/pci/controller/pci-aardvark.c static int advk_pcie_wait_for_link(struct advk_pcie *pcie) pcie 227 drivers/pci/controller/pci-aardvark.c struct device *dev = &pcie->pdev->dev; pcie 232 drivers/pci/controller/pci-aardvark.c if (advk_pcie_link_up(pcie)) { pcie 244 drivers/pci/controller/pci-aardvark.c static void advk_pcie_wait_for_retrain(struct advk_pcie *pcie) pcie 249 drivers/pci/controller/pci-aardvark.c if (!advk_pcie_link_up(pcie)) pcie 255 drivers/pci/controller/pci-aardvark.c static void advk_pcie_setup_hw(struct advk_pcie *pcie) pcie 260 drivers/pci/controller/pci-aardvark.c reg = advk_readl(pcie, CTRL_CONFIG_REG); pcie 263 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, CTRL_CONFIG_REG); pcie 266 drivers/pci/controller/pci-aardvark.c reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); pcie 268 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); pcie 275 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PCIE_CORE_ERR_CAPCTL_REG); pcie 283 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PCIE_CORE_DEV_CTRL_STATS_REG); pcie 288 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG); pcie 291 drivers/pci/controller/pci-aardvark.c reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); pcie 294 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); pcie 297 drivers/pci/controller/pci-aardvark.c reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); pcie 300 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); pcie 303 drivers/pci/controller/pci-aardvark.c reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); pcie 305 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); pcie 308 drivers/pci/controller/pci-aardvark.c reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG); pcie 310 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG); pcie 313 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_REG); pcie 314 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG); pcie 315 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG); pcie 320 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PCIE_ISR0_MASK_REG); pcie 322 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG); pcie 325 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, 0, PCIE_MSI_MASK_REG); pcie 329 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, HOST_CTRL_INT_MASK_REG); pcie 331 drivers/pci/controller/pci-aardvark.c reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG); pcie 333 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG); pcie 336 drivers/pci/controller/pci-aardvark.c reg = advk_readl(pcie, PIO_CTRL); pcie 338 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PIO_CTRL); pcie 341 drivers/pci/controller/pci-aardvark.c reg = advk_readl(pcie, PCIE_CORE_LINK_CTRL_STAT_REG); pcie 343 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PCIE_CORE_LINK_CTRL_STAT_REG); pcie 345 drivers/pci/controller/pci-aardvark.c advk_pcie_wait_for_link(pcie); pcie 349 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PCIE_CORE_LINK_CTRL_STAT_REG); pcie 351 drivers/pci/controller/pci-aardvark.c reg = advk_readl(pcie, PCIE_CORE_CMD_STATUS_REG); pcie 355 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PCIE_CORE_CMD_STATUS_REG); pcie 358 drivers/pci/controller/pci-aardvark.c static void advk_pcie_check_pio_status(struct advk_pcie *pcie) pcie 360 drivers/pci/controller/pci-aardvark.c struct device *dev = &pcie->pdev->dev; pcie 365 drivers/pci/controller/pci-aardvark.c reg = advk_readl(pcie, PIO_STAT); pcie 393 drivers/pci/controller/pci-aardvark.c str_posted, strcomp_status, reg, advk_readl(pcie, PIO_ADDR_LS)); pcie 396 drivers/pci/controller/pci-aardvark.c static int advk_pcie_wait_pio(struct advk_pcie *pcie) pcie 398 drivers/pci/controller/pci-aardvark.c struct device *dev = &pcie->pdev->dev; pcie 406 drivers/pci/controller/pci-aardvark.c start = advk_readl(pcie, PIO_START); pcie 407 drivers/pci/controller/pci-aardvark.c isr = advk_readl(pcie, PIO_ISR); pcie 421 drivers/pci/controller/pci-aardvark.c struct advk_pcie *pcie = bridge->data; pcie 430 drivers/pci/controller/pci-aardvark.c u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG); pcie 436 drivers/pci/controller/pci-aardvark.c u32 isr0 = advk_readl(pcie, PCIE_ISR0_REG); pcie 437 drivers/pci/controller/pci-aardvark.c u32 msglog = advk_readl(pcie, PCIE_MSG_LOG_REG); pcie 444 drivers/pci/controller/pci-aardvark.c u32 val = advk_readl(pcie, PCIE_CORE_PCIEXP_CAP + reg) & pcie 446 drivers/pci/controller/pci-aardvark.c if (!advk_pcie_link_up(pcie)) pcie 456 drivers/pci/controller/pci-aardvark.c *value = advk_readl(pcie, PCIE_CORE_PCIEXP_CAP + reg); pcie 468 drivers/pci/controller/pci-aardvark.c struct advk_pcie *pcie = bridge->data; pcie 472 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg); pcie 476 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg); pcie 478 drivers/pci/controller/pci-aardvark.c advk_pcie_wait_for_retrain(pcie); pcie 483 drivers/pci/controller/pci-aardvark.c u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG) & pcie 487 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, val, PCIE_ISR0_MASK_REG); pcie 493 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, new, PCIE_ISR0_REG); pcie 510 drivers/pci/controller/pci-aardvark.c static void advk_sw_pci_bridge_init(struct advk_pcie *pcie) pcie 512 drivers/pci/controller/pci-aardvark.c struct pci_bridge_emul *bridge = &pcie->bridge; pcie 514 drivers/pci/controller/pci-aardvark.c bridge->conf.vendor = advk_readl(pcie, PCIE_CORE_DEV_ID_REG) & 0xffff; pcie 515 drivers/pci/controller/pci-aardvark.c bridge->conf.device = advk_readl(pcie, PCIE_CORE_DEV_ID_REG) >> 16; pcie 517 drivers/pci/controller/pci-aardvark.c advk_readl(pcie, PCIE_CORE_DEV_REV_REG) & 0xff; pcie 531 drivers/pci/controller/pci-aardvark.c bridge->data = pcie; pcie 538 drivers/pci/controller/pci-aardvark.c static bool advk_pcie_valid_device(struct advk_pcie *pcie, struct pci_bus *bus, pcie 541 drivers/pci/controller/pci-aardvark.c if ((bus->number == pcie->root_bus_nr) && PCI_SLOT(devfn) != 0) pcie 550 drivers/pci/controller/pci-aardvark.c struct advk_pcie *pcie = bus->sysdata; pcie 554 drivers/pci/controller/pci-aardvark.c if (!advk_pcie_valid_device(pcie, bus, devfn)) { pcie 559 drivers/pci/controller/pci-aardvark.c if (bus->number == pcie->root_bus_nr) pcie 560 drivers/pci/controller/pci-aardvark.c return pci_bridge_emul_conf_read(&pcie->bridge, where, pcie 564 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, 0, PIO_START); pcie 565 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, 1, PIO_ISR); pcie 568 drivers/pci/controller/pci-aardvark.c reg = advk_readl(pcie, PIO_CTRL); pcie 570 drivers/pci/controller/pci-aardvark.c if (bus->primary == pcie->root_bus_nr) pcie 574 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PIO_CTRL); pcie 578 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PIO_ADDR_LS); pcie 579 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, 0, PIO_ADDR_MS); pcie 582 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, 0xf, PIO_WR_DATA_STRB); pcie 585 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, 1, PIO_START); pcie 587 drivers/pci/controller/pci-aardvark.c ret = advk_pcie_wait_pio(pcie); pcie 591 drivers/pci/controller/pci-aardvark.c advk_pcie_check_pio_status(pcie); pcie 594 drivers/pci/controller/pci-aardvark.c *val = advk_readl(pcie, PIO_RD_DATA); pcie 606 drivers/pci/controller/pci-aardvark.c struct advk_pcie *pcie = bus->sysdata; pcie 612 drivers/pci/controller/pci-aardvark.c if (!advk_pcie_valid_device(pcie, bus, devfn)) pcie 615 drivers/pci/controller/pci-aardvark.c if (bus->number == pcie->root_bus_nr) pcie 616 drivers/pci/controller/pci-aardvark.c return pci_bridge_emul_conf_write(&pcie->bridge, where, pcie 623 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, 0, PIO_START); pcie 624 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, 1, PIO_ISR); pcie 627 drivers/pci/controller/pci-aardvark.c reg = advk_readl(pcie, PIO_CTRL); pcie 629 drivers/pci/controller/pci-aardvark.c if (bus->primary == pcie->root_bus_nr) pcie 633 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PIO_CTRL); pcie 637 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PIO_ADDR_LS); pcie 638 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, 0, PIO_ADDR_MS); pcie 646 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, reg, PIO_WR_DATA); pcie 649 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, data_strobe, PIO_WR_DATA_STRB); pcie 652 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, 1, PIO_START); pcie 654 drivers/pci/controller/pci-aardvark.c ret = advk_pcie_wait_pio(pcie); pcie 658 drivers/pci/controller/pci-aardvark.c advk_pcie_check_pio_status(pcie); pcie 671 drivers/pci/controller/pci-aardvark.c struct advk_pcie *pcie = irq_data_get_irq_chip_data(data); pcie 672 drivers/pci/controller/pci-aardvark.c phys_addr_t msi_msg = virt_to_phys(&pcie->msi_msg); pcie 689 drivers/pci/controller/pci-aardvark.c struct advk_pcie *pcie = domain->host_data; pcie 692 drivers/pci/controller/pci-aardvark.c mutex_lock(&pcie->msi_used_lock); pcie 693 drivers/pci/controller/pci-aardvark.c hwirq = bitmap_find_next_zero_area(pcie->msi_used, MSI_IRQ_NUM, pcie 696 drivers/pci/controller/pci-aardvark.c mutex_unlock(&pcie->msi_used_lock); pcie 700 drivers/pci/controller/pci-aardvark.c bitmap_set(pcie->msi_used, hwirq, nr_irqs); pcie 701 drivers/pci/controller/pci-aardvark.c mutex_unlock(&pcie->msi_used_lock); pcie 705 drivers/pci/controller/pci-aardvark.c &pcie->msi_bottom_irq_chip, pcie 716 drivers/pci/controller/pci-aardvark.c struct advk_pcie *pcie = domain->host_data; pcie 718 drivers/pci/controller/pci-aardvark.c mutex_lock(&pcie->msi_used_lock); pcie 719 drivers/pci/controller/pci-aardvark.c bitmap_clear(pcie->msi_used, d->hwirq, nr_irqs); pcie 720 drivers/pci/controller/pci-aardvark.c mutex_unlock(&pcie->msi_used_lock); pcie 730 drivers/pci/controller/pci-aardvark.c struct advk_pcie *pcie = d->domain->host_data; pcie 734 drivers/pci/controller/pci-aardvark.c mask = advk_readl(pcie, PCIE_ISR1_MASK_REG); pcie 736 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, mask, PCIE_ISR1_MASK_REG); pcie 741 drivers/pci/controller/pci-aardvark.c struct advk_pcie *pcie = d->domain->host_data; pcie 745 drivers/pci/controller/pci-aardvark.c mask = advk_readl(pcie, PCIE_ISR1_MASK_REG); pcie 747 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, mask, PCIE_ISR1_MASK_REG); pcie 753 drivers/pci/controller/pci-aardvark.c struct advk_pcie *pcie = h->host_data; pcie 757 drivers/pci/controller/pci-aardvark.c irq_set_chip_and_handler(virq, &pcie->irq_chip, pcie 759 drivers/pci/controller/pci-aardvark.c irq_set_chip_data(virq, pcie); pcie 769 drivers/pci/controller/pci-aardvark.c static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie) pcie 771 drivers/pci/controller/pci-aardvark.c struct device *dev = &pcie->pdev->dev; pcie 777 drivers/pci/controller/pci-aardvark.c mutex_init(&pcie->msi_used_lock); pcie 779 drivers/pci/controller/pci-aardvark.c bottom_ic = &pcie->msi_bottom_irq_chip; pcie 785 drivers/pci/controller/pci-aardvark.c msi_ic = &pcie->msi_irq_chip; pcie 788 drivers/pci/controller/pci-aardvark.c msi_di = &pcie->msi_domain_info; pcie 793 drivers/pci/controller/pci-aardvark.c msi_msg_phys = virt_to_phys(&pcie->msi_msg); pcie 795 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, lower_32_bits(msi_msg_phys), pcie 797 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, upper_32_bits(msi_msg_phys), pcie 800 drivers/pci/controller/pci-aardvark.c pcie->msi_inner_domain = pcie 802 drivers/pci/controller/pci-aardvark.c &advk_msi_domain_ops, pcie); pcie 803 drivers/pci/controller/pci-aardvark.c if (!pcie->msi_inner_domain) pcie 806 drivers/pci/controller/pci-aardvark.c pcie->msi_domain = pcie 808 drivers/pci/controller/pci-aardvark.c msi_di, pcie->msi_inner_domain); pcie 809 drivers/pci/controller/pci-aardvark.c if (!pcie->msi_domain) { pcie 810 drivers/pci/controller/pci-aardvark.c irq_domain_remove(pcie->msi_inner_domain); pcie 817 drivers/pci/controller/pci-aardvark.c static void advk_pcie_remove_msi_irq_domain(struct advk_pcie *pcie) pcie 819 drivers/pci/controller/pci-aardvark.c irq_domain_remove(pcie->msi_domain); pcie 820 drivers/pci/controller/pci-aardvark.c irq_domain_remove(pcie->msi_inner_domain); pcie 823 drivers/pci/controller/pci-aardvark.c static int advk_pcie_init_irq_domain(struct advk_pcie *pcie) pcie 825 drivers/pci/controller/pci-aardvark.c struct device *dev = &pcie->pdev->dev; pcie 837 drivers/pci/controller/pci-aardvark.c irq_chip = &pcie->irq_chip; pcie 850 drivers/pci/controller/pci-aardvark.c pcie->irq_domain = pcie 852 drivers/pci/controller/pci-aardvark.c &advk_pcie_irq_domain_ops, pcie); pcie 853 drivers/pci/controller/pci-aardvark.c if (!pcie->irq_domain) { pcie 864 drivers/pci/controller/pci-aardvark.c static void advk_pcie_remove_irq_domain(struct advk_pcie *pcie) pcie 866 drivers/pci/controller/pci-aardvark.c irq_domain_remove(pcie->irq_domain); pcie 869 drivers/pci/controller/pci-aardvark.c static void advk_pcie_handle_msi(struct advk_pcie *pcie) pcie 874 drivers/pci/controller/pci-aardvark.c msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG); pcie 875 drivers/pci/controller/pci-aardvark.c msi_val = advk_readl(pcie, PCIE_MSI_STATUS_REG); pcie 882 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, BIT(msi_idx), PCIE_MSI_STATUS_REG); pcie 883 drivers/pci/controller/pci-aardvark.c msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & 0xFF; pcie 887 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, PCIE_ISR0_MSI_INT_PENDING, pcie 891 drivers/pci/controller/pci-aardvark.c static void advk_pcie_handle_int(struct advk_pcie *pcie) pcie 897 drivers/pci/controller/pci-aardvark.c isr0_val = advk_readl(pcie, PCIE_ISR0_REG); pcie 898 drivers/pci/controller/pci-aardvark.c isr0_mask = advk_readl(pcie, PCIE_ISR0_MASK_REG); pcie 901 drivers/pci/controller/pci-aardvark.c isr1_val = advk_readl(pcie, PCIE_ISR1_REG); pcie 902 drivers/pci/controller/pci-aardvark.c isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG); pcie 906 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, isr0_val, PCIE_ISR0_REG); pcie 907 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, isr1_val, PCIE_ISR1_REG); pcie 913 drivers/pci/controller/pci-aardvark.c advk_pcie_handle_msi(pcie); pcie 920 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, PCIE_ISR1_INTX_ASSERT(i), pcie 923 drivers/pci/controller/pci-aardvark.c virq = irq_find_mapping(pcie->irq_domain, i); pcie 930 drivers/pci/controller/pci-aardvark.c struct advk_pcie *pcie = arg; pcie 933 drivers/pci/controller/pci-aardvark.c status = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG); pcie 937 drivers/pci/controller/pci-aardvark.c advk_pcie_handle_int(pcie); pcie 940 drivers/pci/controller/pci-aardvark.c advk_writel(pcie, PCIE_IRQ_CORE_INT, HOST_CTRL_INT_STATUS_REG); pcie 945 drivers/pci/controller/pci-aardvark.c static int advk_pcie_parse_request_of_pci_ranges(struct advk_pcie *pcie) pcie 948 drivers/pci/controller/pci-aardvark.c struct device *dev = &pcie->pdev->dev; pcie 952 drivers/pci/controller/pci-aardvark.c INIT_LIST_HEAD(&pcie->resources); pcie 955 drivers/pci/controller/pci-aardvark.c &pcie->resources, &iobase); pcie 959 drivers/pci/controller/pci-aardvark.c err = devm_request_pci_bus_resources(dev, &pcie->resources); pcie 963 drivers/pci/controller/pci-aardvark.c resource_list_for_each_entry_safe(win, tmp, &pcie->resources) { pcie 979 drivers/pci/controller/pci-aardvark.c pcie->root_bus_nr = res->start; pcie 993 drivers/pci/controller/pci-aardvark.c pci_free_resource_list(&pcie->resources); pcie 1000 drivers/pci/controller/pci-aardvark.c struct advk_pcie *pcie; pcie 1009 drivers/pci/controller/pci-aardvark.c pcie = pci_host_bridge_priv(bridge); pcie 1010 drivers/pci/controller/pci-aardvark.c pcie->pdev = pdev; pcie 1013 drivers/pci/controller/pci-aardvark.c pcie->base = devm_ioremap_resource(dev, res); pcie 1014 drivers/pci/controller/pci-aardvark.c if (IS_ERR(pcie->base)) pcie 1015 drivers/pci/controller/pci-aardvark.c return PTR_ERR(pcie->base); pcie 1020 drivers/pci/controller/pci-aardvark.c pcie); pcie 1026 drivers/pci/controller/pci-aardvark.c ret = advk_pcie_parse_request_of_pci_ranges(pcie); pcie 1032 drivers/pci/controller/pci-aardvark.c advk_pcie_setup_hw(pcie); pcie 1034 drivers/pci/controller/pci-aardvark.c advk_sw_pci_bridge_init(pcie); pcie 1036 drivers/pci/controller/pci-aardvark.c ret = advk_pcie_init_irq_domain(pcie); pcie 1042 drivers/pci/controller/pci-aardvark.c ret = advk_pcie_init_msi_irq_domain(pcie); pcie 1045 drivers/pci/controller/pci-aardvark.c advk_pcie_remove_irq_domain(pcie); pcie 1049 drivers/pci/controller/pci-aardvark.c list_splice_init(&pcie->resources, &bridge->windows); pcie 1051 drivers/pci/controller/pci-aardvark.c bridge->sysdata = pcie; pcie 1059 drivers/pci/controller/pci-aardvark.c advk_pcie_remove_msi_irq_domain(pcie); pcie 1060 drivers/pci/controller/pci-aardvark.c advk_pcie_remove_irq_domain(pcie); pcie 104 drivers/pci/controller/pci-mvebu.c struct mvebu_pcie *pcie; pcie 316 drivers/pci/controller/pci-mvebu.c dev_err(&port->pcie->pdev->dev, pcie 376 drivers/pci/controller/pci-mvebu.c dev_WARN(&port->pcie->pdev->dev, pcie 390 drivers/pci/controller/pci-mvebu.c desired.base = port->pcie->io.start + desired.remap; pcie 594 drivers/pci/controller/pci-mvebu.c static struct mvebu_pcie_port *mvebu_pcie_find_port(struct mvebu_pcie *pcie, pcie 600 drivers/pci/controller/pci-mvebu.c for (i = 0; i < pcie->nports; i++) { pcie 601 drivers/pci/controller/pci-mvebu.c struct mvebu_pcie_port *port = &pcie->ports[i]; pcie 618 drivers/pci/controller/pci-mvebu.c struct mvebu_pcie *pcie = bus->sysdata; pcie 622 drivers/pci/controller/pci-mvebu.c port = mvebu_pcie_find_port(pcie, bus, devfn); pcie 645 drivers/pci/controller/pci-mvebu.c struct mvebu_pcie *pcie = bus->sysdata; pcie 649 drivers/pci/controller/pci-mvebu.c port = mvebu_pcie_find_port(pcie, bus, devfn); pcie 773 drivers/pci/controller/pci-mvebu.c struct mvebu_pcie *pcie; pcie 776 drivers/pci/controller/pci-mvebu.c pcie = dev_get_drvdata(dev); pcie 777 drivers/pci/controller/pci-mvebu.c for (i = 0; i < pcie->nports; i++) { pcie 778 drivers/pci/controller/pci-mvebu.c struct mvebu_pcie_port *port = pcie->ports + i; pcie 787 drivers/pci/controller/pci-mvebu.c struct mvebu_pcie *pcie; pcie 790 drivers/pci/controller/pci-mvebu.c pcie = dev_get_drvdata(dev); pcie 791 drivers/pci/controller/pci-mvebu.c for (i = 0; i < pcie->nports; i++) { pcie 792 drivers/pci/controller/pci-mvebu.c struct mvebu_pcie_port *port = pcie->ports + i; pcie 808 drivers/pci/controller/pci-mvebu.c static int mvebu_pcie_parse_port(struct mvebu_pcie *pcie, pcie 811 drivers/pci/controller/pci-mvebu.c struct device *dev = &pcie->pdev->dev; pcie 815 drivers/pci/controller/pci-mvebu.c port->pcie = pcie; pcie 845 drivers/pci/controller/pci-mvebu.c if (resource_size(&pcie->io) != 0) { pcie 960 drivers/pci/controller/pci-mvebu.c static int mvebu_pcie_parse_request_resources(struct mvebu_pcie *pcie) pcie 962 drivers/pci/controller/pci-mvebu.c struct device *dev = &pcie->pdev->dev; pcie 966 drivers/pci/controller/pci-mvebu.c INIT_LIST_HEAD(&pcie->resources); pcie 969 drivers/pci/controller/pci-mvebu.c ret = of_pci_parse_bus_range(np, &pcie->busn); pcie 974 drivers/pci/controller/pci-mvebu.c pci_add_resource(&pcie->resources, &pcie->busn); pcie 977 drivers/pci/controller/pci-mvebu.c mvebu_mbus_get_pcie_mem_aperture(&pcie->mem); pcie 978 drivers/pci/controller/pci-mvebu.c if (resource_size(&pcie->mem) == 0) { pcie 983 drivers/pci/controller/pci-mvebu.c pcie->mem.name = "PCI MEM"; pcie 984 drivers/pci/controller/pci-mvebu.c pci_add_resource(&pcie->resources, &pcie->mem); pcie 987 drivers/pci/controller/pci-mvebu.c mvebu_mbus_get_pcie_io_aperture(&pcie->io); pcie 989 drivers/pci/controller/pci-mvebu.c if (resource_size(&pcie->io) != 0) { pcie 990 drivers/pci/controller/pci-mvebu.c pcie->realio.flags = pcie->io.flags; pcie 991 drivers/pci/controller/pci-mvebu.c pcie->realio.start = PCIBIOS_MIN_IO; pcie 992 drivers/pci/controller/pci-mvebu.c pcie->realio.end = min_t(resource_size_t, pcie 994 drivers/pci/controller/pci-mvebu.c resource_size(&pcie->io) - 1); pcie 995 drivers/pci/controller/pci-mvebu.c pcie->realio.name = "PCI I/O"; pcie 997 drivers/pci/controller/pci-mvebu.c pci_add_resource(&pcie->resources, &pcie->realio); pcie 1000 drivers/pci/controller/pci-mvebu.c return devm_request_pci_bus_resources(dev, &pcie->resources); pcie 1012 drivers/pci/controller/pci-mvebu.c struct mvebu_pcie *pcie; pcie 1022 drivers/pci/controller/pci-mvebu.c pcie = pci_host_bridge_priv(bridge); pcie 1023 drivers/pci/controller/pci-mvebu.c if (resource_size(&pcie->io) != 0) { pcie 1026 drivers/pci/controller/pci-mvebu.c for (i = 0; i < resource_size(&pcie->realio); i += SZ_64K) pcie 1027 drivers/pci/controller/pci-mvebu.c pci_ioremap_io(i, pcie->io.start + i); pcie 1054 drivers/pci/controller/pci-mvebu.c struct mvebu_pcie *pcie; pcie 1064 drivers/pci/controller/pci-mvebu.c pcie = pci_host_bridge_priv(bridge); pcie 1065 drivers/pci/controller/pci-mvebu.c pcie->pdev = pdev; pcie 1066 drivers/pci/controller/pci-mvebu.c platform_set_drvdata(pdev, pcie); pcie 1068 drivers/pci/controller/pci-mvebu.c ret = mvebu_pcie_parse_request_resources(pcie); pcie 1074 drivers/pci/controller/pci-mvebu.c pcie->ports = devm_kcalloc(dev, num, sizeof(*pcie->ports), GFP_KERNEL); pcie 1075 drivers/pci/controller/pci-mvebu.c if (!pcie->ports) pcie 1080 drivers/pci/controller/pci-mvebu.c struct mvebu_pcie_port *port = &pcie->ports[i]; pcie 1082 drivers/pci/controller/pci-mvebu.c ret = mvebu_pcie_parse_port(pcie, port, child); pcie 1093 drivers/pci/controller/pci-mvebu.c pcie->nports = i; pcie 1095 drivers/pci/controller/pci-mvebu.c for (i = 0; i < pcie->nports; i++) { pcie 1096 drivers/pci/controller/pci-mvebu.c struct mvebu_pcie_port *port = &pcie->ports[i]; pcie 1119 drivers/pci/controller/pci-mvebu.c pcie->nports = i; pcie 1121 drivers/pci/controller/pci-mvebu.c list_splice_init(&pcie->resources, &bridge->windows); pcie 1123 drivers/pci/controller/pci-mvebu.c bridge->sysdata = pcie; pcie 1129 drivers/pci/controller/pci-mvebu.c bridge->msi = pcie->msi; pcie 394 drivers/pci/controller/pci-tegra.c struct tegra_pcie *pcie; pcie 412 drivers/pci/controller/pci-tegra.c static inline void afi_writel(struct tegra_pcie *pcie, u32 value, pcie 415 drivers/pci/controller/pci-tegra.c writel(value, pcie->afi + offset); pcie 418 drivers/pci/controller/pci-tegra.c static inline u32 afi_readl(struct tegra_pcie *pcie, unsigned long offset) pcie 420 drivers/pci/controller/pci-tegra.c return readl(pcie->afi + offset); pcie 423 drivers/pci/controller/pci-tegra.c static inline void pads_writel(struct tegra_pcie *pcie, u32 value, pcie 426 drivers/pci/controller/pci-tegra.c writel(value, pcie->pads + offset); pcie 429 drivers/pci/controller/pci-tegra.c static inline u32 pads_readl(struct tegra_pcie *pcie, unsigned long offset) pcie 431 drivers/pci/controller/pci-tegra.c return readl(pcie->pads + offset); pcie 466 drivers/pci/controller/pci-tegra.c struct tegra_pcie *pcie = bus->sysdata; pcie 473 drivers/pci/controller/pci-tegra.c list_for_each_entry(port, &pcie->ports, list) { pcie 487 drivers/pci/controller/pci-tegra.c afi_writel(pcie, base, AFI_FPCI_BAR0); pcie 490 drivers/pci/controller/pci-tegra.c addr = pcie->cfg + (offset & (SZ_4K - 1)); pcie 524 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = port->pcie->soc; pcie 553 drivers/pci/controller/pci-tegra.c value = afi_readl(port->pcie, ctrl); pcie 555 drivers/pci/controller/pci-tegra.c afi_writel(port->pcie, value, ctrl); pcie 563 drivers/pci/controller/pci-tegra.c value = afi_readl(port->pcie, ctrl); pcie 565 drivers/pci/controller/pci-tegra.c afi_writel(port->pcie, value, ctrl); pcie 571 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = port->pcie->soc; pcie 609 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = port->pcie->soc; pcie 657 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = port->pcie->soc; pcie 711 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = port->pcie->soc; pcie 715 drivers/pci/controller/pci-tegra.c value = afi_readl(port->pcie, ctrl); pcie 723 drivers/pci/controller/pci-tegra.c afi_writel(port->pcie, value, ctrl); pcie 744 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = port->pcie->soc; pcie 748 drivers/pci/controller/pci-tegra.c value = afi_readl(port->pcie, ctrl); pcie 750 drivers/pci/controller/pci-tegra.c afi_writel(port->pcie, value, ctrl); pcie 753 drivers/pci/controller/pci-tegra.c value = afi_readl(port->pcie, ctrl); pcie 759 drivers/pci/controller/pci-tegra.c afi_writel(port->pcie, value, ctrl); pcie 762 drivers/pci/controller/pci-tegra.c value = afi_readl(port->pcie, AFI_PCIE_CONFIG); pcie 765 drivers/pci/controller/pci-tegra.c afi_writel(port->pcie, value, AFI_PCIE_CONFIG); pcie 770 drivers/pci/controller/pci-tegra.c struct tegra_pcie *pcie = port->pcie; pcie 771 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 800 drivers/pci/controller/pci-tegra.c static int tegra_pcie_request_resources(struct tegra_pcie *pcie) pcie 802 drivers/pci/controller/pci-tegra.c struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie); pcie 804 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 807 drivers/pci/controller/pci-tegra.c pci_add_resource_offset(windows, &pcie->pio, pcie->offset.io); pcie 808 drivers/pci/controller/pci-tegra.c pci_add_resource_offset(windows, &pcie->mem, pcie->offset.mem); pcie 809 drivers/pci/controller/pci-tegra.c pci_add_resource_offset(windows, &pcie->prefetch, pcie->offset.mem); pcie 810 drivers/pci/controller/pci-tegra.c pci_add_resource(windows, &pcie->busn); pcie 818 drivers/pci/controller/pci-tegra.c pci_remap_iospace(&pcie->pio, pcie->io.start); pcie 823 drivers/pci/controller/pci-tegra.c static void tegra_pcie_free_resources(struct tegra_pcie *pcie) pcie 825 drivers/pci/controller/pci-tegra.c struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie); pcie 828 drivers/pci/controller/pci-tegra.c pci_unmap_iospace(&pcie->pio); pcie 834 drivers/pci/controller/pci-tegra.c struct tegra_pcie *pcie = pdev->bus->sysdata; pcie 841 drivers/pci/controller/pci-tegra.c irq = pcie->irq; pcie 865 drivers/pci/controller/pci-tegra.c struct tegra_pcie *pcie = arg; pcie 866 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 869 drivers/pci/controller/pci-tegra.c code = afi_readl(pcie, AFI_INTR_CODE) & AFI_INTR_CODE_MASK; pcie 870 drivers/pci/controller/pci-tegra.c signature = afi_readl(pcie, AFI_INTR_SIGNATURE); pcie 871 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_INTR_CODE); pcie 890 drivers/pci/controller/pci-tegra.c u32 fpci = afi_readl(pcie, AFI_UPPER_FPCI_ADDRESS) & 0xff; pcie 910 drivers/pci/controller/pci-tegra.c static void tegra_pcie_setup_translations(struct tegra_pcie *pcie) pcie 915 drivers/pci/controller/pci-tegra.c size = resource_size(&pcie->cs); pcie 916 drivers/pci/controller/pci-tegra.c afi_writel(pcie, pcie->cs.start, AFI_AXI_BAR0_START); pcie 917 drivers/pci/controller/pci-tegra.c afi_writel(pcie, size >> 12, AFI_AXI_BAR0_SZ); pcie 921 drivers/pci/controller/pci-tegra.c size = resource_size(&pcie->io); pcie 922 drivers/pci/controller/pci-tegra.c axi_address = pcie->io.start; pcie 923 drivers/pci/controller/pci-tegra.c afi_writel(pcie, axi_address, AFI_AXI_BAR1_START); pcie 924 drivers/pci/controller/pci-tegra.c afi_writel(pcie, size >> 12, AFI_AXI_BAR1_SZ); pcie 925 drivers/pci/controller/pci-tegra.c afi_writel(pcie, fpci_bar, AFI_FPCI_BAR1); pcie 928 drivers/pci/controller/pci-tegra.c fpci_bar = (((pcie->prefetch.start >> 12) & 0x0fffffff) << 4) | 0x1; pcie 929 drivers/pci/controller/pci-tegra.c size = resource_size(&pcie->prefetch); pcie 930 drivers/pci/controller/pci-tegra.c axi_address = pcie->prefetch.start; pcie 931 drivers/pci/controller/pci-tegra.c afi_writel(pcie, axi_address, AFI_AXI_BAR2_START); pcie 932 drivers/pci/controller/pci-tegra.c afi_writel(pcie, size >> 12, AFI_AXI_BAR2_SZ); pcie 933 drivers/pci/controller/pci-tegra.c afi_writel(pcie, fpci_bar, AFI_FPCI_BAR2); pcie 936 drivers/pci/controller/pci-tegra.c fpci_bar = (((pcie->mem.start >> 12) & 0x0fffffff) << 4) | 0x1; pcie 937 drivers/pci/controller/pci-tegra.c size = resource_size(&pcie->mem); pcie 938 drivers/pci/controller/pci-tegra.c axi_address = pcie->mem.start; pcie 939 drivers/pci/controller/pci-tegra.c afi_writel(pcie, axi_address, AFI_AXI_BAR3_START); pcie 940 drivers/pci/controller/pci-tegra.c afi_writel(pcie, size >> 12, AFI_AXI_BAR3_SZ); pcie 941 drivers/pci/controller/pci-tegra.c afi_writel(pcie, fpci_bar, AFI_FPCI_BAR3); pcie 944 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_AXI_BAR4_START); pcie 945 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_AXI_BAR4_SZ); pcie 946 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_FPCI_BAR4); pcie 948 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_AXI_BAR5_START); pcie 949 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_AXI_BAR5_SZ); pcie 950 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_FPCI_BAR5); pcie 952 drivers/pci/controller/pci-tegra.c if (pcie->soc->has_cache_bars) { pcie 954 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_CACHE_BAR0_ST); pcie 955 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_CACHE_BAR0_SZ); pcie 956 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_CACHE_BAR1_ST); pcie 957 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_CACHE_BAR1_SZ); pcie 961 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_MSI_FPCI_BAR_ST); pcie 962 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_MSI_BAR_SZ); pcie 963 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_MSI_AXI_BAR_ST); pcie 964 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_MSI_BAR_SZ); pcie 967 drivers/pci/controller/pci-tegra.c static int tegra_pcie_pll_wait(struct tegra_pcie *pcie, unsigned long timeout) pcie 969 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; pcie 975 drivers/pci/controller/pci-tegra.c value = pads_readl(pcie, soc->pads_pll_ctl); pcie 983 drivers/pci/controller/pci-tegra.c static int tegra_pcie_phy_enable(struct tegra_pcie *pcie) pcie 985 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 986 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; pcie 991 drivers/pci/controller/pci-tegra.c pads_writel(pcie, 0x0, PADS_CTL_SEL); pcie 994 drivers/pci/controller/pci-tegra.c value = pads_readl(pcie, PADS_CTL); pcie 996 drivers/pci/controller/pci-tegra.c pads_writel(pcie, value, PADS_CTL); pcie 1002 drivers/pci/controller/pci-tegra.c value = pads_readl(pcie, soc->pads_pll_ctl); pcie 1005 drivers/pci/controller/pci-tegra.c pads_writel(pcie, value, soc->pads_pll_ctl); pcie 1008 drivers/pci/controller/pci-tegra.c value = pads_readl(pcie, soc->pads_pll_ctl); pcie 1010 drivers/pci/controller/pci-tegra.c pads_writel(pcie, value, soc->pads_pll_ctl); pcie 1015 drivers/pci/controller/pci-tegra.c value = pads_readl(pcie, soc->pads_pll_ctl); pcie 1017 drivers/pci/controller/pci-tegra.c pads_writel(pcie, value, soc->pads_pll_ctl); pcie 1020 drivers/pci/controller/pci-tegra.c err = tegra_pcie_pll_wait(pcie, 500); pcie 1027 drivers/pci/controller/pci-tegra.c value = pads_readl(pcie, PADS_CTL); pcie 1029 drivers/pci/controller/pci-tegra.c pads_writel(pcie, value, PADS_CTL); pcie 1032 drivers/pci/controller/pci-tegra.c value = pads_readl(pcie, PADS_CTL); pcie 1034 drivers/pci/controller/pci-tegra.c pads_writel(pcie, value, PADS_CTL); pcie 1039 drivers/pci/controller/pci-tegra.c static int tegra_pcie_phy_disable(struct tegra_pcie *pcie) pcie 1041 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; pcie 1045 drivers/pci/controller/pci-tegra.c value = pads_readl(pcie, PADS_CTL); pcie 1047 drivers/pci/controller/pci-tegra.c pads_writel(pcie, value, PADS_CTL); pcie 1050 drivers/pci/controller/pci-tegra.c value = pads_readl(pcie, PADS_CTL); pcie 1052 drivers/pci/controller/pci-tegra.c pads_writel(pcie, value, PADS_CTL); pcie 1055 drivers/pci/controller/pci-tegra.c value = pads_readl(pcie, soc->pads_pll_ctl); pcie 1057 drivers/pci/controller/pci-tegra.c pads_writel(pcie, value, soc->pads_pll_ctl); pcie 1066 drivers/pci/controller/pci-tegra.c struct device *dev = port->pcie->dev; pcie 1083 drivers/pci/controller/pci-tegra.c struct device *dev = port->pcie->dev; pcie 1099 drivers/pci/controller/pci-tegra.c static int tegra_pcie_phy_power_on(struct tegra_pcie *pcie) pcie 1101 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 1105 drivers/pci/controller/pci-tegra.c if (pcie->legacy_phy) { pcie 1106 drivers/pci/controller/pci-tegra.c if (pcie->phy) pcie 1107 drivers/pci/controller/pci-tegra.c err = phy_power_on(pcie->phy); pcie 1109 drivers/pci/controller/pci-tegra.c err = tegra_pcie_phy_enable(pcie); pcie 1117 drivers/pci/controller/pci-tegra.c list_for_each_entry(port, &pcie->ports, list) { pcie 1130 drivers/pci/controller/pci-tegra.c static int tegra_pcie_phy_power_off(struct tegra_pcie *pcie) pcie 1132 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 1136 drivers/pci/controller/pci-tegra.c if (pcie->legacy_phy) { pcie 1137 drivers/pci/controller/pci-tegra.c if (pcie->phy) pcie 1138 drivers/pci/controller/pci-tegra.c err = phy_power_off(pcie->phy); pcie 1140 drivers/pci/controller/pci-tegra.c err = tegra_pcie_phy_disable(pcie); pcie 1148 drivers/pci/controller/pci-tegra.c list_for_each_entry(port, &pcie->ports, list) { pcie 1161 drivers/pci/controller/pci-tegra.c static void tegra_pcie_enable_controller(struct tegra_pcie *pcie) pcie 1163 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; pcie 1168 drivers/pci/controller/pci-tegra.c if (pcie->phy) { pcie 1169 drivers/pci/controller/pci-tegra.c value = afi_readl(pcie, AFI_PLLE_CONTROL); pcie 1172 drivers/pci/controller/pci-tegra.c afi_writel(pcie, value, AFI_PLLE_CONTROL); pcie 1177 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_PEXBIAS_CTRL_0); pcie 1180 drivers/pci/controller/pci-tegra.c value = afi_readl(pcie, AFI_PCIE_CONFIG); pcie 1182 drivers/pci/controller/pci-tegra.c value |= AFI_PCIE_CONFIG_PCIE_DISABLE_ALL | pcie->xbar_config; pcie 1185 drivers/pci/controller/pci-tegra.c list_for_each_entry(port, &pcie->ports, list) { pcie 1190 drivers/pci/controller/pci-tegra.c afi_writel(pcie, value, AFI_PCIE_CONFIG); pcie 1193 drivers/pci/controller/pci-tegra.c value = afi_readl(pcie, AFI_FUSE); pcie 1195 drivers/pci/controller/pci-tegra.c afi_writel(pcie, value, AFI_FUSE); pcie 1197 drivers/pci/controller/pci-tegra.c value = afi_readl(pcie, AFI_FUSE); pcie 1199 drivers/pci/controller/pci-tegra.c afi_writel(pcie, value, AFI_FUSE); pcie 1203 drivers/pci/controller/pci-tegra.c value = afi_readl(pcie, AFI_CONFIGURATION); pcie 1206 drivers/pci/controller/pci-tegra.c afi_writel(pcie, value, AFI_CONFIGURATION); pcie 1215 drivers/pci/controller/pci-tegra.c afi_writel(pcie, value, AFI_AFI_INTR_ENABLE); pcie 1216 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0xffffffff, AFI_SM_INTR_ENABLE); pcie 1219 drivers/pci/controller/pci-tegra.c afi_writel(pcie, AFI_INTR_MASK_INT_MASK, AFI_INTR_MASK); pcie 1222 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_FPCI_ERROR_MASKS); pcie 1225 drivers/pci/controller/pci-tegra.c static void tegra_pcie_power_off(struct tegra_pcie *pcie) pcie 1227 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 1228 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; pcie 1231 drivers/pci/controller/pci-tegra.c reset_control_assert(pcie->afi_rst); pcie 1233 drivers/pci/controller/pci-tegra.c clk_disable_unprepare(pcie->pll_e); pcie 1235 drivers/pci/controller/pci-tegra.c clk_disable_unprepare(pcie->cml_clk); pcie 1236 drivers/pci/controller/pci-tegra.c clk_disable_unprepare(pcie->afi_clk); pcie 1241 drivers/pci/controller/pci-tegra.c err = regulator_bulk_disable(pcie->num_supplies, pcie->supplies); pcie 1246 drivers/pci/controller/pci-tegra.c static int tegra_pcie_power_on(struct tegra_pcie *pcie) pcie 1248 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 1249 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; pcie 1252 drivers/pci/controller/pci-tegra.c reset_control_assert(pcie->pcie_xrst); pcie 1253 drivers/pci/controller/pci-tegra.c reset_control_assert(pcie->afi_rst); pcie 1254 drivers/pci/controller/pci-tegra.c reset_control_assert(pcie->pex_rst); pcie 1260 drivers/pci/controller/pci-tegra.c err = regulator_bulk_enable(pcie->num_supplies, pcie->supplies); pcie 1277 drivers/pci/controller/pci-tegra.c err = clk_prepare_enable(pcie->afi_clk); pcie 1284 drivers/pci/controller/pci-tegra.c err = clk_prepare_enable(pcie->cml_clk); pcie 1291 drivers/pci/controller/pci-tegra.c err = clk_prepare_enable(pcie->pll_e); pcie 1297 drivers/pci/controller/pci-tegra.c reset_control_deassert(pcie->afi_rst); pcie 1303 drivers/pci/controller/pci-tegra.c clk_disable_unprepare(pcie->cml_clk); pcie 1305 drivers/pci/controller/pci-tegra.c clk_disable_unprepare(pcie->afi_clk); pcie 1310 drivers/pci/controller/pci-tegra.c regulator_bulk_disable(pcie->num_supplies, pcie->supplies); pcie 1315 drivers/pci/controller/pci-tegra.c static void tegra_pcie_apply_pad_settings(struct tegra_pcie *pcie) pcie 1317 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; pcie 1320 drivers/pci/controller/pci-tegra.c pads_writel(pcie, soc->pads_refclk_cfg0, PADS_REFCLK_CFG0); pcie 1323 drivers/pci/controller/pci-tegra.c pads_writel(pcie, soc->pads_refclk_cfg1, PADS_REFCLK_CFG1); pcie 1326 drivers/pci/controller/pci-tegra.c static int tegra_pcie_clocks_get(struct tegra_pcie *pcie) pcie 1328 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 1329 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; pcie 1331 drivers/pci/controller/pci-tegra.c pcie->pex_clk = devm_clk_get(dev, "pex"); pcie 1332 drivers/pci/controller/pci-tegra.c if (IS_ERR(pcie->pex_clk)) pcie 1333 drivers/pci/controller/pci-tegra.c return PTR_ERR(pcie->pex_clk); pcie 1335 drivers/pci/controller/pci-tegra.c pcie->afi_clk = devm_clk_get(dev, "afi"); pcie 1336 drivers/pci/controller/pci-tegra.c if (IS_ERR(pcie->afi_clk)) pcie 1337 drivers/pci/controller/pci-tegra.c return PTR_ERR(pcie->afi_clk); pcie 1339 drivers/pci/controller/pci-tegra.c pcie->pll_e = devm_clk_get(dev, "pll_e"); pcie 1340 drivers/pci/controller/pci-tegra.c if (IS_ERR(pcie->pll_e)) pcie 1341 drivers/pci/controller/pci-tegra.c return PTR_ERR(pcie->pll_e); pcie 1344 drivers/pci/controller/pci-tegra.c pcie->cml_clk = devm_clk_get(dev, "cml"); pcie 1345 drivers/pci/controller/pci-tegra.c if (IS_ERR(pcie->cml_clk)) pcie 1346 drivers/pci/controller/pci-tegra.c return PTR_ERR(pcie->cml_clk); pcie 1352 drivers/pci/controller/pci-tegra.c static int tegra_pcie_resets_get(struct tegra_pcie *pcie) pcie 1354 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 1356 drivers/pci/controller/pci-tegra.c pcie->pex_rst = devm_reset_control_get_exclusive(dev, "pex"); pcie 1357 drivers/pci/controller/pci-tegra.c if (IS_ERR(pcie->pex_rst)) pcie 1358 drivers/pci/controller/pci-tegra.c return PTR_ERR(pcie->pex_rst); pcie 1360 drivers/pci/controller/pci-tegra.c pcie->afi_rst = devm_reset_control_get_exclusive(dev, "afi"); pcie 1361 drivers/pci/controller/pci-tegra.c if (IS_ERR(pcie->afi_rst)) pcie 1362 drivers/pci/controller/pci-tegra.c return PTR_ERR(pcie->afi_rst); pcie 1364 drivers/pci/controller/pci-tegra.c pcie->pcie_xrst = devm_reset_control_get_exclusive(dev, "pcie_x"); pcie 1365 drivers/pci/controller/pci-tegra.c if (IS_ERR(pcie->pcie_xrst)) pcie 1366 drivers/pci/controller/pci-tegra.c return PTR_ERR(pcie->pcie_xrst); pcie 1371 drivers/pci/controller/pci-tegra.c static int tegra_pcie_phys_get_legacy(struct tegra_pcie *pcie) pcie 1373 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 1376 drivers/pci/controller/pci-tegra.c pcie->phy = devm_phy_optional_get(dev, "pcie"); pcie 1377 drivers/pci/controller/pci-tegra.c if (IS_ERR(pcie->phy)) { pcie 1378 drivers/pci/controller/pci-tegra.c err = PTR_ERR(pcie->phy); pcie 1383 drivers/pci/controller/pci-tegra.c err = phy_init(pcie->phy); pcie 1389 drivers/pci/controller/pci-tegra.c pcie->legacy_phy = true; pcie 1417 drivers/pci/controller/pci-tegra.c struct device *dev = port->pcie->dev; pcie 1447 drivers/pci/controller/pci-tegra.c static int tegra_pcie_phys_get(struct tegra_pcie *pcie) pcie 1449 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; pcie 1450 drivers/pci/controller/pci-tegra.c struct device_node *np = pcie->dev->of_node; pcie 1455 drivers/pci/controller/pci-tegra.c return tegra_pcie_phys_get_legacy(pcie); pcie 1457 drivers/pci/controller/pci-tegra.c list_for_each_entry(port, &pcie->ports, list) { pcie 1466 drivers/pci/controller/pci-tegra.c static void tegra_pcie_phys_put(struct tegra_pcie *pcie) pcie 1469 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 1472 drivers/pci/controller/pci-tegra.c if (pcie->legacy_phy) { pcie 1473 drivers/pci/controller/pci-tegra.c err = phy_exit(pcie->phy); pcie 1479 drivers/pci/controller/pci-tegra.c list_for_each_entry(port, &pcie->ports, list) { pcie 1490 drivers/pci/controller/pci-tegra.c static int tegra_pcie_get_resources(struct tegra_pcie *pcie) pcie 1492 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 1495 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; pcie 1498 drivers/pci/controller/pci-tegra.c err = tegra_pcie_clocks_get(pcie); pcie 1504 drivers/pci/controller/pci-tegra.c err = tegra_pcie_resets_get(pcie); pcie 1511 drivers/pci/controller/pci-tegra.c err = tegra_pcie_phys_get(pcie); pcie 1519 drivers/pci/controller/pci-tegra.c pcie->pads = devm_ioremap_resource(dev, pads); pcie 1520 drivers/pci/controller/pci-tegra.c if (IS_ERR(pcie->pads)) { pcie 1521 drivers/pci/controller/pci-tegra.c err = PTR_ERR(pcie->pads); pcie 1526 drivers/pci/controller/pci-tegra.c pcie->afi = devm_ioremap_resource(dev, afi); pcie 1527 drivers/pci/controller/pci-tegra.c if (IS_ERR(pcie->afi)) { pcie 1528 drivers/pci/controller/pci-tegra.c err = PTR_ERR(pcie->afi); pcie 1539 drivers/pci/controller/pci-tegra.c pcie->cs = *res; pcie 1542 drivers/pci/controller/pci-tegra.c pcie->cs.end = pcie->cs.start + SZ_4K - 1; pcie 1544 drivers/pci/controller/pci-tegra.c pcie->cfg = devm_ioremap_resource(dev, &pcie->cs); pcie 1545 drivers/pci/controller/pci-tegra.c if (IS_ERR(pcie->cfg)) { pcie 1546 drivers/pci/controller/pci-tegra.c err = PTR_ERR(pcie->cfg); pcie 1557 drivers/pci/controller/pci-tegra.c pcie->irq = err; pcie 1559 drivers/pci/controller/pci-tegra.c err = request_irq(pcie->irq, tegra_pcie_isr, IRQF_SHARED, "PCIE", pcie); pcie 1569 drivers/pci/controller/pci-tegra.c tegra_pcie_phys_put(pcie); pcie 1573 drivers/pci/controller/pci-tegra.c static int tegra_pcie_put_resources(struct tegra_pcie *pcie) pcie 1575 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; pcie 1577 drivers/pci/controller/pci-tegra.c if (pcie->irq > 0) pcie 1578 drivers/pci/controller/pci-tegra.c free_irq(pcie->irq, pcie); pcie 1581 drivers/pci/controller/pci-tegra.c tegra_pcie_phys_put(pcie); pcie 1588 drivers/pci/controller/pci-tegra.c struct tegra_pcie *pcie = port->pcie; pcie 1589 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; pcie 1594 drivers/pci/controller/pci-tegra.c val = afi_readl(pcie, AFI_PCIE_PME); pcie 1596 drivers/pci/controller/pci-tegra.c afi_writel(pcie, val, AFI_PCIE_PME); pcie 1599 drivers/pci/controller/pci-tegra.c err = readl_poll_timeout(pcie->afi + AFI_PCIE_PME, val, pcie 1602 drivers/pci/controller/pci-tegra.c dev_err(pcie->dev, "PME Ack is not received on port: %d\n", pcie 1607 drivers/pci/controller/pci-tegra.c val = afi_readl(pcie, AFI_PCIE_PME); pcie 1609 drivers/pci/controller/pci-tegra.c afi_writel(pcie, val, AFI_PCIE_PME); pcie 1645 drivers/pci/controller/pci-tegra.c struct tegra_pcie *pcie = data; pcie 1646 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 1647 drivers/pci/controller/pci-tegra.c struct tegra_msi *msi = &pcie->msi; pcie 1651 drivers/pci/controller/pci-tegra.c unsigned long reg = afi_readl(pcie, AFI_MSI_VEC0 + i * 4); pcie 1659 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 1 << offset, AFI_MSI_VEC0 + i * 4); pcie 1676 drivers/pci/controller/pci-tegra.c reg = afi_readl(pcie, AFI_MSI_VEC0 + i * 4); pcie 1748 drivers/pci/controller/pci-tegra.c static int tegra_pcie_msi_setup(struct tegra_pcie *pcie) pcie 1750 drivers/pci/controller/pci-tegra.c struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie); pcie 1751 drivers/pci/controller/pci-tegra.c struct platform_device *pdev = to_platform_device(pcie->dev); pcie 1752 drivers/pci/controller/pci-tegra.c struct tegra_msi *msi = &pcie->msi; pcie 1753 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 1778 drivers/pci/controller/pci-tegra.c tegra_msi_irq_chip.name, pcie); pcie 1808 drivers/pci/controller/pci-tegra.c free_irq(msi->irq, pcie); pcie 1814 drivers/pci/controller/pci-tegra.c static void tegra_pcie_enable_msi(struct tegra_pcie *pcie) pcie 1816 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; pcie 1817 drivers/pci/controller/pci-tegra.c struct tegra_msi *msi = &pcie->msi; pcie 1820 drivers/pci/controller/pci-tegra.c afi_writel(pcie, msi->phys >> soc->msi_base_shift, AFI_MSI_FPCI_BAR_ST); pcie 1821 drivers/pci/controller/pci-tegra.c afi_writel(pcie, msi->phys, AFI_MSI_AXI_BAR_ST); pcie 1823 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 1, AFI_MSI_BAR_SZ); pcie 1826 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0xffffffff, AFI_MSI_EN_VEC0); pcie 1827 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0xffffffff, AFI_MSI_EN_VEC1); pcie 1828 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0xffffffff, AFI_MSI_EN_VEC2); pcie 1829 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0xffffffff, AFI_MSI_EN_VEC3); pcie 1830 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0xffffffff, AFI_MSI_EN_VEC4); pcie 1831 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0xffffffff, AFI_MSI_EN_VEC5); pcie 1832 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0xffffffff, AFI_MSI_EN_VEC6); pcie 1833 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0xffffffff, AFI_MSI_EN_VEC7); pcie 1836 drivers/pci/controller/pci-tegra.c reg = afi_readl(pcie, AFI_INTR_MASK); pcie 1838 drivers/pci/controller/pci-tegra.c afi_writel(pcie, reg, AFI_INTR_MASK); pcie 1841 drivers/pci/controller/pci-tegra.c static void tegra_pcie_msi_teardown(struct tegra_pcie *pcie) pcie 1843 drivers/pci/controller/pci-tegra.c struct tegra_msi *msi = &pcie->msi; pcie 1846 drivers/pci/controller/pci-tegra.c dma_free_attrs(pcie->dev, PAGE_SIZE, msi->virt, msi->phys, pcie 1850 drivers/pci/controller/pci-tegra.c free_irq(msi->irq, pcie); pcie 1861 drivers/pci/controller/pci-tegra.c static int tegra_pcie_disable_msi(struct tegra_pcie *pcie) pcie 1866 drivers/pci/controller/pci-tegra.c value = afi_readl(pcie, AFI_INTR_MASK); pcie 1868 drivers/pci/controller/pci-tegra.c afi_writel(pcie, value, AFI_INTR_MASK); pcie 1871 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_MSI_EN_VEC0); pcie 1872 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_MSI_EN_VEC1); pcie 1873 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_MSI_EN_VEC2); pcie 1874 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_MSI_EN_VEC3); pcie 1875 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_MSI_EN_VEC4); pcie 1876 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_MSI_EN_VEC5); pcie 1877 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_MSI_EN_VEC6); pcie 1878 drivers/pci/controller/pci-tegra.c afi_writel(pcie, 0, AFI_MSI_EN_VEC7); pcie 1883 drivers/pci/controller/pci-tegra.c static void tegra_pcie_disable_interrupts(struct tegra_pcie *pcie) pcie 1887 drivers/pci/controller/pci-tegra.c value = afi_readl(pcie, AFI_INTR_MASK); pcie 1889 drivers/pci/controller/pci-tegra.c afi_writel(pcie, value, AFI_INTR_MASK); pcie 1892 drivers/pci/controller/pci-tegra.c static int tegra_pcie_get_xbar_config(struct tegra_pcie *pcie, u32 lanes, pcie 1895 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 1998 drivers/pci/controller/pci-tegra.c static int tegra_pcie_get_legacy_regulators(struct tegra_pcie *pcie) pcie 2000 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 2004 drivers/pci/controller/pci-tegra.c pcie->num_supplies = 3; pcie 2006 drivers/pci/controller/pci-tegra.c pcie->num_supplies = 2; pcie 2008 drivers/pci/controller/pci-tegra.c if (pcie->num_supplies == 0) { pcie 2013 drivers/pci/controller/pci-tegra.c pcie->supplies = devm_kcalloc(dev, pcie->num_supplies, pcie 2014 drivers/pci/controller/pci-tegra.c sizeof(*pcie->supplies), pcie 2016 drivers/pci/controller/pci-tegra.c if (!pcie->supplies) pcie 2019 drivers/pci/controller/pci-tegra.c pcie->supplies[0].supply = "pex-clk"; pcie 2020 drivers/pci/controller/pci-tegra.c pcie->supplies[1].supply = "vdd"; pcie 2022 drivers/pci/controller/pci-tegra.c if (pcie->num_supplies > 2) pcie 2023 drivers/pci/controller/pci-tegra.c pcie->supplies[2].supply = "avdd"; pcie 2025 drivers/pci/controller/pci-tegra.c return devm_regulator_bulk_get(dev, pcie->num_supplies, pcie->supplies); pcie 2037 drivers/pci/controller/pci-tegra.c static int tegra_pcie_get_regulators(struct tegra_pcie *pcie, u32 lane_mask) pcie 2039 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 2044 drivers/pci/controller/pci-tegra.c pcie->num_supplies = 4; pcie 2046 drivers/pci/controller/pci-tegra.c pcie->supplies = devm_kcalloc(pcie->dev, pcie->num_supplies, pcie 2047 drivers/pci/controller/pci-tegra.c sizeof(*pcie->supplies), pcie 2049 drivers/pci/controller/pci-tegra.c if (!pcie->supplies) pcie 2052 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "dvdd-pex"; pcie 2053 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "hvdd-pex-pll"; pcie 2054 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "hvdd-pex"; pcie 2055 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "vddio-pexctl-aud"; pcie 2057 drivers/pci/controller/pci-tegra.c pcie->num_supplies = 6; pcie 2059 drivers/pci/controller/pci-tegra.c pcie->supplies = devm_kcalloc(pcie->dev, pcie->num_supplies, pcie 2060 drivers/pci/controller/pci-tegra.c sizeof(*pcie->supplies), pcie 2062 drivers/pci/controller/pci-tegra.c if (!pcie->supplies) pcie 2065 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "avdd-pll-uerefe"; pcie 2066 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "hvddio-pex"; pcie 2067 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "dvddio-pex"; pcie 2068 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "dvdd-pex-pll"; pcie 2069 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "hvdd-pex-pll-e"; pcie 2070 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "vddio-pex-ctl"; pcie 2072 drivers/pci/controller/pci-tegra.c pcie->num_supplies = 7; pcie 2074 drivers/pci/controller/pci-tegra.c pcie->supplies = devm_kcalloc(dev, pcie->num_supplies, pcie 2075 drivers/pci/controller/pci-tegra.c sizeof(*pcie->supplies), pcie 2077 drivers/pci/controller/pci-tegra.c if (!pcie->supplies) pcie 2080 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "avddio-pex"; pcie 2081 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "dvddio-pex"; pcie 2082 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "avdd-pex-pll"; pcie 2083 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "hvdd-pex"; pcie 2084 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "hvdd-pex-pll-e"; pcie 2085 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "vddio-pex-ctl"; pcie 2086 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "avdd-pll-erefe"; pcie 2098 drivers/pci/controller/pci-tegra.c pcie->num_supplies = 4 + (need_pexa ? 2 : 0) + pcie 2101 drivers/pci/controller/pci-tegra.c pcie->supplies = devm_kcalloc(dev, pcie->num_supplies, pcie 2102 drivers/pci/controller/pci-tegra.c sizeof(*pcie->supplies), pcie 2104 drivers/pci/controller/pci-tegra.c if (!pcie->supplies) pcie 2107 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "avdd-pex-pll"; pcie 2108 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "hvdd-pex"; pcie 2109 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "vddio-pex-ctl"; pcie 2110 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "avdd-plle"; pcie 2113 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "avdd-pexa"; pcie 2114 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "vdd-pexa"; pcie 2118 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "avdd-pexb"; pcie 2119 drivers/pci/controller/pci-tegra.c pcie->supplies[i++].supply = "vdd-pexb"; pcie 2122 drivers/pci/controller/pci-tegra.c pcie->num_supplies = 5; pcie 2124 drivers/pci/controller/pci-tegra.c pcie->supplies = devm_kcalloc(dev, pcie->num_supplies, pcie 2125 drivers/pci/controller/pci-tegra.c sizeof(*pcie->supplies), pcie 2127 drivers/pci/controller/pci-tegra.c if (!pcie->supplies) pcie 2130 drivers/pci/controller/pci-tegra.c pcie->supplies[0].supply = "avdd-pex"; pcie 2131 drivers/pci/controller/pci-tegra.c pcie->supplies[1].supply = "vdd-pex"; pcie 2132 drivers/pci/controller/pci-tegra.c pcie->supplies[2].supply = "avdd-pex-pll"; pcie 2133 drivers/pci/controller/pci-tegra.c pcie->supplies[3].supply = "avdd-plle"; pcie 2134 drivers/pci/controller/pci-tegra.c pcie->supplies[4].supply = "vddio-pex-clk"; pcie 2137 drivers/pci/controller/pci-tegra.c if (of_regulator_bulk_available(dev->of_node, pcie->supplies, pcie 2138 drivers/pci/controller/pci-tegra.c pcie->num_supplies)) pcie 2139 drivers/pci/controller/pci-tegra.c return devm_regulator_bulk_get(dev, pcie->num_supplies, pcie 2140 drivers/pci/controller/pci-tegra.c pcie->supplies); pcie 2149 drivers/pci/controller/pci-tegra.c devm_kfree(dev, pcie->supplies); pcie 2150 drivers/pci/controller/pci-tegra.c pcie->num_supplies = 0; pcie 2152 drivers/pci/controller/pci-tegra.c return tegra_pcie_get_legacy_regulators(pcie); pcie 2155 drivers/pci/controller/pci-tegra.c static int tegra_pcie_parse_dt(struct tegra_pcie *pcie) pcie 2157 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 2159 drivers/pci/controller/pci-tegra.c const struct tegra_pcie_soc *soc = pcie->soc; pcie 2180 drivers/pci/controller/pci-tegra.c pcie->offset.io = res.start - range.pci_addr; pcie 2182 drivers/pci/controller/pci-tegra.c memcpy(&pcie->pio, &res, sizeof(res)); pcie 2183 drivers/pci/controller/pci-tegra.c pcie->pio.name = np->full_name; pcie 2193 drivers/pci/controller/pci-tegra.c pcie->io.start = range.cpu_addr; pcie 2194 drivers/pci/controller/pci-tegra.c pcie->io.end = range.cpu_addr + range.size - 1; pcie 2195 drivers/pci/controller/pci-tegra.c pcie->io.flags = IORESOURCE_MEM; pcie 2196 drivers/pci/controller/pci-tegra.c pcie->io.name = "I/O"; pcie 2198 drivers/pci/controller/pci-tegra.c memcpy(&res, &pcie->io, sizeof(res)); pcie 2208 drivers/pci/controller/pci-tegra.c pcie->offset.mem = res.start - range.pci_addr; pcie 2211 drivers/pci/controller/pci-tegra.c memcpy(&pcie->prefetch, &res, sizeof(res)); pcie 2212 drivers/pci/controller/pci-tegra.c pcie->prefetch.name = "prefetchable"; pcie 2214 drivers/pci/controller/pci-tegra.c memcpy(&pcie->mem, &res, sizeof(res)); pcie 2215 drivers/pci/controller/pci-tegra.c pcie->mem.name = "non-prefetchable"; pcie 2221 drivers/pci/controller/pci-tegra.c err = of_pci_parse_bus_range(np, &pcie->busn); pcie 2224 drivers/pci/controller/pci-tegra.c pcie->busn.name = np->name; pcie 2225 drivers/pci/controller/pci-tegra.c pcie->busn.start = 0; pcie 2226 drivers/pci/controller/pci-tegra.c pcie->busn.end = 0xff; pcie 2227 drivers/pci/controller/pci-tegra.c pcie->busn.flags = IORESOURCE_BUS; pcie 2291 drivers/pci/controller/pci-tegra.c rp->pcie = pcie; pcie 2323 drivers/pci/controller/pci-tegra.c list_add_tail(&rp->list, &pcie->ports); pcie 2326 drivers/pci/controller/pci-tegra.c err = tegra_pcie_get_xbar_config(pcie, lanes, &pcie->xbar_config); pcie 2332 drivers/pci/controller/pci-tegra.c err = tegra_pcie_get_regulators(pcie, mask); pcie 2351 drivers/pci/controller/pci-tegra.c struct device *dev = port->pcie->dev; pcie 2396 drivers/pci/controller/pci-tegra.c static void tegra_pcie_change_link_speed(struct tegra_pcie *pcie) pcie 2398 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 2403 drivers/pci/controller/pci-tegra.c list_for_each_entry(port, &pcie->ports, list) { pcie 2454 drivers/pci/controller/pci-tegra.c static void tegra_pcie_enable_ports(struct tegra_pcie *pcie) pcie 2456 drivers/pci/controller/pci-tegra.c struct device *dev = pcie->dev; pcie 2459 drivers/pci/controller/pci-tegra.c list_for_each_entry_safe(port, tmp, &pcie->ports, list) { pcie 2467 drivers/pci/controller/pci-tegra.c reset_control_deassert(pcie->pcie_xrst); pcie 2469 drivers/pci/controller/pci-tegra.c list_for_each_entry_safe(port, tmp, &pcie->ports, list) { pcie 2479 drivers/pci/controller/pci-tegra.c if (pcie->soc->has_gen2) pcie 2480 drivers/pci/controller/pci-tegra.c tegra_pcie_change_link_speed(pcie); pcie 2483 drivers/pci/controller/pci-tegra.c static void tegra_pcie_disable_ports(struct tegra_pcie *pcie) pcie 2487 drivers/pci/controller/pci-tegra.c reset_control_assert(pcie->pcie_xrst); pcie 2489 drivers/pci/controller/pci-tegra.c list_for_each_entry_safe(port, tmp, &pcie->ports, list) pcie 2651 drivers/pci/controller/pci-tegra.c struct tegra_pcie *pcie = s->private; pcie 2653 drivers/pci/controller/pci-tegra.c if (list_empty(&pcie->ports)) pcie 2658 drivers/pci/controller/pci-tegra.c return seq_list_start(&pcie->ports, *pos); pcie 2663 drivers/pci/controller/pci-tegra.c struct tegra_pcie *pcie = s->private; pcie 2665 drivers/pci/controller/pci-tegra.c return seq_list_next(v, &pcie->ports, pos); pcie 2715 drivers/pci/controller/pci-tegra.c struct tegra_pcie *pcie = inode->i_private; pcie 2724 drivers/pci/controller/pci-tegra.c s->private = pcie; pcie 2737 drivers/pci/controller/pci-tegra.c static void tegra_pcie_debugfs_exit(struct tegra_pcie *pcie) pcie 2739 drivers/pci/controller/pci-tegra.c debugfs_remove_recursive(pcie->debugfs); pcie 2740 drivers/pci/controller/pci-tegra.c pcie->debugfs = NULL; pcie 2743 drivers/pci/controller/pci-tegra.c static int tegra_pcie_debugfs_init(struct tegra_pcie *pcie) pcie 2747 drivers/pci/controller/pci-tegra.c pcie->debugfs = debugfs_create_dir("pcie", NULL); pcie 2748 drivers/pci/controller/pci-tegra.c if (!pcie->debugfs) pcie 2751 drivers/pci/controller/pci-tegra.c file = debugfs_create_file("ports", S_IFREG | S_IRUGO, pcie->debugfs, pcie 2752 drivers/pci/controller/pci-tegra.c pcie, &tegra_pcie_ports_ops); pcie 2759 drivers/pci/controller/pci-tegra.c tegra_pcie_debugfs_exit(pcie); pcie 2767 drivers/pci/controller/pci-tegra.c struct tegra_pcie *pcie; pcie 2771 drivers/pci/controller/pci-tegra.c host = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); pcie 2775 drivers/pci/controller/pci-tegra.c pcie = pci_host_bridge_priv(host); pcie 2776 drivers/pci/controller/pci-tegra.c host->sysdata = pcie; pcie 2777 drivers/pci/controller/pci-tegra.c platform_set_drvdata(pdev, pcie); pcie 2779 drivers/pci/controller/pci-tegra.c pcie->soc = of_device_get_match_data(dev); pcie 2780 drivers/pci/controller/pci-tegra.c INIT_LIST_HEAD(&pcie->ports); pcie 2781 drivers/pci/controller/pci-tegra.c pcie->dev = dev; pcie 2783 drivers/pci/controller/pci-tegra.c err = tegra_pcie_parse_dt(pcie); pcie 2787 drivers/pci/controller/pci-tegra.c err = tegra_pcie_get_resources(pcie); pcie 2793 drivers/pci/controller/pci-tegra.c err = tegra_pcie_msi_setup(pcie); pcie 2799 drivers/pci/controller/pci-tegra.c pm_runtime_enable(pcie->dev); pcie 2800 drivers/pci/controller/pci-tegra.c err = pm_runtime_get_sync(pcie->dev); pcie 2806 drivers/pci/controller/pci-tegra.c err = tegra_pcie_request_resources(pcie); pcie 2810 drivers/pci/controller/pci-tegra.c host->busnr = pcie->busn.start; pcie 2831 drivers/pci/controller/pci-tegra.c err = tegra_pcie_debugfs_init(pcie); pcie 2839 drivers/pci/controller/pci-tegra.c tegra_pcie_free_resources(pcie); pcie 2841 drivers/pci/controller/pci-tegra.c pm_runtime_put_sync(pcie->dev); pcie 2842 drivers/pci/controller/pci-tegra.c pm_runtime_disable(pcie->dev); pcie 2844 drivers/pci/controller/pci-tegra.c tegra_pcie_msi_teardown(pcie); pcie 2846 drivers/pci/controller/pci-tegra.c tegra_pcie_put_resources(pcie); pcie 2852 drivers/pci/controller/pci-tegra.c struct tegra_pcie *pcie = platform_get_drvdata(pdev); pcie 2853 drivers/pci/controller/pci-tegra.c struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie); pcie 2857 drivers/pci/controller/pci-tegra.c tegra_pcie_debugfs_exit(pcie); pcie 2861 drivers/pci/controller/pci-tegra.c tegra_pcie_free_resources(pcie); pcie 2862 drivers/pci/controller/pci-tegra.c pm_runtime_put_sync(pcie->dev); pcie 2863 drivers/pci/controller/pci-tegra.c pm_runtime_disable(pcie->dev); pcie 2866 drivers/pci/controller/pci-tegra.c tegra_pcie_msi_teardown(pcie); pcie 2868 drivers/pci/controller/pci-tegra.c tegra_pcie_put_resources(pcie); pcie 2870 drivers/pci/controller/pci-tegra.c list_for_each_entry_safe(port, tmp, &pcie->ports, list) pcie 2878 drivers/pci/controller/pci-tegra.c struct tegra_pcie *pcie = dev_get_drvdata(dev); pcie 2882 drivers/pci/controller/pci-tegra.c list_for_each_entry(port, &pcie->ports, list) pcie 2885 drivers/pci/controller/pci-tegra.c tegra_pcie_disable_ports(pcie); pcie 2891 drivers/pci/controller/pci-tegra.c tegra_pcie_disable_interrupts(pcie); pcie 2893 drivers/pci/controller/pci-tegra.c if (pcie->soc->program_uphy) { pcie 2894 drivers/pci/controller/pci-tegra.c err = tegra_pcie_phy_power_off(pcie); pcie 2899 drivers/pci/controller/pci-tegra.c reset_control_assert(pcie->pex_rst); pcie 2900 drivers/pci/controller/pci-tegra.c clk_disable_unprepare(pcie->pex_clk); pcie 2903 drivers/pci/controller/pci-tegra.c tegra_pcie_disable_msi(pcie); pcie 2906 drivers/pci/controller/pci-tegra.c tegra_pcie_power_off(pcie); pcie 2913 drivers/pci/controller/pci-tegra.c struct tegra_pcie *pcie = dev_get_drvdata(dev); pcie 2916 drivers/pci/controller/pci-tegra.c err = tegra_pcie_power_on(pcie); pcie 2928 drivers/pci/controller/pci-tegra.c tegra_pcie_enable_controller(pcie); pcie 2929 drivers/pci/controller/pci-tegra.c tegra_pcie_setup_translations(pcie); pcie 2932 drivers/pci/controller/pci-tegra.c tegra_pcie_enable_msi(pcie); pcie 2934 drivers/pci/controller/pci-tegra.c err = clk_prepare_enable(pcie->pex_clk); pcie 2940 drivers/pci/controller/pci-tegra.c reset_control_deassert(pcie->pex_rst); pcie 2942 drivers/pci/controller/pci-tegra.c if (pcie->soc->program_uphy) { pcie 2943 drivers/pci/controller/pci-tegra.c err = tegra_pcie_phy_power_on(pcie); pcie 2950 drivers/pci/controller/pci-tegra.c tegra_pcie_apply_pad_settings(pcie); pcie 2951 drivers/pci/controller/pci-tegra.c tegra_pcie_enable_ports(pcie); pcie 2956 drivers/pci/controller/pci-tegra.c reset_control_assert(pcie->pex_rst); pcie 2957 drivers/pci/controller/pci-tegra.c clk_disable_unprepare(pcie->pex_clk); pcie 2961 drivers/pci/controller/pci-tegra.c tegra_pcie_power_off(pcie); pcie 45 drivers/pci/controller/pcie-altera.c #define S10_RP_CFG_ADDR(pcie, reg) \ pcie 46 drivers/pci/controller/pcie-altera.c (((pcie)->hip_base) + (reg) + (1 << 20)) pcie 47 drivers/pci/controller/pcie-altera.c #define S10_RP_SECONDARY(pcie) \ pcie 48 drivers/pci/controller/pcie-altera.c readb(S10_RP_CFG_ADDR(pcie, PCI_SECONDARY_BUS)) pcie 60 drivers/pci/controller/pcie-altera.c #define TLP_CFG_DW0(pcie, cfg) \ pcie 63 drivers/pci/controller/pcie-altera.c #define TLP_CFG_DW1(pcie, tag, be) \ pcie 64 drivers/pci/controller/pcie-altera.c (((TLP_REQ_ID(pcie->root_bus_nr, RP_DEVFN)) << 16) | (tag << 8) | (be)) pcie 100 drivers/pci/controller/pcie-altera.c int (*tlp_read_pkt)(struct altera_pcie *pcie, u32 *value); pcie 101 drivers/pci/controller/pcie-altera.c void (*tlp_write_pkt)(struct altera_pcie *pcie, u32 *headers, pcie 103 drivers/pci/controller/pcie-altera.c bool (*get_link_status)(struct altera_pcie *pcie); pcie 104 drivers/pci/controller/pcie-altera.c int (*rp_read_cfg)(struct altera_pcie *pcie, int where, pcie 106 drivers/pci/controller/pcie-altera.c int (*rp_write_cfg)(struct altera_pcie *pcie, u8 busno, pcie 126 drivers/pci/controller/pcie-altera.c static inline void cra_writel(struct altera_pcie *pcie, const u32 value, pcie 129 drivers/pci/controller/pcie-altera.c writel_relaxed(value, pcie->cra_base + reg); pcie 132 drivers/pci/controller/pcie-altera.c static inline u32 cra_readl(struct altera_pcie *pcie, const u32 reg) pcie 134 drivers/pci/controller/pcie-altera.c return readl_relaxed(pcie->cra_base + reg); pcie 137 drivers/pci/controller/pcie-altera.c static bool altera_pcie_link_up(struct altera_pcie *pcie) pcie 139 drivers/pci/controller/pcie-altera.c return !!((cra_readl(pcie, RP_LTSSM) & RP_LTSSM_MASK) == LTSSM_L0); pcie 142 drivers/pci/controller/pcie-altera.c static bool s10_altera_pcie_link_up(struct altera_pcie *pcie) pcie 144 drivers/pci/controller/pcie-altera.c void __iomem *addr = S10_RP_CFG_ADDR(pcie, pcie 145 drivers/pci/controller/pcie-altera.c pcie->pcie_data->cap_offset + pcie 170 drivers/pci/controller/pcie-altera.c static void tlp_write_tx(struct altera_pcie *pcie, pcie 173 drivers/pci/controller/pcie-altera.c cra_writel(pcie, tlp_rp_regdata->reg0, RP_TX_REG0); pcie 174 drivers/pci/controller/pcie-altera.c cra_writel(pcie, tlp_rp_regdata->reg1, RP_TX_REG1); pcie 175 drivers/pci/controller/pcie-altera.c cra_writel(pcie, tlp_rp_regdata->ctrl, RP_TX_CNTRL); pcie 178 drivers/pci/controller/pcie-altera.c static void s10_tlp_write_tx(struct altera_pcie *pcie, u32 reg0, u32 ctrl) pcie 180 drivers/pci/controller/pcie-altera.c cra_writel(pcie, reg0, RP_TX_REG0); pcie 181 drivers/pci/controller/pcie-altera.c cra_writel(pcie, ctrl, S10_RP_TX_CNTRL); pcie 184 drivers/pci/controller/pcie-altera.c static bool altera_pcie_valid_device(struct altera_pcie *pcie, pcie 188 drivers/pci/controller/pcie-altera.c if (bus->number != pcie->root_bus_nr) { pcie 189 drivers/pci/controller/pcie-altera.c if (!pcie->pcie_data->ops->get_link_status(pcie)) pcie 194 drivers/pci/controller/pcie-altera.c if (bus->number == pcie->root_bus_nr && dev > 0) pcie 200 drivers/pci/controller/pcie-altera.c static int tlp_read_packet(struct altera_pcie *pcie, u32 *value) pcie 213 drivers/pci/controller/pcie-altera.c ctrl = cra_readl(pcie, RP_RXCPL_STATUS); pcie 215 drivers/pci/controller/pcie-altera.c reg0 = cra_readl(pcie, RP_RXCPL_REG0); pcie 216 drivers/pci/controller/pcie-altera.c reg1 = cra_readl(pcie, RP_RXCPL_REG1); pcie 239 drivers/pci/controller/pcie-altera.c static int s10_tlp_read_packet(struct altera_pcie *pcie, u32 *value) pcie 245 drivers/pci/controller/pcie-altera.c struct device *dev = &pcie->pdev->dev; pcie 248 drivers/pci/controller/pcie-altera.c ctrl = cra_readl(pcie, S10_RP_RXCPL_STATUS); pcie 251 drivers/pci/controller/pcie-altera.c dw[0] = cra_readl(pcie, S10_RP_RXCPL_REG); pcie 266 drivers/pci/controller/pcie-altera.c ctrl = cra_readl(pcie, S10_RP_RXCPL_STATUS); pcie 267 drivers/pci/controller/pcie-altera.c dw[count++] = cra_readl(pcie, S10_RP_RXCPL_REG); pcie 286 drivers/pci/controller/pcie-altera.c static void tlp_write_packet(struct altera_pcie *pcie, u32 *headers, pcie 294 drivers/pci/controller/pcie-altera.c tlp_write_tx(pcie, &tlp_rp_regdata); pcie 300 drivers/pci/controller/pcie-altera.c tlp_write_tx(pcie, &tlp_rp_regdata); pcie 310 drivers/pci/controller/pcie-altera.c tlp_write_tx(pcie, &tlp_rp_regdata); pcie 313 drivers/pci/controller/pcie-altera.c static void s10_tlp_write_packet(struct altera_pcie *pcie, u32 *headers, pcie 316 drivers/pci/controller/pcie-altera.c s10_tlp_write_tx(pcie, headers[0], RP_TX_SOP); pcie 317 drivers/pci/controller/pcie-altera.c s10_tlp_write_tx(pcie, headers[1], 0); pcie 318 drivers/pci/controller/pcie-altera.c s10_tlp_write_tx(pcie, headers[2], 0); pcie 319 drivers/pci/controller/pcie-altera.c s10_tlp_write_tx(pcie, data, RP_TX_EOP); pcie 322 drivers/pci/controller/pcie-altera.c static void get_tlp_header(struct altera_pcie *pcie, u8 bus, u32 devfn, pcie 326 drivers/pci/controller/pcie-altera.c u8 cfg0 = read ? pcie->pcie_data->cfgrd0 : pcie->pcie_data->cfgwr0; pcie 327 drivers/pci/controller/pcie-altera.c u8 cfg1 = read ? pcie->pcie_data->cfgrd1 : pcie->pcie_data->cfgwr1; pcie 330 drivers/pci/controller/pcie-altera.c if (pcie->pcie_data->version == ALTERA_PCIE_V1) pcie 331 drivers/pci/controller/pcie-altera.c cfg = (bus == pcie->root_bus_nr) ? cfg0 : cfg1; pcie 333 drivers/pci/controller/pcie-altera.c cfg = (bus > S10_RP_SECONDARY(pcie)) ? cfg0 : cfg1; pcie 335 drivers/pci/controller/pcie-altera.c headers[0] = TLP_CFG_DW0(pcie, cfg); pcie 336 drivers/pci/controller/pcie-altera.c headers[1] = TLP_CFG_DW1(pcie, tag, byte_en); pcie 340 drivers/pci/controller/pcie-altera.c static int tlp_cfg_dword_read(struct altera_pcie *pcie, u8 bus, u32 devfn, pcie 345 drivers/pci/controller/pcie-altera.c get_tlp_header(pcie, bus, devfn, where, byte_en, true, pcie 348 drivers/pci/controller/pcie-altera.c pcie->pcie_data->ops->tlp_write_pkt(pcie, headers, 0, false); pcie 350 drivers/pci/controller/pcie-altera.c return pcie->pcie_data->ops->tlp_read_pkt(pcie, value); pcie 353 drivers/pci/controller/pcie-altera.c static int tlp_cfg_dword_write(struct altera_pcie *pcie, u8 bus, u32 devfn, pcie 359 drivers/pci/controller/pcie-altera.c get_tlp_header(pcie, bus, devfn, where, byte_en, false, pcie 364 drivers/pci/controller/pcie-altera.c pcie->pcie_data->ops->tlp_write_pkt(pcie, headers, pcie 367 drivers/pci/controller/pcie-altera.c pcie->pcie_data->ops->tlp_write_pkt(pcie, headers, pcie 370 drivers/pci/controller/pcie-altera.c ret = pcie->pcie_data->ops->tlp_read_pkt(pcie, NULL); pcie 378 drivers/pci/controller/pcie-altera.c if ((bus == pcie->root_bus_nr) && (where == PCI_PRIMARY_BUS)) pcie 379 drivers/pci/controller/pcie-altera.c pcie->root_bus_nr = (u8)(value); pcie 384 drivers/pci/controller/pcie-altera.c static int s10_rp_read_cfg(struct altera_pcie *pcie, int where, pcie 387 drivers/pci/controller/pcie-altera.c void __iomem *addr = S10_RP_CFG_ADDR(pcie, where); pcie 404 drivers/pci/controller/pcie-altera.c static int s10_rp_write_cfg(struct altera_pcie *pcie, u8 busno, pcie 407 drivers/pci/controller/pcie-altera.c void __iomem *addr = S10_RP_CFG_ADDR(pcie, where); pcie 425 drivers/pci/controller/pcie-altera.c if (busno == pcie->root_bus_nr && where == PCI_PRIMARY_BUS) pcie 426 drivers/pci/controller/pcie-altera.c pcie->root_bus_nr = value & 0xff; pcie 431 drivers/pci/controller/pcie-altera.c static int _altera_pcie_cfg_read(struct altera_pcie *pcie, u8 busno, pcie 439 drivers/pci/controller/pcie-altera.c if (busno == pcie->root_bus_nr && pcie->pcie_data->ops->rp_read_cfg) pcie 440 drivers/pci/controller/pcie-altera.c return pcie->pcie_data->ops->rp_read_cfg(pcie, where, pcie 455 drivers/pci/controller/pcie-altera.c ret = tlp_cfg_dword_read(pcie, busno, devfn, pcie 475 drivers/pci/controller/pcie-altera.c static int _altera_pcie_cfg_write(struct altera_pcie *pcie, u8 busno, pcie 483 drivers/pci/controller/pcie-altera.c if (busno == pcie->root_bus_nr && pcie->pcie_data->ops->rp_write_cfg) pcie 484 drivers/pci/controller/pcie-altera.c return pcie->pcie_data->ops->rp_write_cfg(pcie, busno, pcie 502 drivers/pci/controller/pcie-altera.c return tlp_cfg_dword_write(pcie, busno, devfn, (where & ~DWORD_MASK), pcie 509 drivers/pci/controller/pcie-altera.c struct altera_pcie *pcie = bus->sysdata; pcie 514 drivers/pci/controller/pcie-altera.c if (!altera_pcie_valid_device(pcie, bus, PCI_SLOT(devfn))) { pcie 519 drivers/pci/controller/pcie-altera.c return _altera_pcie_cfg_read(pcie, bus->number, devfn, where, size, pcie 526 drivers/pci/controller/pcie-altera.c struct altera_pcie *pcie = bus->sysdata; pcie 531 drivers/pci/controller/pcie-altera.c if (!altera_pcie_valid_device(pcie, bus, PCI_SLOT(devfn))) pcie 534 drivers/pci/controller/pcie-altera.c return _altera_pcie_cfg_write(pcie, bus->number, devfn, where, size, pcie 543 drivers/pci/controller/pcie-altera.c static int altera_read_cap_word(struct altera_pcie *pcie, u8 busno, pcie 549 drivers/pci/controller/pcie-altera.c ret = _altera_pcie_cfg_read(pcie, busno, devfn, pcie 550 drivers/pci/controller/pcie-altera.c pcie->pcie_data->cap_offset + offset, pcie 557 drivers/pci/controller/pcie-altera.c static int altera_write_cap_word(struct altera_pcie *pcie, u8 busno, pcie 560 drivers/pci/controller/pcie-altera.c return _altera_pcie_cfg_write(pcie, busno, devfn, pcie 561 drivers/pci/controller/pcie-altera.c pcie->pcie_data->cap_offset + offset, pcie 566 drivers/pci/controller/pcie-altera.c static void altera_wait_link_retrain(struct altera_pcie *pcie) pcie 568 drivers/pci/controller/pcie-altera.c struct device *dev = &pcie->pdev->dev; pcie 575 drivers/pci/controller/pcie-altera.c altera_read_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN, pcie 590 drivers/pci/controller/pcie-altera.c if (pcie->pcie_data->ops->get_link_status(pcie)) pcie 601 drivers/pci/controller/pcie-altera.c static void altera_pcie_retrain(struct altera_pcie *pcie) pcie 605 drivers/pci/controller/pcie-altera.c if (!pcie->pcie_data->ops->get_link_status(pcie)) pcie 612 drivers/pci/controller/pcie-altera.c altera_read_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN, PCI_EXP_LNKCAP, pcie 617 drivers/pci/controller/pcie-altera.c altera_read_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN, PCI_EXP_LNKSTA, pcie 620 drivers/pci/controller/pcie-altera.c altera_read_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN, pcie 623 drivers/pci/controller/pcie-altera.c altera_write_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN, pcie 626 drivers/pci/controller/pcie-altera.c altera_wait_link_retrain(pcie); pcie 646 drivers/pci/controller/pcie-altera.c struct altera_pcie *pcie; pcie 653 drivers/pci/controller/pcie-altera.c pcie = irq_desc_get_handler_data(desc); pcie 654 drivers/pci/controller/pcie-altera.c dev = &pcie->pdev->dev; pcie 656 drivers/pci/controller/pcie-altera.c while ((status = cra_readl(pcie, P2A_INT_STATUS) pcie 660 drivers/pci/controller/pcie-altera.c cra_writel(pcie, 1 << bit, P2A_INT_STATUS); pcie 662 drivers/pci/controller/pcie-altera.c virq = irq_find_mapping(pcie->irq_domain, bit); pcie 673 drivers/pci/controller/pcie-altera.c static int altera_pcie_parse_request_of_pci_ranges(struct altera_pcie *pcie) pcie 676 drivers/pci/controller/pcie-altera.c struct device *dev = &pcie->pdev->dev; pcie 680 drivers/pci/controller/pcie-altera.c &pcie->resources, NULL); pcie 684 drivers/pci/controller/pcie-altera.c err = devm_request_pci_bus_resources(dev, &pcie->resources); pcie 688 drivers/pci/controller/pcie-altera.c resource_list_for_each_entry(win, &pcie->resources) { pcie 702 drivers/pci/controller/pcie-altera.c pci_free_resource_list(&pcie->resources); pcie 706 drivers/pci/controller/pcie-altera.c static int altera_pcie_init_irq_domain(struct altera_pcie *pcie) pcie 708 drivers/pci/controller/pcie-altera.c struct device *dev = &pcie->pdev->dev; pcie 712 drivers/pci/controller/pcie-altera.c pcie->irq_domain = irq_domain_add_linear(node, PCI_NUM_INTX, pcie 713 drivers/pci/controller/pcie-altera.c &intx_domain_ops, pcie); pcie 714 drivers/pci/controller/pcie-altera.c if (!pcie->irq_domain) { pcie 722 drivers/pci/controller/pcie-altera.c static void altera_pcie_irq_teardown(struct altera_pcie *pcie) pcie 724 drivers/pci/controller/pcie-altera.c irq_set_chained_handler_and_data(pcie->irq, NULL, NULL); pcie 725 drivers/pci/controller/pcie-altera.c irq_domain_remove(pcie->irq_domain); pcie 726 drivers/pci/controller/pcie-altera.c irq_dispose_mapping(pcie->irq); pcie 729 drivers/pci/controller/pcie-altera.c static int altera_pcie_parse_dt(struct altera_pcie *pcie) pcie 731 drivers/pci/controller/pcie-altera.c struct device *dev = &pcie->pdev->dev; pcie 732 drivers/pci/controller/pcie-altera.c struct platform_device *pdev = pcie->pdev; pcie 737 drivers/pci/controller/pcie-altera.c pcie->cra_base = devm_ioremap_resource(dev, cra); pcie 738 drivers/pci/controller/pcie-altera.c if (IS_ERR(pcie->cra_base)) pcie 739 drivers/pci/controller/pcie-altera.c return PTR_ERR(pcie->cra_base); pcie 741 drivers/pci/controller/pcie-altera.c if (pcie->pcie_data->version == ALTERA_PCIE_V2) { pcie 743 drivers/pci/controller/pcie-altera.c pcie->hip_base = devm_ioremap_resource(&pdev->dev, hip); pcie 744 drivers/pci/controller/pcie-altera.c if (IS_ERR(pcie->hip_base)) pcie 745 drivers/pci/controller/pcie-altera.c return PTR_ERR(pcie->hip_base); pcie 749 drivers/pci/controller/pcie-altera.c pcie->irq = platform_get_irq(pdev, 0); pcie 750 drivers/pci/controller/pcie-altera.c if (pcie->irq < 0) { pcie 751 drivers/pci/controller/pcie-altera.c dev_err(dev, "failed to get IRQ: %d\n", pcie->irq); pcie 752 drivers/pci/controller/pcie-altera.c return pcie->irq; pcie 755 drivers/pci/controller/pcie-altera.c irq_set_chained_handler_and_data(pcie->irq, altera_pcie_isr, pcie); pcie 759 drivers/pci/controller/pcie-altera.c static void altera_pcie_host_init(struct altera_pcie *pcie) pcie 761 drivers/pci/controller/pcie-altera.c altera_pcie_retrain(pcie); pcie 809 drivers/pci/controller/pcie-altera.c struct altera_pcie *pcie; pcie 816 drivers/pci/controller/pcie-altera.c bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); pcie 820 drivers/pci/controller/pcie-altera.c pcie = pci_host_bridge_priv(bridge); pcie 821 drivers/pci/controller/pcie-altera.c pcie->pdev = pdev; pcie 822 drivers/pci/controller/pcie-altera.c platform_set_drvdata(pdev, pcie); pcie 828 drivers/pci/controller/pcie-altera.c pcie->pcie_data = match->data; pcie 830 drivers/pci/controller/pcie-altera.c ret = altera_pcie_parse_dt(pcie); pcie 836 drivers/pci/controller/pcie-altera.c INIT_LIST_HEAD(&pcie->resources); pcie 838 drivers/pci/controller/pcie-altera.c ret = altera_pcie_parse_request_of_pci_ranges(pcie); pcie 844 drivers/pci/controller/pcie-altera.c ret = altera_pcie_init_irq_domain(pcie); pcie 851 drivers/pci/controller/pcie-altera.c cra_writel(pcie, P2A_INT_STS_ALL, P2A_INT_STATUS); pcie 853 drivers/pci/controller/pcie-altera.c cra_writel(pcie, P2A_INT_ENA_ALL, P2A_INT_ENABLE); pcie 854 drivers/pci/controller/pcie-altera.c altera_pcie_host_init(pcie); pcie 856 drivers/pci/controller/pcie-altera.c list_splice_init(&pcie->resources, &bridge->windows); pcie 858 drivers/pci/controller/pcie-altera.c bridge->sysdata = pcie; pcie 859 drivers/pci/controller/pcie-altera.c bridge->busnr = pcie->root_bus_nr; pcie 882 drivers/pci/controller/pcie-altera.c struct altera_pcie *pcie = platform_get_drvdata(pdev); pcie 883 drivers/pci/controller/pcie-altera.c struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie); pcie 887 drivers/pci/controller/pcie-altera.c pci_free_resource_list(&pcie->resources); pcie 888 drivers/pci/controller/pcie-altera.c altera_pcie_irq_teardown(pcie); pcie 38 drivers/pci/controller/pcie-cadence-ep.c struct cdns_pcie pcie; pcie 53 drivers/pci/controller/pcie-cadence-ep.c struct cdns_pcie *pcie = &ep->pcie; pcie 55 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_ep_fn_writew(pcie, fn, PCI_DEVICE_ID, hdr->deviceid); pcie 56 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_ep_fn_writeb(pcie, fn, PCI_REVISION_ID, hdr->revid); pcie 57 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_ep_fn_writeb(pcie, fn, PCI_CLASS_PROG, hdr->progif_code); pcie 58 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_ep_fn_writew(pcie, fn, PCI_CLASS_DEVICE, pcie 60 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_ep_fn_writeb(pcie, fn, PCI_CACHE_LINE_SIZE, pcie 62 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_ep_fn_writew(pcie, fn, PCI_SUBSYSTEM_ID, hdr->subsys_id); pcie 63 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_ep_fn_writeb(pcie, fn, PCI_INTERRUPT_PIN, hdr->interrupt_pin); pcie 74 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_writel(pcie, CDNS_PCIE_LM_ID, id); pcie 84 drivers/pci/controller/pcie-cadence-ep.c struct cdns_pcie *pcie = &ep->pcie; pcie 124 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR0(fn, bar), pcie 126 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR1(fn, bar), pcie 137 drivers/pci/controller/pcie-cadence-ep.c cfg = cdns_pcie_readl(pcie, reg); pcie 142 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_writel(pcie, reg, cfg); pcie 151 drivers/pci/controller/pcie-cadence-ep.c struct cdns_pcie *pcie = &ep->pcie; pcie 164 drivers/pci/controller/pcie-cadence-ep.c cfg = cdns_pcie_readl(pcie, reg); pcie 168 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_writel(pcie, reg, cfg); pcie 170 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR0(fn, bar), 0); pcie 171 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR1(fn, bar), 0); pcie 178 drivers/pci/controller/pcie-cadence-ep.c struct cdns_pcie *pcie = &ep->pcie; pcie 188 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_set_outbound_region(pcie, fn, r, false, addr, pci_addr, size); pcie 200 drivers/pci/controller/pcie-cadence-ep.c struct cdns_pcie *pcie = &ep->pcie; pcie 210 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_reset_outbound_region(pcie, r); pcie 219 drivers/pci/controller/pcie-cadence-ep.c struct cdns_pcie *pcie = &ep->pcie; pcie 227 drivers/pci/controller/pcie-cadence-ep.c flags = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_MSI_FLAGS); pcie 231 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_ep_fn_writew(pcie, fn, cap + PCI_MSI_FLAGS, flags); pcie 239 drivers/pci/controller/pcie-cadence-ep.c struct cdns_pcie *pcie = &ep->pcie; pcie 244 drivers/pci/controller/pcie-cadence-ep.c flags = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_MSI_FLAGS); pcie 260 drivers/pci/controller/pcie-cadence-ep.c struct cdns_pcie *pcie = &ep->pcie; pcie 271 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_set_outbound_region_for_normal_msg(pcie, fn, 0, pcie 285 drivers/pci/controller/pcie-cadence-ep.c status = cdns_pcie_ep_fn_readw(pcie, fn, PCI_STATUS); pcie 288 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_ep_fn_writew(pcie, fn, PCI_STATUS, status); pcie 301 drivers/pci/controller/pcie-cadence-ep.c cmd = cdns_pcie_ep_fn_readw(&ep->pcie, fn, PCI_COMMAND); pcie 318 drivers/pci/controller/pcie-cadence-ep.c struct cdns_pcie *pcie = &ep->pcie; pcie 325 drivers/pci/controller/pcie-cadence-ep.c flags = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_MSI_FLAGS); pcie 337 drivers/pci/controller/pcie-cadence-ep.c data = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_MSI_DATA_64); pcie 341 drivers/pci/controller/pcie-cadence-ep.c pci_addr = cdns_pcie_ep_fn_readl(pcie, fn, cap + PCI_MSI_ADDRESS_HI); pcie 343 drivers/pci/controller/pcie-cadence-ep.c pci_addr |= cdns_pcie_ep_fn_readl(pcie, fn, cap + PCI_MSI_ADDRESS_LO); pcie 350 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_set_outbound_region(pcie, fn, 0, pcie 386 drivers/pci/controller/pcie-cadence-ep.c struct cdns_pcie *pcie = &ep->pcie; pcie 397 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_writel(pcie, CDNS_PCIE_LM_EP_FUNC_CFG, cfg); pcie 438 drivers/pci/controller/pcie-cadence-ep.c struct cdns_pcie *pcie; pcie 448 drivers/pci/controller/pcie-cadence-ep.c pcie = &ep->pcie; pcie 449 drivers/pci/controller/pcie-cadence-ep.c pcie->is_rc = false; pcie 452 drivers/pci/controller/pcie-cadence-ep.c pcie->reg_base = devm_ioremap_resource(dev, res); pcie 453 drivers/pci/controller/pcie-cadence-ep.c if (IS_ERR(pcie->reg_base)) { pcie 455 drivers/pci/controller/pcie-cadence-ep.c return PTR_ERR(pcie->reg_base); pcie 463 drivers/pci/controller/pcie-cadence-ep.c pcie->mem_res = res; pcie 477 drivers/pci/controller/pcie-cadence-ep.c ret = cdns_pcie_init_phy(dev, pcie); pcie 482 drivers/pci/controller/pcie-cadence-ep.c platform_set_drvdata(pdev, pcie); pcie 491 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_writel(pcie, CDNS_PCIE_LM_EP_FUNC_CFG, BIT(0)); pcie 505 drivers/pci/controller/pcie-cadence-ep.c ret = pci_epc_mem_init(epc, pcie->mem_res->start, pcie 506 drivers/pci/controller/pcie-cadence-ep.c resource_size(pcie->mem_res)); pcie 533 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_disable_phy(pcie); pcie 534 drivers/pci/controller/pcie-cadence-ep.c phy_count = pcie->phy_count; pcie 536 drivers/pci/controller/pcie-cadence-ep.c device_link_del(pcie->link[phy_count]); pcie 544 drivers/pci/controller/pcie-cadence-ep.c struct cdns_pcie *pcie = dev_get_drvdata(dev); pcie 553 drivers/pci/controller/pcie-cadence-ep.c cdns_pcie_disable_phy(pcie); pcie 30 drivers/pci/controller/pcie-cadence-host.c struct cdns_pcie pcie; pcie 46 drivers/pci/controller/pcie-cadence-host.c struct cdns_pcie *pcie = &rc->pcie; pcie 59 drivers/pci/controller/pcie-cadence-host.c return pcie->reg_base + (where & 0xfff); pcie 62 drivers/pci/controller/pcie-cadence-host.c if (!(cdns_pcie_readl(pcie, CDNS_PCIE_LM_BASE) & 0x1)) pcie 65 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_LINKDOWN, 0x0); pcie 71 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_PCI_ADDR0(0), addr0); pcie 84 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_DESC0(0), desc0); pcie 103 drivers/pci/controller/pcie-cadence-host.c struct cdns_pcie *pcie = &rc->pcie; pcie 121 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_writel(pcie, CDNS_PCIE_LM_RC_BAR_CFG, value); pcie 125 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_rp_writew(pcie, PCI_VENDOR_ID, rc->vendor_id); pcie 127 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_rp_writew(pcie, PCI_DEVICE_ID, rc->device_id); pcie 129 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_rp_writeb(pcie, PCI_CLASS_REVISION, 0); pcie 130 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_rp_writeb(pcie, PCI_CLASS_PROG, 0); pcie 131 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_rp_writew(pcie, PCI_CLASS_DEVICE, PCI_CLASS_BRIDGE_PCI); pcie 138 drivers/pci/controller/pcie-cadence-host.c struct cdns_pcie *pcie = &rc->pcie; pcie 140 drivers/pci/controller/pcie-cadence-host.c struct resource *mem_res = pcie->mem_res; pcie 157 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_PCI_ADDR1(0), addr1); pcie 158 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_DESC1(0), desc1); pcie 164 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_CPU_ADDR0(0), addr0); pcie 165 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_CPU_ADDR1(0), addr1); pcie 185 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_set_outbound_region(pcie, 0, r, is_io, pcie 200 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_RP_BAR_ADDR0(RP_NO_BAR), addr0); pcie 201 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_RP_BAR_ADDR1(RP_NO_BAR), addr1); pcie 219 drivers/pci/controller/pcie-cadence-host.c rc->pcie.bus = bus_range->start; pcie 243 drivers/pci/controller/pcie-cadence-host.c struct cdns_pcie *pcie; pcie 255 drivers/pci/controller/pcie-cadence-host.c pcie = &rc->pcie; pcie 256 drivers/pci/controller/pcie-cadence-host.c pcie->is_rc = true; pcie 271 drivers/pci/controller/pcie-cadence-host.c pcie->reg_base = devm_ioremap_resource(dev, res); pcie 272 drivers/pci/controller/pcie-cadence-host.c if (IS_ERR(pcie->reg_base)) { pcie 274 drivers/pci/controller/pcie-cadence-host.c return PTR_ERR(pcie->reg_base); pcie 290 drivers/pci/controller/pcie-cadence-host.c pcie->mem_res = res; pcie 292 drivers/pci/controller/pcie-cadence-host.c ret = cdns_pcie_init_phy(dev, pcie); pcie 297 drivers/pci/controller/pcie-cadence-host.c platform_set_drvdata(pdev, pcie); pcie 312 drivers/pci/controller/pcie-cadence-host.c bridge->busnr = pcie->bus; pcie 331 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_disable_phy(pcie); pcie 332 drivers/pci/controller/pcie-cadence-host.c phy_count = pcie->phy_count; pcie 334 drivers/pci/controller/pcie-cadence-host.c device_link_del(pcie->link[phy_count]); pcie 342 drivers/pci/controller/pcie-cadence-host.c struct cdns_pcie *pcie = dev_get_drvdata(dev); pcie 350 drivers/pci/controller/pcie-cadence-host.c cdns_pcie_disable_phy(pcie); pcie 10 drivers/pci/controller/pcie-cadence.c void cdns_pcie_set_outbound_region(struct cdns_pcie *pcie, u8 fn, pcie 30 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_PCI_ADDR0(r), addr0); pcie 31 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_PCI_ADDR1(r), addr1); pcie 59 drivers/pci/controller/pcie-cadence.c if (pcie->is_rc) { pcie 63 drivers/pci/controller/pcie-cadence.c desc1 |= CDNS_PCIE_AT_OB_REGION_DESC1_BUS(pcie->bus); pcie 72 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_DESC0(r), desc0); pcie 73 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_DESC1(r), desc1); pcie 76 drivers/pci/controller/pcie-cadence.c cpu_addr -= pcie->mem_res->start; pcie 81 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_CPU_ADDR0(r), addr0); pcie 82 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_CPU_ADDR1(r), addr1); pcie 85 drivers/pci/controller/pcie-cadence.c void cdns_pcie_set_outbound_region_for_normal_msg(struct cdns_pcie *pcie, u8 fn, pcie 94 drivers/pci/controller/pcie-cadence.c if (pcie->is_rc) { pcie 97 drivers/pci/controller/pcie-cadence.c desc1 |= CDNS_PCIE_AT_OB_REGION_DESC1_BUS(pcie->bus); pcie 103 drivers/pci/controller/pcie-cadence.c cpu_addr -= pcie->mem_res->start; pcie 108 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_PCI_ADDR0(r), 0); pcie 109 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_PCI_ADDR1(r), 0); pcie 110 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_DESC0(r), desc0); pcie 111 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_DESC1(r), desc1); pcie 112 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_CPU_ADDR0(r), addr0); pcie 113 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_CPU_ADDR1(r), addr1); pcie 116 drivers/pci/controller/pcie-cadence.c void cdns_pcie_reset_outbound_region(struct cdns_pcie *pcie, u32 r) pcie 118 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_PCI_ADDR0(r), 0); pcie 119 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_PCI_ADDR1(r), 0); pcie 121 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_DESC0(r), 0); pcie 122 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_DESC1(r), 0); pcie 124 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_CPU_ADDR0(r), 0); pcie 125 drivers/pci/controller/pcie-cadence.c cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_CPU_ADDR1(r), 0); pcie 128 drivers/pci/controller/pcie-cadence.c void cdns_pcie_disable_phy(struct cdns_pcie *pcie) pcie 130 drivers/pci/controller/pcie-cadence.c int i = pcie->phy_count; pcie 133 drivers/pci/controller/pcie-cadence.c phy_power_off(pcie->phy[i]); pcie 134 drivers/pci/controller/pcie-cadence.c phy_exit(pcie->phy[i]); pcie 138 drivers/pci/controller/pcie-cadence.c int cdns_pcie_enable_phy(struct cdns_pcie *pcie) pcie 143 drivers/pci/controller/pcie-cadence.c for (i = 0; i < pcie->phy_count; i++) { pcie 144 drivers/pci/controller/pcie-cadence.c ret = phy_init(pcie->phy[i]); pcie 148 drivers/pci/controller/pcie-cadence.c ret = phy_power_on(pcie->phy[i]); pcie 150 drivers/pci/controller/pcie-cadence.c phy_exit(pcie->phy[i]); pcie 159 drivers/pci/controller/pcie-cadence.c phy_power_off(pcie->phy[i]); pcie 160 drivers/pci/controller/pcie-cadence.c phy_exit(pcie->phy[i]); pcie 166 drivers/pci/controller/pcie-cadence.c int cdns_pcie_init_phy(struct device *dev, struct cdns_pcie *pcie) pcie 179 drivers/pci/controller/pcie-cadence.c pcie->phy_count = 0; pcie 206 drivers/pci/controller/pcie-cadence.c pcie->phy_count = phy_count; pcie 207 drivers/pci/controller/pcie-cadence.c pcie->phy = phy; pcie 208 drivers/pci/controller/pcie-cadence.c pcie->link = link; pcie 210 drivers/pci/controller/pcie-cadence.c ret = cdns_pcie_enable_phy(pcie); pcie 228 drivers/pci/controller/pcie-cadence.c struct cdns_pcie *pcie = dev_get_drvdata(dev); pcie 230 drivers/pci/controller/pcie-cadence.c cdns_pcie_disable_phy(pcie); pcie 237 drivers/pci/controller/pcie-cadence.c struct cdns_pcie *pcie = dev_get_drvdata(dev); pcie 240 drivers/pci/controller/pcie-cadence.c ret = cdns_pcie_enable_phy(pcie); pcie 242 drivers/pci/controller/pcie-cadence.h static inline void cdns_pcie_writeb(struct cdns_pcie *pcie, u32 reg, u8 value) pcie 244 drivers/pci/controller/pcie-cadence.h writeb(value, pcie->reg_base + reg); pcie 247 drivers/pci/controller/pcie-cadence.h static inline void cdns_pcie_writew(struct cdns_pcie *pcie, u32 reg, u16 value) pcie 249 drivers/pci/controller/pcie-cadence.h writew(value, pcie->reg_base + reg); pcie 252 drivers/pci/controller/pcie-cadence.h static inline void cdns_pcie_writel(struct cdns_pcie *pcie, u32 reg, u32 value) pcie 254 drivers/pci/controller/pcie-cadence.h writel(value, pcie->reg_base + reg); pcie 257 drivers/pci/controller/pcie-cadence.h static inline u32 cdns_pcie_readl(struct cdns_pcie *pcie, u32 reg) pcie 259 drivers/pci/controller/pcie-cadence.h return readl(pcie->reg_base + reg); pcie 263 drivers/pci/controller/pcie-cadence.h static inline void cdns_pcie_rp_writeb(struct cdns_pcie *pcie, pcie 266 drivers/pci/controller/pcie-cadence.h writeb(value, pcie->reg_base + CDNS_PCIE_RP_BASE + reg); pcie 269 drivers/pci/controller/pcie-cadence.h static inline void cdns_pcie_rp_writew(struct cdns_pcie *pcie, pcie 272 drivers/pci/controller/pcie-cadence.h writew(value, pcie->reg_base + CDNS_PCIE_RP_BASE + reg); pcie 276 drivers/pci/controller/pcie-cadence.h static inline void cdns_pcie_ep_fn_writeb(struct cdns_pcie *pcie, u8 fn, pcie 279 drivers/pci/controller/pcie-cadence.h writeb(value, pcie->reg_base + CDNS_PCIE_EP_FUNC_BASE(fn) + reg); pcie 282 drivers/pci/controller/pcie-cadence.h static inline void cdns_pcie_ep_fn_writew(struct cdns_pcie *pcie, u8 fn, pcie 285 drivers/pci/controller/pcie-cadence.h writew(value, pcie->reg_base + CDNS_PCIE_EP_FUNC_BASE(fn) + reg); pcie 288 drivers/pci/controller/pcie-cadence.h static inline void cdns_pcie_ep_fn_writel(struct cdns_pcie *pcie, u8 fn, pcie 291 drivers/pci/controller/pcie-cadence.h writel(value, pcie->reg_base + CDNS_PCIE_EP_FUNC_BASE(fn) + reg); pcie 294 drivers/pci/controller/pcie-cadence.h static inline u8 cdns_pcie_ep_fn_readb(struct cdns_pcie *pcie, u8 fn, u32 reg) pcie 296 drivers/pci/controller/pcie-cadence.h return readb(pcie->reg_base + CDNS_PCIE_EP_FUNC_BASE(fn) + reg); pcie 299 drivers/pci/controller/pcie-cadence.h static inline u16 cdns_pcie_ep_fn_readw(struct cdns_pcie *pcie, u8 fn, u32 reg) pcie 301 drivers/pci/controller/pcie-cadence.h return readw(pcie->reg_base + CDNS_PCIE_EP_FUNC_BASE(fn) + reg); pcie 304 drivers/pci/controller/pcie-cadence.h static inline u32 cdns_pcie_ep_fn_readl(struct cdns_pcie *pcie, u8 fn, u32 reg) pcie 306 drivers/pci/controller/pcie-cadence.h return readl(pcie->reg_base + CDNS_PCIE_EP_FUNC_BASE(fn) + reg); pcie 309 drivers/pci/controller/pcie-cadence.h void cdns_pcie_set_outbound_region(struct cdns_pcie *pcie, u8 fn, pcie 313 drivers/pci/controller/pcie-cadence.h void cdns_pcie_set_outbound_region_for_normal_msg(struct cdns_pcie *pcie, u8 fn, pcie 316 drivers/pci/controller/pcie-cadence.h void cdns_pcie_reset_outbound_region(struct cdns_pcie *pcie, u32 r); pcie 317 drivers/pci/controller/pcie-cadence.h void cdns_pcie_disable_phy(struct cdns_pcie *pcie); pcie 318 drivers/pci/controller/pcie-cadence.h int cdns_pcie_enable_phy(struct cdns_pcie *pcie); pcie 319 drivers/pci/controller/pcie-cadence.h int cdns_pcie_init_phy(struct device *dev, struct cdns_pcie *pcie); pcie 28 drivers/pci/controller/pcie-iproc-bcma.c struct iproc_pcie *pcie = dev->sysdata; pcie 29 drivers/pci/controller/pcie-iproc-bcma.c struct bcma_device *bdev = container_of(pcie->dev, struct bcma_device, dev); pcie 37 drivers/pci/controller/pcie-iproc-bcma.c struct iproc_pcie *pcie; pcie 42 drivers/pci/controller/pcie-iproc-bcma.c bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); pcie 46 drivers/pci/controller/pcie-iproc-bcma.c pcie = pci_host_bridge_priv(bridge); pcie 48 drivers/pci/controller/pcie-iproc-bcma.c pcie->dev = dev; pcie 50 drivers/pci/controller/pcie-iproc-bcma.c pcie->type = IPROC_PCIE_PAXB_BCMA; pcie 51 drivers/pci/controller/pcie-iproc-bcma.c pcie->base = bdev->io_addr; pcie 52 drivers/pci/controller/pcie-iproc-bcma.c if (!pcie->base) { pcie 57 drivers/pci/controller/pcie-iproc-bcma.c pcie->base_addr = bdev->addr; pcie 59 drivers/pci/controller/pcie-iproc-bcma.c pcie->mem.start = bdev->addr_s[0]; pcie 60 drivers/pci/controller/pcie-iproc-bcma.c pcie->mem.end = bdev->addr_s[0] + SZ_128M - 1; pcie 61 drivers/pci/controller/pcie-iproc-bcma.c pcie->mem.name = "PCIe MEM space"; pcie 62 drivers/pci/controller/pcie-iproc-bcma.c pcie->mem.flags = IORESOURCE_MEM; pcie 63 drivers/pci/controller/pcie-iproc-bcma.c pci_add_resource(&resources, &pcie->mem); pcie 65 drivers/pci/controller/pcie-iproc-bcma.c pcie->map_irq = iproc_pcie_bcma_map_irq; pcie 67 drivers/pci/controller/pcie-iproc-bcma.c ret = iproc_pcie_setup(pcie, &resources); pcie 74 drivers/pci/controller/pcie-iproc-bcma.c bcma_set_drvdata(bdev, pcie); pcie 80 drivers/pci/controller/pcie-iproc-bcma.c struct iproc_pcie *pcie = bcma_get_drvdata(bdev); pcie 82 drivers/pci/controller/pcie-iproc-bcma.c iproc_pcie_remove(pcie); pcie 94 drivers/pci/controller/pcie-iproc-msi.c struct iproc_pcie *pcie; pcie 132 drivers/pci/controller/pcie-iproc-msi.c struct iproc_pcie *pcie = msi->pcie; pcie 134 drivers/pci/controller/pcie-iproc-msi.c return readl_relaxed(pcie->base + msi->reg_offsets[eq][reg]); pcie 141 drivers/pci/controller/pcie-iproc-msi.c struct iproc_pcie *pcie = msi->pcie; pcie 143 drivers/pci/controller/pcie-iproc-msi.c writel_relaxed(val, pcie->base + msi->reg_offsets[eq][reg]); pcie 480 drivers/pci/controller/pcie-iproc-msi.c struct iproc_pcie *pcie = msi->pcie; pcie 492 drivers/pci/controller/pcie-iproc-msi.c dev_err(pcie->dev, pcie 497 drivers/pci/controller/pcie-iproc-msi.c dev_err(pcie->dev, "failed to alloc CPU mask\n"); pcie 511 drivers/pci/controller/pcie-iproc-msi.c int iproc_msi_init(struct iproc_pcie *pcie, struct device_node *node) pcie 523 drivers/pci/controller/pcie-iproc-msi.c if (pcie->msi) pcie 526 drivers/pci/controller/pcie-iproc-msi.c msi = devm_kzalloc(pcie->dev, sizeof(*msi), GFP_KERNEL); pcie 530 drivers/pci/controller/pcie-iproc-msi.c msi->pcie = pcie; pcie 531 drivers/pci/controller/pcie-iproc-msi.c pcie->msi = msi; pcie 532 drivers/pci/controller/pcie-iproc-msi.c msi->msi_addr = pcie->base_addr; pcie 538 drivers/pci/controller/pcie-iproc-msi.c dev_err(pcie->dev, "found no MSI GIC interrupt\n"); pcie 543 drivers/pci/controller/pcie-iproc-msi.c dev_warn(pcie->dev, "too many MSI GIC interrupts defined %d\n", pcie 549 drivers/pci/controller/pcie-iproc-msi.c dev_err(pcie->dev, pcie 556 drivers/pci/controller/pcie-iproc-msi.c dev_warn(pcie->dev, "Reducing number of interrupts to %d\n", pcie 560 drivers/pci/controller/pcie-iproc-msi.c switch (pcie->type) { pcie 573 drivers/pci/controller/pcie-iproc-msi.c dev_err(pcie->dev, "incompatible iProc PCIe interface\n"); pcie 581 drivers/pci/controller/pcie-iproc-msi.c msi->bitmap = devm_kcalloc(pcie->dev, BITS_TO_LONGS(msi->nr_msi_vecs), pcie 586 drivers/pci/controller/pcie-iproc-msi.c msi->grps = devm_kcalloc(pcie->dev, msi->nr_irqs, sizeof(*msi->grps), pcie 595 drivers/pci/controller/pcie-iproc-msi.c dev_err(pcie->dev, "unable to parse/map interrupt\n"); pcie 605 drivers/pci/controller/pcie-iproc-msi.c msi->eq_cpu = dma_alloc_coherent(pcie->dev, pcie 615 drivers/pci/controller/pcie-iproc-msi.c dev_err(pcie->dev, "failed to create MSI domains\n"); pcie 635 drivers/pci/controller/pcie-iproc-msi.c dma_free_coherent(pcie->dev, msi->nr_eq_region * EQ_MEM_REGION_SIZE, pcie 643 drivers/pci/controller/pcie-iproc-msi.c pcie->msi = NULL; pcie 648 drivers/pci/controller/pcie-iproc-msi.c void iproc_msi_exit(struct iproc_pcie *pcie) pcie 650 drivers/pci/controller/pcie-iproc-msi.c struct iproc_msi *msi = pcie->msi; pcie 663 drivers/pci/controller/pcie-iproc-msi.c dma_free_coherent(pcie->dev, msi->nr_eq_region * EQ_MEM_REGION_SIZE, pcie 43 drivers/pci/controller/pcie-iproc-platform.c struct iproc_pcie *pcie; pcie 51 drivers/pci/controller/pcie-iproc-platform.c bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); pcie 55 drivers/pci/controller/pcie-iproc-platform.c pcie = pci_host_bridge_priv(bridge); pcie 57 drivers/pci/controller/pcie-iproc-platform.c pcie->dev = dev; pcie 58 drivers/pci/controller/pcie-iproc-platform.c pcie->type = (enum iproc_pcie_type) of_device_get_match_data(dev); pcie 66 drivers/pci/controller/pcie-iproc-platform.c pcie->base = devm_pci_remap_cfgspace(dev, reg.start, pcie 68 drivers/pci/controller/pcie-iproc-platform.c if (!pcie->base) { pcie 72 drivers/pci/controller/pcie-iproc-platform.c pcie->base_addr = reg.start; pcie 84 drivers/pci/controller/pcie-iproc-platform.c pcie->ob.axi_offset = val; pcie 85 drivers/pci/controller/pcie-iproc-platform.c pcie->need_ob_cfg = true; pcie 93 drivers/pci/controller/pcie-iproc-platform.c pcie->need_ib_cfg = of_property_read_bool(np, "dma-ranges"); pcie 96 drivers/pci/controller/pcie-iproc-platform.c pcie->phy = devm_phy_optional_get(dev, "pcie-phy"); pcie 97 drivers/pci/controller/pcie-iproc-platform.c if (IS_ERR(pcie->phy)) pcie 98 drivers/pci/controller/pcie-iproc-platform.c return PTR_ERR(pcie->phy); pcie 108 drivers/pci/controller/pcie-iproc-platform.c switch (pcie->type) { pcie 113 drivers/pci/controller/pcie-iproc-platform.c pcie->map_irq = of_irq_parse_and_map_pci; pcie 116 drivers/pci/controller/pcie-iproc-platform.c ret = iproc_pcie_setup(pcie, &resources); pcie 123 drivers/pci/controller/pcie-iproc-platform.c platform_set_drvdata(pdev, pcie); pcie 129 drivers/pci/controller/pcie-iproc-platform.c struct iproc_pcie *pcie = platform_get_drvdata(pdev); pcie 131 drivers/pci/controller/pcie-iproc-platform.c return iproc_pcie_remove(pcie); pcie 136 drivers/pci/controller/pcie-iproc-platform.c struct iproc_pcie *pcie = platform_get_drvdata(pdev); pcie 138 drivers/pci/controller/pcie-iproc-platform.c iproc_pcie_shutdown(pcie); pcie 401 drivers/pci/controller/pcie-iproc.c struct iproc_pcie *pcie = bus->sysdata; pcie 402 drivers/pci/controller/pcie-iproc.c return pcie; pcie 410 drivers/pci/controller/pcie-iproc.c static inline u16 iproc_pcie_reg_offset(struct iproc_pcie *pcie, pcie 413 drivers/pci/controller/pcie-iproc.c return pcie->reg_offsets[reg]; pcie 416 drivers/pci/controller/pcie-iproc.c static inline u32 iproc_pcie_read_reg(struct iproc_pcie *pcie, pcie 419 drivers/pci/controller/pcie-iproc.c u16 offset = iproc_pcie_reg_offset(pcie, reg); pcie 424 drivers/pci/controller/pcie-iproc.c return readl(pcie->base + offset); pcie 427 drivers/pci/controller/pcie-iproc.c static inline void iproc_pcie_write_reg(struct iproc_pcie *pcie, pcie 430 drivers/pci/controller/pcie-iproc.c u16 offset = iproc_pcie_reg_offset(pcie, reg); pcie 435 drivers/pci/controller/pcie-iproc.c writel(val, pcie->base + offset); pcie 447 drivers/pci/controller/pcie-iproc.c struct iproc_pcie *pcie = iproc_data(bus); pcie 450 drivers/pci/controller/pcie-iproc.c if (bus->number && pcie->has_apb_err_disable) { pcie 451 drivers/pci/controller/pcie-iproc.c val = iproc_pcie_read_reg(pcie, IPROC_PCIE_APB_ERR_EN); pcie 456 drivers/pci/controller/pcie-iproc.c iproc_pcie_write_reg(pcie, IPROC_PCIE_APB_ERR_EN, val); pcie 460 drivers/pci/controller/pcie-iproc.c static void __iomem *iproc_pcie_map_ep_cfg_reg(struct iproc_pcie *pcie, pcie 476 drivers/pci/controller/pcie-iproc.c iproc_pcie_write_reg(pcie, IPROC_PCIE_CFG_ADDR, val); pcie 477 drivers/pci/controller/pcie-iproc.c offset = iproc_pcie_reg_offset(pcie, IPROC_PCIE_CFG_DATA); pcie 482 drivers/pci/controller/pcie-iproc.c return (pcie->base + offset); pcie 485 drivers/pci/controller/pcie-iproc.c static unsigned int iproc_pcie_cfg_retry(struct iproc_pcie *pcie, pcie 516 drivers/pci/controller/pcie-iproc.c status = iproc_pcie_read_reg(pcie, IPROC_PCIE_CFG_RD_STATUS); pcie 530 drivers/pci/controller/pcie-iproc.c static void iproc_pcie_fix_cap(struct iproc_pcie *pcie, int where, u32 *val) pcie 544 drivers/pci/controller/pcie-iproc.c pcie->fix_paxc_cap = true; pcie 548 drivers/pci/controller/pcie-iproc.c if (pcie->fix_paxc_cap) { pcie 556 drivers/pci/controller/pcie-iproc.c if (pcie->fix_paxc_cap) { pcie 576 drivers/pci/controller/pcie-iproc.c struct iproc_pcie *pcie = iproc_data(bus); pcie 588 drivers/pci/controller/pcie-iproc.c iproc_pcie_fix_cap(pcie, where, val); pcie 593 drivers/pci/controller/pcie-iproc.c cfg_data_p = iproc_pcie_map_ep_cfg_reg(pcie, busno, slot, fn, where); pcie 598 drivers/pci/controller/pcie-iproc.c data = iproc_pcie_cfg_retry(pcie, cfg_data_p); pcie 617 drivers/pci/controller/pcie-iproc.c if (pcie->rej_unconfig_pf && pcie 630 drivers/pci/controller/pcie-iproc.c static void __iomem *iproc_pcie_map_cfg_bus(struct iproc_pcie *pcie, pcie 643 drivers/pci/controller/pcie-iproc.c iproc_pcie_write_reg(pcie, IPROC_PCIE_CFG_IND_ADDR, pcie 645 drivers/pci/controller/pcie-iproc.c offset = iproc_pcie_reg_offset(pcie, IPROC_PCIE_CFG_IND_DATA); pcie 649 drivers/pci/controller/pcie-iproc.c return (pcie->base + offset); pcie 652 drivers/pci/controller/pcie-iproc.c return iproc_pcie_map_ep_cfg_reg(pcie, busno, slot, fn, where); pcie 663 drivers/pci/controller/pcie-iproc.c static int iproc_pci_raw_config_read32(struct iproc_pcie *pcie, pcie 669 drivers/pci/controller/pcie-iproc.c addr = iproc_pcie_map_cfg_bus(pcie, 0, devfn, where & ~0x3); pcie 683 drivers/pci/controller/pcie-iproc.c static int iproc_pci_raw_config_write32(struct iproc_pcie *pcie, pcie 690 drivers/pci/controller/pcie-iproc.c addr = iproc_pcie_map_cfg_bus(pcie, 0, devfn, where & ~0x3); pcie 711 drivers/pci/controller/pcie-iproc.c struct iproc_pcie *pcie = iproc_data(bus); pcie 714 drivers/pci/controller/pcie-iproc.c if (pcie->iproc_cfg_read) pcie 741 drivers/pci/controller/pcie-iproc.c static void iproc_pcie_perst_ctrl(struct iproc_pcie *pcie, bool assert) pcie 750 drivers/pci/controller/pcie-iproc.c if (pcie->ep_is_internal) pcie 754 drivers/pci/controller/pcie-iproc.c val = iproc_pcie_read_reg(pcie, IPROC_PCIE_CLK_CTRL); pcie 757 drivers/pci/controller/pcie-iproc.c iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val); pcie 760 drivers/pci/controller/pcie-iproc.c val = iproc_pcie_read_reg(pcie, IPROC_PCIE_CLK_CTRL); pcie 762 drivers/pci/controller/pcie-iproc.c iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val); pcie 767 drivers/pci/controller/pcie-iproc.c int iproc_pcie_shutdown(struct iproc_pcie *pcie) pcie 769 drivers/pci/controller/pcie-iproc.c iproc_pcie_perst_ctrl(pcie, true); pcie 776 drivers/pci/controller/pcie-iproc.c static int iproc_pcie_check_link(struct iproc_pcie *pcie) pcie 778 drivers/pci/controller/pcie-iproc.c struct device *dev = pcie->dev; pcie 786 drivers/pci/controller/pcie-iproc.c if (pcie->ep_is_internal) pcie 789 drivers/pci/controller/pcie-iproc.c val = iproc_pcie_read_reg(pcie, IPROC_PCIE_LINK_STATUS); pcie 796 drivers/pci/controller/pcie-iproc.c iproc_pci_raw_config_read32(pcie, 0, PCI_HEADER_TYPE, 1, &hdr_type); pcie 806 drivers/pci/controller/pcie-iproc.c iproc_pci_raw_config_read32(pcie, 0, PCI_BRIDGE_CTRL_REG_OFFSET, pcie 810 drivers/pci/controller/pcie-iproc.c iproc_pci_raw_config_write32(pcie, 0, PCI_BRIDGE_CTRL_REG_OFFSET, pcie 814 drivers/pci/controller/pcie-iproc.c iproc_pci_raw_config_read32(pcie, 0, IPROC_PCI_EXP_CAP + PCI_EXP_LNKSTA, pcie 824 drivers/pci/controller/pcie-iproc.c iproc_pci_raw_config_read32(pcie, 0, pcie 831 drivers/pci/controller/pcie-iproc.c iproc_pci_raw_config_write32(pcie, 0, pcie 836 drivers/pci/controller/pcie-iproc.c iproc_pci_raw_config_read32(pcie, 0, pcie 849 drivers/pci/controller/pcie-iproc.c static void iproc_pcie_enable(struct iproc_pcie *pcie) pcie 851 drivers/pci/controller/pcie-iproc.c iproc_pcie_write_reg(pcie, IPROC_PCIE_INTX_EN, SYS_RC_INTX_MASK); pcie 854 drivers/pci/controller/pcie-iproc.c static inline bool iproc_pcie_ob_is_valid(struct iproc_pcie *pcie, pcie 859 drivers/pci/controller/pcie-iproc.c val = iproc_pcie_read_reg(pcie, MAP_REG(IPROC_PCIE_OARR0, window_idx)); pcie 864 drivers/pci/controller/pcie-iproc.c static inline int iproc_pcie_ob_write(struct iproc_pcie *pcie, int window_idx, pcie 867 drivers/pci/controller/pcie-iproc.c struct device *dev = pcie->dev; pcie 874 drivers/pci/controller/pcie-iproc.c oarr_offset = iproc_pcie_reg_offset(pcie, MAP_REG(IPROC_PCIE_OARR0, pcie 876 drivers/pci/controller/pcie-iproc.c omap_offset = iproc_pcie_reg_offset(pcie, MAP_REG(IPROC_PCIE_OMAP0, pcie 887 drivers/pci/controller/pcie-iproc.c OARR_VALID, pcie->base + oarr_offset); pcie 888 drivers/pci/controller/pcie-iproc.c writel(upper_32_bits(axi_addr), pcie->base + oarr_offset + 4); pcie 891 drivers/pci/controller/pcie-iproc.c writel(lower_32_bits(pci_addr), pcie->base + omap_offset); pcie 892 drivers/pci/controller/pcie-iproc.c writel(upper_32_bits(pci_addr), pcie->base + omap_offset + 4); pcie 897 drivers/pci/controller/pcie-iproc.c readl(pcie->base + oarr_offset), pcie 898 drivers/pci/controller/pcie-iproc.c readl(pcie->base + oarr_offset + 4)); pcie 900 drivers/pci/controller/pcie-iproc.c readl(pcie->base + omap_offset), pcie 901 drivers/pci/controller/pcie-iproc.c readl(pcie->base + omap_offset + 4)); pcie 917 drivers/pci/controller/pcie-iproc.c static int iproc_pcie_setup_ob(struct iproc_pcie *pcie, u64 axi_addr, pcie 920 drivers/pci/controller/pcie-iproc.c struct iproc_pcie_ob *ob = &pcie->ob; pcie 921 drivers/pci/controller/pcie-iproc.c struct device *dev = pcie->dev; pcie 939 drivers/pci/controller/pcie-iproc.c &pcie->ob_map[window_idx]; pcie 945 drivers/pci/controller/pcie-iproc.c if (iproc_pcie_ob_is_valid(pcie, window_idx)) pcie 990 drivers/pci/controller/pcie-iproc.c ret = iproc_pcie_ob_write(pcie, window_idx, size_idx, pcie 1019 drivers/pci/controller/pcie-iproc.c static int iproc_pcie_map_ranges(struct iproc_pcie *pcie, pcie 1022 drivers/pci/controller/pcie-iproc.c struct device *dev = pcie->dev; pcie 1035 drivers/pci/controller/pcie-iproc.c ret = iproc_pcie_setup_ob(pcie, res->start, pcie 1050 drivers/pci/controller/pcie-iproc.c static inline bool iproc_pcie_ib_is_in_use(struct iproc_pcie *pcie, pcie 1053 drivers/pci/controller/pcie-iproc.c const struct iproc_pcie_ib_map *ib_map = &pcie->ib_map[region_idx]; pcie 1056 drivers/pci/controller/pcie-iproc.c val = iproc_pcie_read_reg(pcie, MAP_REG(IPROC_PCIE_IARR0, region_idx)); pcie 1067 drivers/pci/controller/pcie-iproc.c static int iproc_pcie_ib_write(struct iproc_pcie *pcie, int region_idx, pcie 1071 drivers/pci/controller/pcie-iproc.c struct device *dev = pcie->dev; pcie 1072 drivers/pci/controller/pcie-iproc.c const struct iproc_pcie_ib_map *ib_map = &pcie->ib_map[region_idx]; pcie 1077 drivers/pci/controller/pcie-iproc.c iarr_offset = iproc_pcie_reg_offset(pcie, pcie 1079 drivers/pci/controller/pcie-iproc.c imap_offset = iproc_pcie_reg_offset(pcie, pcie 1093 drivers/pci/controller/pcie-iproc.c pcie->base + iarr_offset); pcie 1094 drivers/pci/controller/pcie-iproc.c writel(upper_32_bits(pci_addr), pcie->base + iarr_offset + 4); pcie 1097 drivers/pci/controller/pcie-iproc.c readl(pcie->base + iarr_offset), pcie 1098 drivers/pci/controller/pcie-iproc.c readl(pcie->base + iarr_offset + 4)); pcie 1106 drivers/pci/controller/pcie-iproc.c val = readl(pcie->base + imap_offset); pcie 1108 drivers/pci/controller/pcie-iproc.c writel(val, pcie->base + imap_offset); pcie 1110 drivers/pci/controller/pcie-iproc.c pcie->base + imap_offset + ib_map->imap_addr_offset); pcie 1113 drivers/pci/controller/pcie-iproc.c window_idx, readl(pcie->base + imap_offset), pcie 1114 drivers/pci/controller/pcie-iproc.c readl(pcie->base + imap_offset + pcie 1124 drivers/pci/controller/pcie-iproc.c static int iproc_pcie_setup_ib(struct iproc_pcie *pcie, pcie 1128 drivers/pci/controller/pcie-iproc.c struct device *dev = pcie->dev; pcie 1129 drivers/pci/controller/pcie-iproc.c struct iproc_pcie_ib *ib = &pcie->ib; pcie 1138 drivers/pci/controller/pcie-iproc.c &pcie->ib_map[region_idx]; pcie 1144 drivers/pci/controller/pcie-iproc.c if (iproc_pcie_ib_is_in_use(pcie, region_idx) || pcie 1165 drivers/pci/controller/pcie-iproc.c ret = iproc_pcie_ib_write(pcie, region_idx, size_idx, pcie 1215 drivers/pci/controller/pcie-iproc.c static int iproc_pcie_map_dma_ranges(struct iproc_pcie *pcie) pcie 1217 drivers/pci/controller/pcie-iproc.c struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie); pcie 1224 drivers/pci/controller/pcie-iproc.c ret = of_pci_dma_range_parser_init(&parser, pcie->dev->of_node); pcie 1229 drivers/pci/controller/pcie-iproc.c ret = iproc_pcie_add_dma_range(pcie->dev, pcie 1235 drivers/pci/controller/pcie-iproc.c ret = iproc_pcie_setup_ib(pcie, &range, IPROC_PCIE_IB_MAP_MEM); pcie 1248 drivers/pci/controller/pcie-iproc.c static int iproce_pcie_get_msi(struct iproc_pcie *pcie, pcie 1252 drivers/pci/controller/pcie-iproc.c struct device *dev = pcie->dev; pcie 1276 drivers/pci/controller/pcie-iproc.c static int iproc_pcie_paxb_v2_msi_steer(struct iproc_pcie *pcie, u64 msi_addr) pcie 1285 drivers/pci/controller/pcie-iproc.c ret = iproc_pcie_setup_ib(pcie, &range, IPROC_PCIE_IB_MAP_IO); pcie 1289 drivers/pci/controller/pcie-iproc.c static void iproc_pcie_paxc_v2_msi_steer(struct iproc_pcie *pcie, u64 msi_addr, pcie 1299 drivers/pci/controller/pcie-iproc.c val = iproc_pcie_read_reg(pcie, IPROC_PCIE_MSI_EN_CFG); pcie 1301 drivers/pci/controller/pcie-iproc.c iproc_pcie_write_reg(pcie, IPROC_PCIE_MSI_EN_CFG, val); pcie 1311 drivers/pci/controller/pcie-iproc.c iproc_pcie_write_reg(pcie, IPROC_PCIE_MSI_BASE_ADDR, pcie 1315 drivers/pci/controller/pcie-iproc.c iproc_pcie_write_reg(pcie, IPROC_PCIE_MSI_WINDOW_SIZE, 0); pcie 1318 drivers/pci/controller/pcie-iproc.c val = iproc_pcie_read_reg(pcie, IPROC_PCIE_MSI_GIC_MODE); pcie 1320 drivers/pci/controller/pcie-iproc.c iproc_pcie_write_reg(pcie, IPROC_PCIE_MSI_GIC_MODE, val); pcie 1327 drivers/pci/controller/pcie-iproc.c iproc_pcie_write_reg(pcie, IPROC_PCIE_MSI_ADDR_HI, pcie 1329 drivers/pci/controller/pcie-iproc.c iproc_pcie_write_reg(pcie, IPROC_PCIE_MSI_ADDR_LO, pcie 1333 drivers/pci/controller/pcie-iproc.c val = iproc_pcie_read_reg(pcie, IPROC_PCIE_MSI_EN_CFG); pcie 1335 drivers/pci/controller/pcie-iproc.c iproc_pcie_write_reg(pcie, IPROC_PCIE_MSI_EN_CFG, val); pcie 1338 drivers/pci/controller/pcie-iproc.c static int iproc_pcie_msi_steer(struct iproc_pcie *pcie, pcie 1341 drivers/pci/controller/pcie-iproc.c struct device *dev = pcie->dev; pcie 1345 drivers/pci/controller/pcie-iproc.c ret = iproce_pcie_get_msi(pcie, msi_node, &msi_addr); pcie 1351 drivers/pci/controller/pcie-iproc.c switch (pcie->type) { pcie 1353 drivers/pci/controller/pcie-iproc.c ret = iproc_pcie_paxb_v2_msi_steer(pcie, msi_addr); pcie 1358 drivers/pci/controller/pcie-iproc.c iproc_pcie_paxc_v2_msi_steer(pcie, msi_addr, true); pcie 1367 drivers/pci/controller/pcie-iproc.c static int iproc_pcie_msi_enable(struct iproc_pcie *pcie) pcie 1377 drivers/pci/controller/pcie-iproc.c msi_node = of_parse_phandle(pcie->dev->of_node, "msi-parent", 0); pcie 1383 drivers/pci/controller/pcie-iproc.c msi_map = of_get_property(pcie->dev->of_node, "msi-map", &len); pcie 1398 drivers/pci/controller/pcie-iproc.c if (pcie->need_msi_steer) { pcie 1399 drivers/pci/controller/pcie-iproc.c ret = iproc_pcie_msi_steer(pcie, msi_node); pcie 1408 drivers/pci/controller/pcie-iproc.c ret = iproc_msi_init(pcie, msi_node); pcie 1415 drivers/pci/controller/pcie-iproc.c static void iproc_pcie_msi_disable(struct iproc_pcie *pcie) pcie 1417 drivers/pci/controller/pcie-iproc.c iproc_msi_exit(pcie); pcie 1420 drivers/pci/controller/pcie-iproc.c static int iproc_pcie_rev_init(struct iproc_pcie *pcie) pcie 1422 drivers/pci/controller/pcie-iproc.c struct device *dev = pcie->dev; pcie 1426 drivers/pci/controller/pcie-iproc.c switch (pcie->type) { pcie 1432 drivers/pci/controller/pcie-iproc.c pcie->has_apb_err_disable = true; pcie 1433 drivers/pci/controller/pcie-iproc.c if (pcie->need_ob_cfg) { pcie 1434 drivers/pci/controller/pcie-iproc.c pcie->ob_map = paxb_ob_map; pcie 1435 drivers/pci/controller/pcie-iproc.c pcie->ob.nr_windows = ARRAY_SIZE(paxb_ob_map); pcie 1440 drivers/pci/controller/pcie-iproc.c pcie->iproc_cfg_read = true; pcie 1441 drivers/pci/controller/pcie-iproc.c pcie->has_apb_err_disable = true; pcie 1442 drivers/pci/controller/pcie-iproc.c if (pcie->need_ob_cfg) { pcie 1443 drivers/pci/controller/pcie-iproc.c pcie->ob_map = paxb_v2_ob_map; pcie 1444 drivers/pci/controller/pcie-iproc.c pcie->ob.nr_windows = ARRAY_SIZE(paxb_v2_ob_map); pcie 1446 drivers/pci/controller/pcie-iproc.c pcie->ib.nr_regions = ARRAY_SIZE(paxb_v2_ib_map); pcie 1447 drivers/pci/controller/pcie-iproc.c pcie->ib_map = paxb_v2_ib_map; pcie 1448 drivers/pci/controller/pcie-iproc.c pcie->need_msi_steer = true; pcie 1454 drivers/pci/controller/pcie-iproc.c pcie->ep_is_internal = true; pcie 1455 drivers/pci/controller/pcie-iproc.c pcie->iproc_cfg_read = true; pcie 1456 drivers/pci/controller/pcie-iproc.c pcie->rej_unconfig_pf = true; pcie 1460 drivers/pci/controller/pcie-iproc.c pcie->ep_is_internal = true; pcie 1461 drivers/pci/controller/pcie-iproc.c pcie->iproc_cfg_read = true; pcie 1462 drivers/pci/controller/pcie-iproc.c pcie->rej_unconfig_pf = true; pcie 1463 drivers/pci/controller/pcie-iproc.c pcie->need_msi_steer = true; pcie 1470 drivers/pci/controller/pcie-iproc.c pcie->reg_offsets = devm_kcalloc(dev, IPROC_PCIE_MAX_NUM_REG, pcie 1471 drivers/pci/controller/pcie-iproc.c sizeof(*pcie->reg_offsets), pcie 1473 drivers/pci/controller/pcie-iproc.c if (!pcie->reg_offsets) pcie 1477 drivers/pci/controller/pcie-iproc.c pcie->reg_offsets[0] = (pcie->type == IPROC_PCIE_PAXC_V2) ? pcie 1480 drivers/pci/controller/pcie-iproc.c pcie->reg_offsets[reg_idx] = regs[reg_idx] ? pcie 1486 drivers/pci/controller/pcie-iproc.c int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res) pcie 1491 drivers/pci/controller/pcie-iproc.c struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie); pcie 1493 drivers/pci/controller/pcie-iproc.c dev = pcie->dev; pcie 1495 drivers/pci/controller/pcie-iproc.c ret = iproc_pcie_rev_init(pcie); pcie 1505 drivers/pci/controller/pcie-iproc.c ret = phy_init(pcie->phy); pcie 1511 drivers/pci/controller/pcie-iproc.c ret = phy_power_on(pcie->phy); pcie 1517 drivers/pci/controller/pcie-iproc.c iproc_pcie_perst_ctrl(pcie, true); pcie 1518 drivers/pci/controller/pcie-iproc.c iproc_pcie_perst_ctrl(pcie, false); pcie 1520 drivers/pci/controller/pcie-iproc.c if (pcie->need_ob_cfg) { pcie 1521 drivers/pci/controller/pcie-iproc.c ret = iproc_pcie_map_ranges(pcie, res); pcie 1528 drivers/pci/controller/pcie-iproc.c if (pcie->need_ib_cfg) { pcie 1529 drivers/pci/controller/pcie-iproc.c ret = iproc_pcie_map_dma_ranges(pcie); pcie 1534 drivers/pci/controller/pcie-iproc.c ret = iproc_pcie_check_link(pcie); pcie 1540 drivers/pci/controller/pcie-iproc.c iproc_pcie_enable(pcie); pcie 1543 drivers/pci/controller/pcie-iproc.c if (iproc_pcie_msi_enable(pcie)) pcie 1550 drivers/pci/controller/pcie-iproc.c host->sysdata = pcie; pcie 1551 drivers/pci/controller/pcie-iproc.c host->map_irq = pcie->map_irq; pcie 1562 drivers/pci/controller/pcie-iproc.c pcie->root_bus = host->bus; pcie 1572 drivers/pci/controller/pcie-iproc.c phy_power_off(pcie->phy); pcie 1574 drivers/pci/controller/pcie-iproc.c phy_exit(pcie->phy); pcie 1579 drivers/pci/controller/pcie-iproc.c int iproc_pcie_remove(struct iproc_pcie *pcie) pcie 1581 drivers/pci/controller/pcie-iproc.c pci_stop_root_bus(pcie->root_bus); pcie 1582 drivers/pci/controller/pcie-iproc.c pci_remove_root_bus(pcie->root_bus); pcie 1584 drivers/pci/controller/pcie-iproc.c iproc_pcie_msi_disable(pcie); pcie 1586 drivers/pci/controller/pcie-iproc.c phy_power_off(pcie->phy); pcie 1587 drivers/pci/controller/pcie-iproc.c phy_exit(pcie->phy); pcie 1599 drivers/pci/controller/pcie-iproc.c struct iproc_pcie *pcie = iproc_data(pdev->bus); pcie 1602 drivers/pci/controller/pcie-iproc.c iproc_pcie_paxc_v2_msi_steer(pcie, 0, false); pcie 109 drivers/pci/controller/pcie-iproc.h int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res); pcie 110 drivers/pci/controller/pcie-iproc.h int iproc_pcie_remove(struct iproc_pcie *pcie); pcie 111 drivers/pci/controller/pcie-iproc.h int iproc_pcie_shutdown(struct iproc_pcie *pcie); pcie 114 drivers/pci/controller/pcie-iproc.h int iproc_msi_init(struct iproc_pcie *pcie, struct device_node *node); pcie 115 drivers/pci/controller/pcie-iproc.h void iproc_msi_exit(struct iproc_pcie *pcie); pcie 117 drivers/pci/controller/pcie-iproc.h static inline int iproc_msi_init(struct iproc_pcie *pcie, pcie 122 drivers/pci/controller/pcie-iproc.h static inline void iproc_msi_exit(struct iproc_pcie *pcie) pcie 186 drivers/pci/controller/pcie-mediatek.c struct mtk_pcie *pcie; pcie 225 drivers/pci/controller/pcie-mediatek.c static void mtk_pcie_subsys_powerdown(struct mtk_pcie *pcie) pcie 227 drivers/pci/controller/pcie-mediatek.c struct device *dev = pcie->dev; pcie 229 drivers/pci/controller/pcie-mediatek.c clk_disable_unprepare(pcie->free_ck); pcie 237 drivers/pci/controller/pcie-mediatek.c struct mtk_pcie *pcie = port->pcie; pcie 238 drivers/pci/controller/pcie-mediatek.c struct device *dev = pcie->dev; pcie 245 drivers/pci/controller/pcie-mediatek.c static void mtk_pcie_put_resources(struct mtk_pcie *pcie) pcie 249 drivers/pci/controller/pcie-mediatek.c list_for_each_entry_safe(port, tmp, &pcie->ports, list) { pcie 261 drivers/pci/controller/pcie-mediatek.c mtk_pcie_subsys_powerdown(pcie); pcie 339 drivers/pci/controller/pcie-mediatek.c struct mtk_pcie *pcie = bus->sysdata; pcie 353 drivers/pci/controller/pcie-mediatek.c list_for_each_entry(port, &pcie->ports, list) pcie 410 drivers/pci/controller/pcie-mediatek.c dev_dbg(port->pcie->dev, "msi#%d address_hi %#x address_lo %#x\n", pcie 470 drivers/pci/controller/pcie-mediatek.c dev_err(port->pcie->dev, "trying to free unused MSI#%lu\n", pcie 500 drivers/pci/controller/pcie-mediatek.c struct fwnode_handle *fwnode = of_node_to_fwnode(port->pcie->dev->of_node); pcie 507 drivers/pci/controller/pcie-mediatek.c dev_err(port->pcie->dev, "failed to create IRQ domain\n"); pcie 514 drivers/pci/controller/pcie-mediatek.c dev_err(port->pcie->dev, "failed to create MSI domain\n"); pcie 536 drivers/pci/controller/pcie-mediatek.c static void mtk_pcie_irq_teardown(struct mtk_pcie *pcie) pcie 540 drivers/pci/controller/pcie-mediatek.c list_for_each_entry_safe(port, tmp, &pcie->ports, list) { pcie 573 drivers/pci/controller/pcie-mediatek.c struct device *dev = port->pcie->dev; pcie 643 drivers/pci/controller/pcie-mediatek.c struct mtk_pcie *pcie = port->pcie; pcie 644 drivers/pci/controller/pcie-mediatek.c struct device *dev = pcie->dev; pcie 663 drivers/pci/controller/pcie-mediatek.c struct mtk_pcie *pcie = port->pcie; pcie 664 drivers/pci/controller/pcie-mediatek.c struct resource *mem = &pcie->mem; pcie 665 drivers/pci/controller/pcie-mediatek.c const struct mtk_pcie_soc *soc = port->pcie->soc; pcie 670 drivers/pci/controller/pcie-mediatek.c if (pcie->base) { pcie 671 drivers/pci/controller/pcie-mediatek.c val = readl(pcie->base + PCIE_SYS_CFG_V2); pcie 674 drivers/pci/controller/pcie-mediatek.c writel(val, pcie->base + PCIE_SYS_CFG_V2); pcie 738 drivers/pci/controller/pcie-mediatek.c struct mtk_pcie *pcie = bus->sysdata; pcie 741 drivers/pci/controller/pcie-mediatek.c bus->number), pcie->base + PCIE_CFG_ADDR); pcie 743 drivers/pci/controller/pcie-mediatek.c return pcie->base + PCIE_CFG_DATA + (where & 3); pcie 754 drivers/pci/controller/pcie-mediatek.c struct mtk_pcie *pcie = port->pcie; pcie 761 drivers/pci/controller/pcie-mediatek.c val = readl(pcie->base + PCIE_SYS_CFG); pcie 763 drivers/pci/controller/pcie-mediatek.c writel(val, pcie->base + PCIE_SYS_CFG); pcie 766 drivers/pci/controller/pcie-mediatek.c val = readl(pcie->base + PCIE_SYS_CFG); pcie 768 drivers/pci/controller/pcie-mediatek.c writel(val, pcie->base + PCIE_SYS_CFG); pcie 778 drivers/pci/controller/pcie-mediatek.c val = readl(pcie->base + PCIE_INT_ENABLE); pcie 780 drivers/pci/controller/pcie-mediatek.c writel(val, pcie->base + PCIE_INT_ENABLE); pcie 791 drivers/pci/controller/pcie-mediatek.c pcie->base + PCIE_CFG_ADDR); pcie 792 drivers/pci/controller/pcie-mediatek.c val = readl(pcie->base + PCIE_CFG_DATA); pcie 796 drivers/pci/controller/pcie-mediatek.c pcie->base + PCIE_CFG_ADDR); pcie 797 drivers/pci/controller/pcie-mediatek.c writel(val, pcie->base + PCIE_CFG_DATA); pcie 801 drivers/pci/controller/pcie-mediatek.c pcie->base + PCIE_CFG_ADDR); pcie 802 drivers/pci/controller/pcie-mediatek.c val = readl(pcie->base + PCIE_CFG_DATA); pcie 806 drivers/pci/controller/pcie-mediatek.c pcie->base + PCIE_CFG_ADDR); pcie 807 drivers/pci/controller/pcie-mediatek.c writel(val, pcie->base + PCIE_CFG_DATA); pcie 814 drivers/pci/controller/pcie-mediatek.c struct mtk_pcie *pcie = port->pcie; pcie 815 drivers/pci/controller/pcie-mediatek.c struct device *dev = pcie->dev; pcie 869 drivers/pci/controller/pcie-mediatek.c if (!pcie->soc->startup(port)) pcie 893 drivers/pci/controller/pcie-mediatek.c static int mtk_pcie_parse_port(struct mtk_pcie *pcie, pcie 899 drivers/pci/controller/pcie-mediatek.c struct device *dev = pcie->dev; pcie 961 drivers/pci/controller/pcie-mediatek.c port->pcie = pcie; pcie 963 drivers/pci/controller/pcie-mediatek.c if (pcie->soc->setup_irq) { pcie 964 drivers/pci/controller/pcie-mediatek.c err = pcie->soc->setup_irq(port, node); pcie 970 drivers/pci/controller/pcie-mediatek.c list_add_tail(&port->list, &pcie->ports); pcie 975 drivers/pci/controller/pcie-mediatek.c static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie) pcie 977 drivers/pci/controller/pcie-mediatek.c struct device *dev = pcie->dev; pcie 985 drivers/pci/controller/pcie-mediatek.c pcie->base = devm_ioremap_resource(dev, regs); pcie 986 drivers/pci/controller/pcie-mediatek.c if (IS_ERR(pcie->base)) { pcie 988 drivers/pci/controller/pcie-mediatek.c return PTR_ERR(pcie->base); pcie 992 drivers/pci/controller/pcie-mediatek.c pcie->free_ck = devm_clk_get(dev, "free_ck"); pcie 993 drivers/pci/controller/pcie-mediatek.c if (IS_ERR(pcie->free_ck)) { pcie 994 drivers/pci/controller/pcie-mediatek.c if (PTR_ERR(pcie->free_ck) == -EPROBE_DEFER) pcie 997 drivers/pci/controller/pcie-mediatek.c pcie->free_ck = NULL; pcie 1004 drivers/pci/controller/pcie-mediatek.c err = clk_prepare_enable(pcie->free_ck); pcie 1019 drivers/pci/controller/pcie-mediatek.c static int mtk_pcie_setup(struct mtk_pcie *pcie) pcie 1021 drivers/pci/controller/pcie-mediatek.c struct device *dev = pcie->dev; pcie 1024 drivers/pci/controller/pcie-mediatek.c struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie); pcie 1051 drivers/pci/controller/pcie-mediatek.c memcpy(&pcie->mem, win->res, sizeof(*win->res)); pcie 1052 drivers/pci/controller/pcie-mediatek.c pcie->mem.name = "non-prefetchable"; pcie 1055 drivers/pci/controller/pcie-mediatek.c pcie->busnr = win->res->start; pcie 1071 drivers/pci/controller/pcie-mediatek.c err = mtk_pcie_parse_port(pcie, child, slot); pcie 1076 drivers/pci/controller/pcie-mediatek.c err = mtk_pcie_subsys_powerup(pcie); pcie 1081 drivers/pci/controller/pcie-mediatek.c list_for_each_entry_safe(port, tmp, &pcie->ports, list) pcie 1085 drivers/pci/controller/pcie-mediatek.c if (list_empty(&pcie->ports)) pcie 1086 drivers/pci/controller/pcie-mediatek.c mtk_pcie_subsys_powerdown(pcie); pcie 1094 drivers/pci/controller/pcie-mediatek.c struct mtk_pcie *pcie; pcie 1098 drivers/pci/controller/pcie-mediatek.c host = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); pcie 1102 drivers/pci/controller/pcie-mediatek.c pcie = pci_host_bridge_priv(host); pcie 1104 drivers/pci/controller/pcie-mediatek.c pcie->dev = dev; pcie 1105 drivers/pci/controller/pcie-mediatek.c pcie->soc = of_device_get_match_data(dev); pcie 1106 drivers/pci/controller/pcie-mediatek.c platform_set_drvdata(pdev, pcie); pcie 1107 drivers/pci/controller/pcie-mediatek.c INIT_LIST_HEAD(&pcie->ports); pcie 1109 drivers/pci/controller/pcie-mediatek.c err = mtk_pcie_setup(pcie); pcie 1113 drivers/pci/controller/pcie-mediatek.c host->busnr = pcie->busnr; pcie 1114 drivers/pci/controller/pcie-mediatek.c host->dev.parent = pcie->dev; pcie 1115 drivers/pci/controller/pcie-mediatek.c host->ops = pcie->soc->ops; pcie 1118 drivers/pci/controller/pcie-mediatek.c host->sysdata = pcie; pcie 1127 drivers/pci/controller/pcie-mediatek.c if (!list_empty(&pcie->ports)) pcie 1128 drivers/pci/controller/pcie-mediatek.c mtk_pcie_put_resources(pcie); pcie 1134 drivers/pci/controller/pcie-mediatek.c static void mtk_pcie_free_resources(struct mtk_pcie *pcie) pcie 1136 drivers/pci/controller/pcie-mediatek.c struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie); pcie 1144 drivers/pci/controller/pcie-mediatek.c struct mtk_pcie *pcie = platform_get_drvdata(pdev); pcie 1145 drivers/pci/controller/pcie-mediatek.c struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie); pcie 1149 drivers/pci/controller/pcie-mediatek.c mtk_pcie_free_resources(pcie); pcie 1151 drivers/pci/controller/pcie-mediatek.c mtk_pcie_irq_teardown(pcie); pcie 1153 drivers/pci/controller/pcie-mediatek.c mtk_pcie_put_resources(pcie); pcie 1160 drivers/pci/controller/pcie-mediatek.c struct mtk_pcie *pcie = dev_get_drvdata(dev); pcie 1163 drivers/pci/controller/pcie-mediatek.c if (list_empty(&pcie->ports)) pcie 1166 drivers/pci/controller/pcie-mediatek.c list_for_each_entry(port, &pcie->ports, list) { pcie 1177 drivers/pci/controller/pcie-mediatek.c clk_disable_unprepare(pcie->free_ck); pcie 1184 drivers/pci/controller/pcie-mediatek.c struct mtk_pcie *pcie = dev_get_drvdata(dev); pcie 1187 drivers/pci/controller/pcie-mediatek.c if (list_empty(&pcie->ports)) pcie 1190 drivers/pci/controller/pcie-mediatek.c clk_prepare_enable(pcie->free_ck); pcie 1192 drivers/pci/controller/pcie-mediatek.c list_for_each_entry_safe(port, tmp, &pcie->ports, list) pcie 1196 drivers/pci/controller/pcie-mediatek.c if (list_empty(&pcie->ports)) pcie 1197 drivers/pci/controller/pcie-mediatek.c clk_disable_unprepare(pcie->free_ck); pcie 168 drivers/pci/controller/pcie-mobiveil.c static void mobiveil_pcie_sel_page(struct mobiveil_pcie *pcie, u8 pg_idx) pcie 172 drivers/pci/controller/pcie-mobiveil.c val = readl(pcie->csr_axi_slave_base + PAB_CTRL); pcie 176 drivers/pci/controller/pcie-mobiveil.c writel(val, pcie->csr_axi_slave_base + PAB_CTRL); pcie 179 drivers/pci/controller/pcie-mobiveil.c static void *mobiveil_pcie_comp_addr(struct mobiveil_pcie *pcie, u32 off) pcie 183 drivers/pci/controller/pcie-mobiveil.c mobiveil_pcie_sel_page(pcie, 0); pcie 184 drivers/pci/controller/pcie-mobiveil.c return pcie->csr_axi_slave_base + off; pcie 187 drivers/pci/controller/pcie-mobiveil.c mobiveil_pcie_sel_page(pcie, OFFSET_TO_PAGE_IDX(off)); pcie 188 drivers/pci/controller/pcie-mobiveil.c return pcie->csr_axi_slave_base + OFFSET_TO_PAGE_ADDR(off); pcie 238 drivers/pci/controller/pcie-mobiveil.c static u32 mobiveil_csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size) pcie 244 drivers/pci/controller/pcie-mobiveil.c addr = mobiveil_pcie_comp_addr(pcie, off); pcie 248 drivers/pci/controller/pcie-mobiveil.c dev_err(&pcie->pdev->dev, "read CSR address failed\n"); pcie 253 drivers/pci/controller/pcie-mobiveil.c static void mobiveil_csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off, pcie 259 drivers/pci/controller/pcie-mobiveil.c addr = mobiveil_pcie_comp_addr(pcie, off); pcie 263 drivers/pci/controller/pcie-mobiveil.c dev_err(&pcie->pdev->dev, "write CSR address failed\n"); pcie 266 drivers/pci/controller/pcie-mobiveil.c static u32 mobiveil_csr_readl(struct mobiveil_pcie *pcie, u32 off) pcie 268 drivers/pci/controller/pcie-mobiveil.c return mobiveil_csr_read(pcie, off, 0x4); pcie 271 drivers/pci/controller/pcie-mobiveil.c static void mobiveil_csr_writel(struct mobiveil_pcie *pcie, u32 val, u32 off) pcie 273 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_write(pcie, val, off, 0x4); pcie 276 drivers/pci/controller/pcie-mobiveil.c static bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie) pcie 278 drivers/pci/controller/pcie-mobiveil.c return (mobiveil_csr_readl(pcie, LTSSM_STATUS) & pcie 284 drivers/pci/controller/pcie-mobiveil.c struct mobiveil_pcie *pcie = bus->sysdata; pcie 287 drivers/pci/controller/pcie-mobiveil.c if ((bus->number == pcie->root_bus_nr) && (devfn > 0)) pcie 294 drivers/pci/controller/pcie-mobiveil.c if ((bus->primary == pcie->root_bus_nr) && (PCI_SLOT(devfn) > 0)) pcie 307 drivers/pci/controller/pcie-mobiveil.c struct mobiveil_pcie *pcie = bus->sysdata; pcie 314 drivers/pci/controller/pcie-mobiveil.c if (bus->number == pcie->root_bus_nr) pcie 315 drivers/pci/controller/pcie-mobiveil.c return pcie->csr_axi_slave_base + where; pcie 327 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, value, PAB_AXI_AMAP_PEX_WIN_L(WIN_NUM_0)); pcie 329 drivers/pci/controller/pcie-mobiveil.c return pcie->config_axi_slave_base + where; pcie 341 drivers/pci/controller/pcie-mobiveil.c struct mobiveil_pcie *pcie = irq_desc_get_handler_data(desc); pcie 342 drivers/pci/controller/pcie-mobiveil.c struct device *dev = &pcie->pdev->dev; pcie 343 drivers/pci/controller/pcie-mobiveil.c struct mobiveil_msi *msi = &pcie->msi; pcie 357 drivers/pci/controller/pcie-mobiveil.c val = mobiveil_csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT); pcie 358 drivers/pci/controller/pcie-mobiveil.c mask = mobiveil_csr_readl(pcie, PAB_INTP_AMBA_MISC_ENB); pcie 363 drivers/pci/controller/pcie-mobiveil.c shifted_status = mobiveil_csr_readl(pcie, pcie 369 drivers/pci/controller/pcie-mobiveil.c virq = irq_find_mapping(pcie->intx_domain, pcie 378 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, pcie 383 drivers/pci/controller/pcie-mobiveil.c shifted_status = mobiveil_csr_readl(pcie, pcie 391 drivers/pci/controller/pcie-mobiveil.c msi_status = readl_relaxed(pcie->apb_csr_base + MSI_STATUS_OFFSET); pcie 395 drivers/pci/controller/pcie-mobiveil.c msi_data = readl_relaxed(pcie->apb_csr_base + MSI_DATA_OFFSET); pcie 403 drivers/pci/controller/pcie-mobiveil.c msi_addr_lo = readl_relaxed(pcie->apb_csr_base + pcie 405 drivers/pci/controller/pcie-mobiveil.c msi_addr_hi = readl_relaxed(pcie->apb_csr_base + pcie 414 drivers/pci/controller/pcie-mobiveil.c msi_status = readl_relaxed(pcie->apb_csr_base + pcie 419 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, intr_status, PAB_INTP_AMBA_MISC_STAT); pcie 423 drivers/pci/controller/pcie-mobiveil.c static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie) pcie 425 drivers/pci/controller/pcie-mobiveil.c struct device *dev = &pcie->pdev->dev; pcie 426 drivers/pci/controller/pcie-mobiveil.c struct platform_device *pdev = pcie->pdev; pcie 433 drivers/pci/controller/pcie-mobiveil.c pcie->config_axi_slave_base = devm_pci_remap_cfg_resource(dev, res); pcie 434 drivers/pci/controller/pcie-mobiveil.c if (IS_ERR(pcie->config_axi_slave_base)) pcie 435 drivers/pci/controller/pcie-mobiveil.c return PTR_ERR(pcie->config_axi_slave_base); pcie 436 drivers/pci/controller/pcie-mobiveil.c pcie->ob_io_res = res; pcie 441 drivers/pci/controller/pcie-mobiveil.c pcie->csr_axi_slave_base = devm_pci_remap_cfg_resource(dev, res); pcie 442 drivers/pci/controller/pcie-mobiveil.c if (IS_ERR(pcie->csr_axi_slave_base)) pcie 443 drivers/pci/controller/pcie-mobiveil.c return PTR_ERR(pcie->csr_axi_slave_base); pcie 444 drivers/pci/controller/pcie-mobiveil.c pcie->pcie_reg_base = res->start; pcie 448 drivers/pci/controller/pcie-mobiveil.c pcie->apb_csr_base = devm_pci_remap_cfg_resource(dev, res); pcie 449 drivers/pci/controller/pcie-mobiveil.c if (IS_ERR(pcie->apb_csr_base)) pcie 450 drivers/pci/controller/pcie-mobiveil.c return PTR_ERR(pcie->apb_csr_base); pcie 453 drivers/pci/controller/pcie-mobiveil.c if (of_property_read_u32(node, "apio-wins", &pcie->apio_wins)) pcie 454 drivers/pci/controller/pcie-mobiveil.c pcie->apio_wins = MAX_PIO_WINDOWS; pcie 456 drivers/pci/controller/pcie-mobiveil.c if (of_property_read_u32(node, "ppio-wins", &pcie->ppio_wins)) pcie 457 drivers/pci/controller/pcie-mobiveil.c pcie->ppio_wins = MAX_PIO_WINDOWS; pcie 459 drivers/pci/controller/pcie-mobiveil.c pcie->irq = platform_get_irq(pdev, 0); pcie 460 drivers/pci/controller/pcie-mobiveil.c if (pcie->irq <= 0) { pcie 461 drivers/pci/controller/pcie-mobiveil.c dev_err(dev, "failed to map IRQ: %d\n", pcie->irq); pcie 468 drivers/pci/controller/pcie-mobiveil.c static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, pcie 474 drivers/pci/controller/pcie-mobiveil.c if (win_num >= pcie->ppio_wins) { pcie 475 drivers/pci/controller/pcie-mobiveil.c dev_err(&pcie->pdev->dev, pcie 480 drivers/pci/controller/pcie-mobiveil.c value = mobiveil_csr_readl(pcie, PAB_PEX_AMAP_CTRL(win_num)); pcie 484 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, value, PAB_PEX_AMAP_CTRL(win_num)); pcie 486 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, upper_32_bits(size64), pcie 489 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, lower_32_bits(cpu_addr), pcie 491 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, upper_32_bits(cpu_addr), pcie 494 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, lower_32_bits(pci_addr), pcie 496 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, upper_32_bits(pci_addr), pcie 499 drivers/pci/controller/pcie-mobiveil.c pcie->ib_wins_configured++; pcie 505 drivers/pci/controller/pcie-mobiveil.c static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, pcie 511 drivers/pci/controller/pcie-mobiveil.c if (win_num >= pcie->apio_wins) { pcie 512 drivers/pci/controller/pcie-mobiveil.c dev_err(&pcie->pdev->dev, pcie 521 drivers/pci/controller/pcie-mobiveil.c value = mobiveil_csr_readl(pcie, PAB_AXI_AMAP_CTRL(win_num)); pcie 525 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, value, PAB_AXI_AMAP_CTRL(win_num)); pcie 527 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, upper_32_bits(size64), pcie 534 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, pcie 537 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, upper_32_bits(cpu_addr), pcie 540 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, lower_32_bits(pci_addr), pcie 542 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, upper_32_bits(pci_addr), pcie 545 drivers/pci/controller/pcie-mobiveil.c pcie->ob_wins_configured++; pcie 548 drivers/pci/controller/pcie-mobiveil.c static int mobiveil_bringup_link(struct mobiveil_pcie *pcie) pcie 554 drivers/pci/controller/pcie-mobiveil.c if (mobiveil_pcie_link_up(pcie)) pcie 560 drivers/pci/controller/pcie-mobiveil.c dev_err(&pcie->pdev->dev, "link never came up\n"); pcie 565 drivers/pci/controller/pcie-mobiveil.c static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie) pcie 567 drivers/pci/controller/pcie-mobiveil.c phys_addr_t msg_addr = pcie->pcie_reg_base; pcie 568 drivers/pci/controller/pcie-mobiveil.c struct mobiveil_msi *msi = &pcie->msi; pcie 570 drivers/pci/controller/pcie-mobiveil.c pcie->msi.num_of_vectors = PCI_NUM_MSI; pcie 574 drivers/pci/controller/pcie-mobiveil.c pcie->apb_csr_base + MSI_BASE_LO_OFFSET); pcie 576 drivers/pci/controller/pcie-mobiveil.c pcie->apb_csr_base + MSI_BASE_HI_OFFSET); pcie 577 drivers/pci/controller/pcie-mobiveil.c writel_relaxed(4096, pcie->apb_csr_base + MSI_SIZE_OFFSET); pcie 578 drivers/pci/controller/pcie-mobiveil.c writel_relaxed(1, pcie->apb_csr_base + MSI_ENABLE_OFFSET); pcie 581 drivers/pci/controller/pcie-mobiveil.c static int mobiveil_host_init(struct mobiveil_pcie *pcie) pcie 587 drivers/pci/controller/pcie-mobiveil.c value = mobiveil_csr_readl(pcie, PCI_PRIMARY_BUS); pcie 590 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, value, PCI_PRIMARY_BUS); pcie 596 drivers/pci/controller/pcie-mobiveil.c value = mobiveil_csr_readl(pcie, PCI_COMMAND); pcie 598 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, value, PCI_COMMAND); pcie 604 drivers/pci/controller/pcie-mobiveil.c pab_ctrl = mobiveil_csr_readl(pcie, PAB_CTRL); pcie 606 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, pab_ctrl, PAB_CTRL); pcie 608 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, (PAB_INTP_INTX_MASK | PAB_INTP_MSI_MASK), pcie 615 drivers/pci/controller/pcie-mobiveil.c value = mobiveil_csr_readl(pcie, PAB_AXI_PIO_CTRL); pcie 617 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, value, PAB_AXI_PIO_CTRL); pcie 620 drivers/pci/controller/pcie-mobiveil.c value = mobiveil_csr_readl(pcie, PAB_PEX_PIO_CTRL); pcie 622 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, value, PAB_PEX_PIO_CTRL); pcie 632 drivers/pci/controller/pcie-mobiveil.c program_ob_windows(pcie, WIN_NUM_0, pcie->ob_io_res->start, 0, pcie 633 drivers/pci/controller/pcie-mobiveil.c CFG_WINDOW_TYPE, resource_size(pcie->ob_io_res)); pcie 636 drivers/pci/controller/pcie-mobiveil.c program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); pcie 639 drivers/pci/controller/pcie-mobiveil.c resource_list_for_each_entry(win, &pcie->resources) { pcie 648 drivers/pci/controller/pcie-mobiveil.c program_ob_windows(pcie, pcie->ob_wins_configured, pcie 655 drivers/pci/controller/pcie-mobiveil.c value = mobiveil_csr_readl(pcie, PAB_INTP_AXI_PIO_CLASS); pcie 658 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, value, PAB_INTP_AXI_PIO_CLASS); pcie 661 drivers/pci/controller/pcie-mobiveil.c mobiveil_pcie_enable_msi(pcie); pcie 669 drivers/pci/controller/pcie-mobiveil.c struct mobiveil_pcie *pcie; pcie 673 drivers/pci/controller/pcie-mobiveil.c pcie = irq_desc_get_chip_data(desc); pcie 675 drivers/pci/controller/pcie-mobiveil.c raw_spin_lock_irqsave(&pcie->intx_mask_lock, flags); pcie 676 drivers/pci/controller/pcie-mobiveil.c shifted_val = mobiveil_csr_readl(pcie, PAB_INTP_AMBA_MISC_ENB); pcie 678 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, shifted_val, PAB_INTP_AMBA_MISC_ENB); pcie 679 drivers/pci/controller/pcie-mobiveil.c raw_spin_unlock_irqrestore(&pcie->intx_mask_lock, flags); pcie 685 drivers/pci/controller/pcie-mobiveil.c struct mobiveil_pcie *pcie; pcie 689 drivers/pci/controller/pcie-mobiveil.c pcie = irq_desc_get_chip_data(desc); pcie 691 drivers/pci/controller/pcie-mobiveil.c raw_spin_lock_irqsave(&pcie->intx_mask_lock, flags); pcie 692 drivers/pci/controller/pcie-mobiveil.c shifted_val = mobiveil_csr_readl(pcie, PAB_INTP_AMBA_MISC_ENB); pcie 694 drivers/pci/controller/pcie-mobiveil.c mobiveil_csr_writel(pcie, shifted_val, PAB_INTP_AMBA_MISC_ENB); pcie 695 drivers/pci/controller/pcie-mobiveil.c raw_spin_unlock_irqrestore(&pcie->intx_mask_lock, flags); pcie 735 drivers/pci/controller/pcie-mobiveil.c struct mobiveil_pcie *pcie = irq_data_get_irq_chip_data(data); pcie 736 drivers/pci/controller/pcie-mobiveil.c phys_addr_t addr = pcie->pcie_reg_base + (data->hwirq * sizeof(int)); pcie 742 drivers/pci/controller/pcie-mobiveil.c dev_dbg(&pcie->pdev->dev, "msi#%d address_hi %#x address_lo %#x\n", pcie 762 drivers/pci/controller/pcie-mobiveil.c struct mobiveil_pcie *pcie = domain->host_data; pcie 763 drivers/pci/controller/pcie-mobiveil.c struct mobiveil_msi *msi = &pcie->msi; pcie 789 drivers/pci/controller/pcie-mobiveil.c struct mobiveil_pcie *pcie = irq_data_get_irq_chip_data(d); pcie 790 drivers/pci/controller/pcie-mobiveil.c struct mobiveil_msi *msi = &pcie->msi; pcie 795 drivers/pci/controller/pcie-mobiveil.c dev_err(&pcie->pdev->dev, "trying to free unused MSI#%lu\n", pcie 807 drivers/pci/controller/pcie-mobiveil.c static int mobiveil_allocate_msi_domains(struct mobiveil_pcie *pcie) pcie 809 drivers/pci/controller/pcie-mobiveil.c struct device *dev = &pcie->pdev->dev; pcie 811 drivers/pci/controller/pcie-mobiveil.c struct mobiveil_msi *msi = &pcie->msi; pcie 813 drivers/pci/controller/pcie-mobiveil.c mutex_init(&pcie->msi.lock); pcie 815 drivers/pci/controller/pcie-mobiveil.c &msi_domain_ops, pcie); pcie 833 drivers/pci/controller/pcie-mobiveil.c static int mobiveil_pcie_init_irq_domain(struct mobiveil_pcie *pcie) pcie 835 drivers/pci/controller/pcie-mobiveil.c struct device *dev = &pcie->pdev->dev; pcie 840 drivers/pci/controller/pcie-mobiveil.c pcie->intx_domain = irq_domain_add_linear(node, PCI_NUM_INTX, pcie 841 drivers/pci/controller/pcie-mobiveil.c &intx_domain_ops, pcie); pcie 843 drivers/pci/controller/pcie-mobiveil.c if (!pcie->intx_domain) { pcie 848 drivers/pci/controller/pcie-mobiveil.c raw_spin_lock_init(&pcie->intx_mask_lock); pcie 851 drivers/pci/controller/pcie-mobiveil.c ret = mobiveil_allocate_msi_domains(pcie); pcie 860 drivers/pci/controller/pcie-mobiveil.c struct mobiveil_pcie *pcie; pcie 869 drivers/pci/controller/pcie-mobiveil.c bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); pcie 873 drivers/pci/controller/pcie-mobiveil.c pcie = pci_host_bridge_priv(bridge); pcie 875 drivers/pci/controller/pcie-mobiveil.c pcie->pdev = pdev; pcie 877 drivers/pci/controller/pcie-mobiveil.c ret = mobiveil_pcie_parse_dt(pcie); pcie 883 drivers/pci/controller/pcie-mobiveil.c INIT_LIST_HEAD(&pcie->resources); pcie 887 drivers/pci/controller/pcie-mobiveil.c &pcie->resources, &iobase); pcie 897 drivers/pci/controller/pcie-mobiveil.c ret = mobiveil_host_init(pcie); pcie 904 drivers/pci/controller/pcie-mobiveil.c ret = mobiveil_pcie_init_irq_domain(pcie); pcie 910 drivers/pci/controller/pcie-mobiveil.c irq_set_chained_handler_and_data(pcie->irq, mobiveil_pcie_isr, pcie); pcie 912 drivers/pci/controller/pcie-mobiveil.c ret = devm_request_pci_bus_resources(dev, &pcie->resources); pcie 917 drivers/pci/controller/pcie-mobiveil.c list_splice_init(&pcie->resources, &bridge->windows); pcie 919 drivers/pci/controller/pcie-mobiveil.c bridge->sysdata = pcie; pcie 920 drivers/pci/controller/pcie-mobiveil.c bridge->busnr = pcie->root_bus_nr; pcie 925 drivers/pci/controller/pcie-mobiveil.c ret = mobiveil_bringup_link(pcie); pcie 945 drivers/pci/controller/pcie-mobiveil.c pci_free_resource_list(&pcie->resources); pcie 160 drivers/pci/controller/pcie-rcar.c static void rcar_pci_write_reg(struct rcar_pcie *pcie, u32 val, pcie 163 drivers/pci/controller/pcie-rcar.c writel(val, pcie->base + reg); pcie 166 drivers/pci/controller/pcie-rcar.c static u32 rcar_pci_read_reg(struct rcar_pcie *pcie, unsigned int reg) pcie 168 drivers/pci/controller/pcie-rcar.c return readl(pcie->base + reg); pcie 176 drivers/pci/controller/pcie-rcar.c static void rcar_rmw32(struct rcar_pcie *pcie, int where, u32 mask, u32 data) pcie 179 drivers/pci/controller/pcie-rcar.c u32 val = rcar_pci_read_reg(pcie, where & ~3); pcie 183 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, val, where & ~3); pcie 186 drivers/pci/controller/pcie-rcar.c static u32 rcar_read_conf(struct rcar_pcie *pcie, int where) pcie 189 drivers/pci/controller/pcie-rcar.c u32 val = rcar_pci_read_reg(pcie, where & ~3); pcie 195 drivers/pci/controller/pcie-rcar.c static int rcar_pcie_config_access(struct rcar_pcie *pcie, pcie 226 drivers/pci/controller/pcie-rcar.c *data = rcar_pci_read_reg(pcie, PCICONF(index)); pcie 230 drivers/pci/controller/pcie-rcar.c pcie->root_bus_nr = *data & 0xff; pcie 232 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, *data, PCICONF(index)); pcie 238 drivers/pci/controller/pcie-rcar.c if (pcie->root_bus_nr < 0) pcie 242 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, rcar_pci_read_reg(pcie, PCIEERRFR), PCIEERRFR); pcie 245 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, PCIE_CONF_BUS(bus->number) | pcie 249 drivers/pci/controller/pcie-rcar.c if (bus->parent->number == pcie->root_bus_nr) pcie 250 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, CONFIG_SEND_ENABLE | TYPE0, PCIECCTLR); pcie 252 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, CONFIG_SEND_ENABLE | TYPE1, PCIECCTLR); pcie 255 drivers/pci/controller/pcie-rcar.c if (rcar_pci_read_reg(pcie, PCIEERRFR) & UNSUPPORTED_REQUEST) pcie 259 drivers/pci/controller/pcie-rcar.c if (rcar_read_conf(pcie, RCONF(PCI_STATUS)) & pcie 264 drivers/pci/controller/pcie-rcar.c *data = rcar_pci_read_reg(pcie, PCIECDR); pcie 266 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, *data, PCIECDR); pcie 269 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0, PCIECCTLR); pcie 277 drivers/pci/controller/pcie-rcar.c struct rcar_pcie *pcie = bus->sysdata; pcie 280 drivers/pci/controller/pcie-rcar.c ret = rcar_pcie_config_access(pcie, RCAR_PCI_ACCESS_READ, pcie 302 drivers/pci/controller/pcie-rcar.c struct rcar_pcie *pcie = bus->sysdata; pcie 307 drivers/pci/controller/pcie-rcar.c ret = rcar_pcie_config_access(pcie, RCAR_PCI_ACCESS_READ, pcie 326 drivers/pci/controller/pcie-rcar.c ret = rcar_pcie_config_access(pcie, RCAR_PCI_ACCESS_WRITE, pcie 337 drivers/pci/controller/pcie-rcar.c static void rcar_pcie_setup_window(int win, struct rcar_pcie *pcie, pcie 345 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0x00000000, PCIEPTCTLR(win)); pcie 353 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, mask << 7, PCIEPAMR(win)); pcie 360 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPAUR(win)); pcie 361 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, lower_32_bits(res_start) & ~0x7F, pcie 369 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, mask, PCIEPTCTLR(win)); pcie 403 drivers/pci/controller/pcie-rcar.c static void rcar_pcie_force_speedup(struct rcar_pcie *pcie) pcie 405 drivers/pci/controller/pcie-rcar.c struct device *dev = pcie->dev; pcie 409 drivers/pci/controller/pcie-rcar.c if ((rcar_pci_read_reg(pcie, MACS2R) & LINK_SPEED) != LINK_SPEED_5_0GTS) pcie 412 drivers/pci/controller/pcie-rcar.c if (rcar_pci_read_reg(pcie, MACCTLR) & SPEED_CHANGE) { pcie 417 drivers/pci/controller/pcie-rcar.c macsr = rcar_pci_read_reg(pcie, MACSR); pcie 422 drivers/pci/controller/pcie-rcar.c rcar_rmw32(pcie, EXPCAP(12), PCI_EXP_LNKSTA_CLS, pcie 426 drivers/pci/controller/pcie-rcar.c rcar_rmw32(pcie, MACCGSPSETR, SPCNGRSN, 0); pcie 430 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, macsr, MACSR); pcie 433 drivers/pci/controller/pcie-rcar.c rcar_rmw32(pcie, MACCTLR, SPEED_CHANGE, SPEED_CHANGE); pcie 436 drivers/pci/controller/pcie-rcar.c macsr = rcar_pci_read_reg(pcie, MACSR); pcie 439 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, macsr, MACSR); pcie 457 drivers/pci/controller/pcie-rcar.c static int rcar_pcie_enable(struct rcar_pcie *pcie) pcie 459 drivers/pci/controller/pcie-rcar.c struct device *dev = pcie->dev; pcie 460 drivers/pci/controller/pcie-rcar.c struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie); pcie 465 drivers/pci/controller/pcie-rcar.c rcar_pcie_force_speedup(pcie); pcie 467 drivers/pci/controller/pcie-rcar.c rcar_pcie_setup(&bridge->windows, pcie); pcie 472 drivers/pci/controller/pcie-rcar.c bridge->sysdata = pcie; pcie 473 drivers/pci/controller/pcie-rcar.c bridge->busnr = pcie->root_bus_nr; pcie 478 drivers/pci/controller/pcie-rcar.c bridge->msi = &pcie->msi.chip; pcie 497 drivers/pci/controller/pcie-rcar.c static int phy_wait_for_ack(struct rcar_pcie *pcie) pcie 499 drivers/pci/controller/pcie-rcar.c struct device *dev = pcie->dev; pcie 503 drivers/pci/controller/pcie-rcar.c if (rcar_pci_read_reg(pcie, H1_PCIEPHYADRR) & PHY_ACK) pcie 514 drivers/pci/controller/pcie-rcar.c static void phy_write_reg(struct rcar_pcie *pcie, pcie 526 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, data, H1_PCIEPHYDOUTR); pcie 527 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, phyaddr, H1_PCIEPHYADRR); pcie 530 drivers/pci/controller/pcie-rcar.c phy_wait_for_ack(pcie); pcie 533 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0, H1_PCIEPHYDOUTR); pcie 534 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0, H1_PCIEPHYADRR); pcie 537 drivers/pci/controller/pcie-rcar.c phy_wait_for_ack(pcie); pcie 540 drivers/pci/controller/pcie-rcar.c static int rcar_pcie_wait_for_phyrdy(struct rcar_pcie *pcie) pcie 545 drivers/pci/controller/pcie-rcar.c if (rcar_pci_read_reg(pcie, PCIEPHYSR) & PHYRDY) pcie 554 drivers/pci/controller/pcie-rcar.c static int rcar_pcie_wait_for_dl(struct rcar_pcie *pcie) pcie 559 drivers/pci/controller/pcie-rcar.c if ((rcar_pci_read_reg(pcie, PCIETSTR) & DATA_LINK_ACTIVE)) pcie 569 drivers/pci/controller/pcie-rcar.c static int rcar_pcie_hw_init(struct rcar_pcie *pcie) pcie 574 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0, PCIETCTLR); pcie 577 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 1, PCIEMSR); pcie 579 drivers/pci/controller/pcie-rcar.c err = rcar_pcie_wait_for_phyrdy(pcie); pcie 588 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, PCI_CLASS_BRIDGE_PCI << 16, IDSETR1); pcie 594 drivers/pci/controller/pcie-rcar.c rcar_rmw32(pcie, RCONF(PCI_SECONDARY_BUS), 0xff, 1); pcie 595 drivers/pci/controller/pcie-rcar.c rcar_rmw32(pcie, RCONF(PCI_SUBORDINATE_BUS), 0xff, 1); pcie 598 drivers/pci/controller/pcie-rcar.c rcar_rmw32(pcie, REXPCAP(0), 0xff, PCI_CAP_ID_EXP); pcie 599 drivers/pci/controller/pcie-rcar.c rcar_rmw32(pcie, REXPCAP(PCI_EXP_FLAGS), pcie 601 drivers/pci/controller/pcie-rcar.c rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), 0x7f, pcie 605 drivers/pci/controller/pcie-rcar.c rcar_rmw32(pcie, REXPCAP(PCI_EXP_LNKCAP), PCI_EXP_LNKCAP_DLLLARC, pcie 609 drivers/pci/controller/pcie-rcar.c rcar_rmw32(pcie, REXPCAP(PCI_EXP_SLTCAP), PCI_EXP_SLTCAP_PSN, 0); pcie 612 drivers/pci/controller/pcie-rcar.c rcar_rmw32(pcie, TLCTLR + 1, 0x3f, 50); pcie 615 drivers/pci/controller/pcie-rcar.c rcar_rmw32(pcie, RVCCAP(0), 0xfff00000, 0); pcie 619 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0x801f0000, PCIEMSITXR); pcie 621 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, MACCTLR_INIT_VAL, MACCTLR); pcie 624 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR); pcie 627 drivers/pci/controller/pcie-rcar.c err = rcar_pcie_wait_for_dl(pcie); pcie 632 drivers/pci/controller/pcie-rcar.c rcar_rmw32(pcie, PCIEINTXR, 0, 0xF << 8); pcie 639 drivers/pci/controller/pcie-rcar.c static int rcar_pcie_phy_init_h1(struct rcar_pcie *pcie) pcie 642 drivers/pci/controller/pcie-rcar.c phy_write_reg(pcie, 0, 0x42, 0x1, 0x0EC34191); pcie 643 drivers/pci/controller/pcie-rcar.c phy_write_reg(pcie, 1, 0x42, 0x1, 0x0EC34180); pcie 644 drivers/pci/controller/pcie-rcar.c phy_write_reg(pcie, 0, 0x43, 0x1, 0x00210188); pcie 645 drivers/pci/controller/pcie-rcar.c phy_write_reg(pcie, 1, 0x43, 0x1, 0x00210188); pcie 646 drivers/pci/controller/pcie-rcar.c phy_write_reg(pcie, 0, 0x44, 0x1, 0x015C0014); pcie 647 drivers/pci/controller/pcie-rcar.c phy_write_reg(pcie, 1, 0x44, 0x1, 0x015C0014); pcie 648 drivers/pci/controller/pcie-rcar.c phy_write_reg(pcie, 1, 0x4C, 0x1, 0x786174A0); pcie 649 drivers/pci/controller/pcie-rcar.c phy_write_reg(pcie, 1, 0x4D, 0x1, 0x048000BB); pcie 650 drivers/pci/controller/pcie-rcar.c phy_write_reg(pcie, 0, 0x51, 0x1, 0x079EC062); pcie 651 drivers/pci/controller/pcie-rcar.c phy_write_reg(pcie, 0, 0x52, 0x1, 0x20000000); pcie 652 drivers/pci/controller/pcie-rcar.c phy_write_reg(pcie, 1, 0x52, 0x1, 0x20000000); pcie 653 drivers/pci/controller/pcie-rcar.c phy_write_reg(pcie, 1, 0x56, 0x1, 0x00003806); pcie 655 drivers/pci/controller/pcie-rcar.c phy_write_reg(pcie, 0, 0x60, 0x1, 0x004B03A5); pcie 656 drivers/pci/controller/pcie-rcar.c phy_write_reg(pcie, 0, 0x64, 0x1, 0x3F0F1F0F); pcie 657 drivers/pci/controller/pcie-rcar.c phy_write_reg(pcie, 0, 0x66, 0x1, 0x00008000); pcie 662 drivers/pci/controller/pcie-rcar.c static int rcar_pcie_phy_init_gen2(struct rcar_pcie *pcie) pcie 668 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0x000f0030, GEN2_PCIEPHYADDR); pcie 669 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0x00381203, GEN2_PCIEPHYDATA); pcie 670 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0x00000001, GEN2_PCIEPHYCTRL); pcie 671 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0x00000006, GEN2_PCIEPHYCTRL); pcie 673 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0x000f0054, GEN2_PCIEPHYADDR); pcie 675 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0x13802007, GEN2_PCIEPHYDATA); pcie 676 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0x00000001, GEN2_PCIEPHYCTRL); pcie 677 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0x00000006, GEN2_PCIEPHYCTRL); pcie 682 drivers/pci/controller/pcie-rcar.c static int rcar_pcie_phy_init_gen3(struct rcar_pcie *pcie) pcie 686 drivers/pci/controller/pcie-rcar.c err = phy_init(pcie->phy); pcie 690 drivers/pci/controller/pcie-rcar.c err = phy_power_on(pcie->phy); pcie 692 drivers/pci/controller/pcie-rcar.c phy_exit(pcie->phy); pcie 735 drivers/pci/controller/pcie-rcar.c struct rcar_pcie *pcie = data; pcie 736 drivers/pci/controller/pcie-rcar.c struct rcar_msi *msi = &pcie->msi; pcie 737 drivers/pci/controller/pcie-rcar.c struct device *dev = pcie->dev; pcie 740 drivers/pci/controller/pcie-rcar.c reg = rcar_pci_read_reg(pcie, PCIEMSIFR); pcie 751 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 1 << index, PCIEMSIFR); pcie 765 drivers/pci/controller/pcie-rcar.c reg = rcar_pci_read_reg(pcie, PCIEMSIFR); pcie 775 drivers/pci/controller/pcie-rcar.c struct rcar_pcie *pcie = container_of(chip, struct rcar_pcie, msi.chip); pcie 792 drivers/pci/controller/pcie-rcar.c msg.address_lo = rcar_pci_read_reg(pcie, PCIEMSIALR) & ~MSIFE; pcie 793 drivers/pci/controller/pcie-rcar.c msg.address_hi = rcar_pci_read_reg(pcie, PCIEMSIAUR); pcie 804 drivers/pci/controller/pcie-rcar.c struct rcar_pcie *pcie = container_of(chip, struct rcar_pcie, msi.chip); pcie 844 drivers/pci/controller/pcie-rcar.c msg.address_lo = rcar_pci_read_reg(pcie, PCIEMSIALR) & ~MSIFE; pcie 845 drivers/pci/controller/pcie-rcar.c msg.address_hi = rcar_pci_read_reg(pcie, PCIEMSIAUR); pcie 882 drivers/pci/controller/pcie-rcar.c static void rcar_pcie_unmap_msi(struct rcar_pcie *pcie) pcie 884 drivers/pci/controller/pcie-rcar.c struct rcar_msi *msi = &pcie->msi; pcie 896 drivers/pci/controller/pcie-rcar.c static int rcar_pcie_enable_msi(struct rcar_pcie *pcie) pcie 898 drivers/pci/controller/pcie-rcar.c struct device *dev = pcie->dev; pcie 899 drivers/pci/controller/pcie-rcar.c struct rcar_msi *msi = &pcie->msi; pcie 923 drivers/pci/controller/pcie-rcar.c rcar_msi_irq_chip.name, pcie); pcie 931 drivers/pci/controller/pcie-rcar.c rcar_msi_irq_chip.name, pcie); pcie 945 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, lower_32_bits(base) | MSIFE, PCIEMSIALR); pcie 946 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, upper_32_bits(base), PCIEMSIAUR); pcie 949 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0xffffffff, PCIEMSIIER); pcie 954 drivers/pci/controller/pcie-rcar.c rcar_pcie_unmap_msi(pcie); pcie 958 drivers/pci/controller/pcie-rcar.c static void rcar_pcie_teardown_msi(struct rcar_pcie *pcie) pcie 960 drivers/pci/controller/pcie-rcar.c struct rcar_msi *msi = &pcie->msi; pcie 963 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0, PCIEMSIIER); pcie 966 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0, PCIEMSIALR); pcie 970 drivers/pci/controller/pcie-rcar.c rcar_pcie_unmap_msi(pcie); pcie 973 drivers/pci/controller/pcie-rcar.c static int rcar_pcie_get_resources(struct rcar_pcie *pcie) pcie 975 drivers/pci/controller/pcie-rcar.c struct device *dev = pcie->dev; pcie 979 drivers/pci/controller/pcie-rcar.c pcie->phy = devm_phy_optional_get(dev, "pcie"); pcie 980 drivers/pci/controller/pcie-rcar.c if (IS_ERR(pcie->phy)) pcie 981 drivers/pci/controller/pcie-rcar.c return PTR_ERR(pcie->phy); pcie 987 drivers/pci/controller/pcie-rcar.c pcie->base = devm_ioremap_resource(dev, &res); pcie 988 drivers/pci/controller/pcie-rcar.c if (IS_ERR(pcie->base)) pcie 989 drivers/pci/controller/pcie-rcar.c return PTR_ERR(pcie->base); pcie 991 drivers/pci/controller/pcie-rcar.c pcie->bus_clk = devm_clk_get(dev, "pcie_bus"); pcie 992 drivers/pci/controller/pcie-rcar.c if (IS_ERR(pcie->bus_clk)) { pcie 994 drivers/pci/controller/pcie-rcar.c return PTR_ERR(pcie->bus_clk); pcie 1003 drivers/pci/controller/pcie-rcar.c pcie->msi.irq1 = i; pcie 1011 drivers/pci/controller/pcie-rcar.c pcie->msi.irq2 = i; pcie 1016 drivers/pci/controller/pcie-rcar.c irq_dispose_mapping(pcie->msi.irq1); pcie 1021 drivers/pci/controller/pcie-rcar.c static int rcar_pcie_inbound_ranges(struct rcar_pcie *pcie, pcie 1060 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, lower_32_bits(pci_addr), pcie 1062 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, lower_32_bits(cpu_addr), PCIELAR(idx)); pcie 1063 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, lower_32_bits(mask) | flags, pcie 1066 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, upper_32_bits(pci_addr), pcie 1068 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, upper_32_bits(cpu_addr), pcie 1070 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, 0, PCIELAMR(idx + 1)); pcie 1077 drivers/pci/controller/pcie-rcar.c dev_err(pcie->dev, "Failed to map inbound regions!\n"); pcie 1086 drivers/pci/controller/pcie-rcar.c static int rcar_pcie_parse_map_dma_ranges(struct rcar_pcie *pcie, pcie 1101 drivers/pci/controller/pcie-rcar.c dev_dbg(pcie->dev, "0x%08x 0x%016llx..0x%016llx -> 0x%016llx\n", pcie 1104 drivers/pci/controller/pcie-rcar.c err = rcar_pcie_inbound_ranges(pcie, &range, &index); pcie 1131 drivers/pci/controller/pcie-rcar.c struct rcar_pcie *pcie; pcie 1137 drivers/pci/controller/pcie-rcar.c bridge = pci_alloc_host_bridge(sizeof(*pcie)); pcie 1141 drivers/pci/controller/pcie-rcar.c pcie = pci_host_bridge_priv(bridge); pcie 1143 drivers/pci/controller/pcie-rcar.c pcie->dev = dev; pcie 1144 drivers/pci/controller/pcie-rcar.c platform_set_drvdata(pdev, pcie); pcie 1146 drivers/pci/controller/pcie-rcar.c err = pci_parse_request_of_pci_ranges(dev, &pcie->resources, NULL); pcie 1150 drivers/pci/controller/pcie-rcar.c pm_runtime_enable(pcie->dev); pcie 1151 drivers/pci/controller/pcie-rcar.c err = pm_runtime_get_sync(pcie->dev); pcie 1153 drivers/pci/controller/pcie-rcar.c dev_err(pcie->dev, "pm_runtime_get_sync failed\n"); pcie 1157 drivers/pci/controller/pcie-rcar.c err = rcar_pcie_get_resources(pcie); pcie 1163 drivers/pci/controller/pcie-rcar.c err = clk_prepare_enable(pcie->bus_clk); pcie 1169 drivers/pci/controller/pcie-rcar.c err = rcar_pcie_parse_map_dma_ranges(pcie, dev->of_node); pcie 1174 drivers/pci/controller/pcie-rcar.c err = phy_init_fn(pcie); pcie 1181 drivers/pci/controller/pcie-rcar.c if (rcar_pcie_hw_init(pcie)) { pcie 1187 drivers/pci/controller/pcie-rcar.c data = rcar_pci_read_reg(pcie, MACSR); pcie 1191 drivers/pci/controller/pcie-rcar.c err = rcar_pcie_enable_msi(pcie); pcie 1200 drivers/pci/controller/pcie-rcar.c err = rcar_pcie_enable(pcie); pcie 1208 drivers/pci/controller/pcie-rcar.c rcar_pcie_teardown_msi(pcie); pcie 1211 drivers/pci/controller/pcie-rcar.c if (pcie->phy) { pcie 1212 drivers/pci/controller/pcie-rcar.c phy_power_off(pcie->phy); pcie 1213 drivers/pci/controller/pcie-rcar.c phy_exit(pcie->phy); pcie 1217 drivers/pci/controller/pcie-rcar.c clk_disable_unprepare(pcie->bus_clk); pcie 1220 drivers/pci/controller/pcie-rcar.c irq_dispose_mapping(pcie->msi.irq2); pcie 1221 drivers/pci/controller/pcie-rcar.c irq_dispose_mapping(pcie->msi.irq1); pcie 1228 drivers/pci/controller/pcie-rcar.c pci_free_resource_list(&pcie->resources); pcie 1238 drivers/pci/controller/pcie-rcar.c struct rcar_pcie *pcie = dev_get_drvdata(dev); pcie 1240 drivers/pci/controller/pcie-rcar.c if (rcar_pci_read_reg(pcie, PMSR) && pcie 1241 drivers/pci/controller/pcie-rcar.c !(rcar_pci_read_reg(pcie, PCIETCTLR) & DL_DOWN)) pcie 1245 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, MACCTLR_INIT_VAL, MACCTLR); pcie 1246 drivers/pci/controller/pcie-rcar.c rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR); pcie 1247 drivers/pci/controller/pcie-rcar.c return rcar_pcie_wait_for_dl(pcie); pcie 263 drivers/pci/controller/pcie-rockchip-ep.c struct rockchip_pcie *pcie = &ep->rockchip; pcie 277 drivers/pci/controller/pcie-rockchip-ep.c rockchip_pcie_prog_ep_ob_atu(pcie, fn, r, AXI_WRAPPER_MEM_WRITE, addr, pcie 28 drivers/pci/controller/pcie-tango.c struct tango_pcie *pcie = irq_desc_get_handler_data(desc); pcie 32 drivers/pci/controller/pcie-tango.c spin_lock(&pcie->used_msi_lock); pcie 34 drivers/pci/controller/pcie-tango.c while ((pos = find_next_bit(pcie->used_msi, MSI_MAX, pos)) < MSI_MAX) { pcie 36 drivers/pci/controller/pcie-tango.c status = readl_relaxed(pcie->base + SMP8759_STATUS + base / 8); pcie 38 drivers/pci/controller/pcie-tango.c virq = irq_find_mapping(pcie->dom, base + idx); pcie 44 drivers/pci/controller/pcie-tango.c spin_unlock(&pcie->used_msi_lock); pcie 50 drivers/pci/controller/pcie-tango.c struct tango_pcie *pcie = d->chip_data; pcie 54 drivers/pci/controller/pcie-tango.c writel_relaxed(bit, pcie->base + SMP8759_STATUS + offset); pcie 60 drivers/pci/controller/pcie-tango.c struct tango_pcie *pcie = d->chip_data; pcie 65 drivers/pci/controller/pcie-tango.c spin_lock_irqsave(&pcie->used_msi_lock, flags); pcie 66 drivers/pci/controller/pcie-tango.c val = readl_relaxed(pcie->base + SMP8759_ENABLE + offset); pcie 68 drivers/pci/controller/pcie-tango.c writel_relaxed(val, pcie->base + SMP8759_ENABLE + offset); pcie 69 drivers/pci/controller/pcie-tango.c spin_unlock_irqrestore(&pcie->used_msi_lock, flags); pcie 90 drivers/pci/controller/pcie-tango.c struct tango_pcie *pcie = d->chip_data; pcie 91 drivers/pci/controller/pcie-tango.c msg->address_lo = lower_32_bits(pcie->msi_doorbell); pcie 92 drivers/pci/controller/pcie-tango.c msg->address_hi = upper_32_bits(pcie->msi_doorbell); pcie 138 drivers/pci/controller/pcie-tango.c struct tango_pcie *pcie = dom->host_data; pcie 142 drivers/pci/controller/pcie-tango.c spin_lock_irqsave(&pcie->used_msi_lock, flags); pcie 143 drivers/pci/controller/pcie-tango.c pos = find_first_zero_bit(pcie->used_msi, MSI_MAX); pcie 145 drivers/pci/controller/pcie-tango.c spin_unlock_irqrestore(&pcie->used_msi_lock, flags); pcie 148 drivers/pci/controller/pcie-tango.c __set_bit(pos, pcie->used_msi); pcie 149 drivers/pci/controller/pcie-tango.c spin_unlock_irqrestore(&pcie->used_msi_lock, flags); pcie 151 drivers/pci/controller/pcie-tango.c pcie, handle_edge_irq, NULL, NULL); pcie 161 drivers/pci/controller/pcie-tango.c struct tango_pcie *pcie = d->chip_data; pcie 163 drivers/pci/controller/pcie-tango.c spin_lock_irqsave(&pcie->used_msi_lock, flags); pcie 164 drivers/pci/controller/pcie-tango.c __clear_bit(d->hwirq, pcie->used_msi); pcie 165 drivers/pci/controller/pcie-tango.c spin_unlock_irqrestore(&pcie->used_msi_lock, flags); pcie 177 drivers/pci/controller/pcie-tango.c struct tango_pcie *pcie = dev_get_drvdata(cfg->parent); pcie 189 drivers/pci/controller/pcie-tango.c writel_relaxed(1, pcie->base + SMP8759_MUX); pcie 191 drivers/pci/controller/pcie-tango.c writel_relaxed(0, pcie->base + SMP8759_MUX); pcie 200 drivers/pci/controller/pcie-tango.c struct tango_pcie *pcie = dev_get_drvdata(cfg->parent); pcie 203 drivers/pci/controller/pcie-tango.c writel_relaxed(1, pcie->base + SMP8759_MUX); pcie 205 drivers/pci/controller/pcie-tango.c writel_relaxed(0, pcie->base + SMP8759_MUX); pcie 219 drivers/pci/controller/pcie-tango.c static int tango_pcie_link_up(struct tango_pcie *pcie) pcie 221 drivers/pci/controller/pcie-tango.c void __iomem *test_out = pcie->base + SMP8759_TEST_OUT; pcie 238 drivers/pci/controller/pcie-tango.c struct tango_pcie *pcie; pcie 249 drivers/pci/controller/pcie-tango.c pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); pcie 250 drivers/pci/controller/pcie-tango.c if (!pcie) pcie 254 drivers/pci/controller/pcie-tango.c pcie->base = devm_ioremap_resource(dev, res); pcie 255 drivers/pci/controller/pcie-tango.c if (IS_ERR(pcie->base)) pcie 256 drivers/pci/controller/pcie-tango.c return PTR_ERR(pcie->base); pcie 258 drivers/pci/controller/pcie-tango.c platform_set_drvdata(pdev, pcie); pcie 260 drivers/pci/controller/pcie-tango.c if (!tango_pcie_link_up(pcie)) pcie 270 drivers/pci/controller/pcie-tango.c pcie->msi_doorbell = range.pci_addr + res->start + SMP8759_DOORBELL; pcie 273 drivers/pci/controller/pcie-tango.c writel_relaxed(0, pcie->base + SMP8759_ENABLE + offset); pcie 281 drivers/pci/controller/pcie-tango.c irq_dom = irq_domain_create_linear(fwnode, MSI_MAX, &dom_ops, pcie); pcie 294 drivers/pci/controller/pcie-tango.c pcie->dom = irq_dom; pcie 295 drivers/pci/controller/pcie-tango.c spin_lock_init(&pcie->used_msi_lock); pcie 296 drivers/pci/controller/pcie-tango.c irq_set_chained_handler_and_data(virq, tango_msi_isr, pcie); pcie 175 drivers/pci/controller/pcie-xilinx-nwl.c static inline u32 nwl_bridge_readl(struct nwl_pcie *pcie, u32 off) pcie 177 drivers/pci/controller/pcie-xilinx-nwl.c return readl(pcie->breg_base + off); pcie 180 drivers/pci/controller/pcie-xilinx-nwl.c static inline void nwl_bridge_writel(struct nwl_pcie *pcie, u32 val, u32 off) pcie 182 drivers/pci/controller/pcie-xilinx-nwl.c writel(val, pcie->breg_base + off); pcie 185 drivers/pci/controller/pcie-xilinx-nwl.c static bool nwl_pcie_link_up(struct nwl_pcie *pcie) pcie 187 drivers/pci/controller/pcie-xilinx-nwl.c if (readl(pcie->pcireg_base + PS_LINKUP_OFFSET) & PCIE_PHY_LINKUP_BIT) pcie 192 drivers/pci/controller/pcie-xilinx-nwl.c static bool nwl_phy_link_up(struct nwl_pcie *pcie) pcie 194 drivers/pci/controller/pcie-xilinx-nwl.c if (readl(pcie->pcireg_base + PS_LINKUP_OFFSET) & PHY_RDY_LINKUP_BIT) pcie 199 drivers/pci/controller/pcie-xilinx-nwl.c static int nwl_wait_for_link(struct nwl_pcie *pcie) pcie 201 drivers/pci/controller/pcie-xilinx-nwl.c struct device *dev = pcie->dev; pcie 206 drivers/pci/controller/pcie-xilinx-nwl.c if (nwl_phy_link_up(pcie)) pcie 217 drivers/pci/controller/pcie-xilinx-nwl.c struct nwl_pcie *pcie = bus->sysdata; pcie 220 drivers/pci/controller/pcie-xilinx-nwl.c if (bus->number != pcie->root_busno) { pcie 221 drivers/pci/controller/pcie-xilinx-nwl.c if (!nwl_pcie_link_up(pcie)) pcie 226 drivers/pci/controller/pcie-xilinx-nwl.c if (bus->number == pcie->root_busno && devfn > 0) pcie 245 drivers/pci/controller/pcie-xilinx-nwl.c struct nwl_pcie *pcie = bus->sysdata; pcie 254 drivers/pci/controller/pcie-xilinx-nwl.c return pcie->ecam_base + relbus + where; pcie 266 drivers/pci/controller/pcie-xilinx-nwl.c struct nwl_pcie *pcie = data; pcie 267 drivers/pci/controller/pcie-xilinx-nwl.c struct device *dev = pcie->dev; pcie 271 drivers/pci/controller/pcie-xilinx-nwl.c misc_stat = nwl_bridge_readl(pcie, MSGF_MISC_STATUS) & pcie 316 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, misc_stat, MSGF_MISC_STATUS); pcie 324 drivers/pci/controller/pcie-xilinx-nwl.c struct nwl_pcie *pcie; pcie 330 drivers/pci/controller/pcie-xilinx-nwl.c pcie = irq_desc_get_handler_data(desc); pcie 332 drivers/pci/controller/pcie-xilinx-nwl.c while ((status = nwl_bridge_readl(pcie, MSGF_LEG_STATUS) & pcie 335 drivers/pci/controller/pcie-xilinx-nwl.c virq = irq_find_mapping(pcie->legacy_irq_domain, bit); pcie 344 drivers/pci/controller/pcie-xilinx-nwl.c static void nwl_pcie_handle_msi_irq(struct nwl_pcie *pcie, u32 status_reg) pcie 351 drivers/pci/controller/pcie-xilinx-nwl.c msi = &pcie->msi; pcie 353 drivers/pci/controller/pcie-xilinx-nwl.c while ((status = nwl_bridge_readl(pcie, status_reg)) != 0) { pcie 355 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, 1 << bit, status_reg); pcie 366 drivers/pci/controller/pcie-xilinx-nwl.c struct nwl_pcie *pcie = irq_desc_get_handler_data(desc); pcie 369 drivers/pci/controller/pcie-xilinx-nwl.c nwl_pcie_handle_msi_irq(pcie, MSGF_MSI_STATUS_HI); pcie 376 drivers/pci/controller/pcie-xilinx-nwl.c struct nwl_pcie *pcie = irq_desc_get_handler_data(desc); pcie 379 drivers/pci/controller/pcie-xilinx-nwl.c nwl_pcie_handle_msi_irq(pcie, MSGF_MSI_STATUS_LO); pcie 386 drivers/pci/controller/pcie-xilinx-nwl.c struct nwl_pcie *pcie; pcie 391 drivers/pci/controller/pcie-xilinx-nwl.c pcie = irq_desc_get_chip_data(desc); pcie 393 drivers/pci/controller/pcie-xilinx-nwl.c raw_spin_lock_irqsave(&pcie->leg_mask_lock, flags); pcie 394 drivers/pci/controller/pcie-xilinx-nwl.c val = nwl_bridge_readl(pcie, MSGF_LEG_MASK); pcie 395 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, (val & (~mask)), MSGF_LEG_MASK); pcie 396 drivers/pci/controller/pcie-xilinx-nwl.c raw_spin_unlock_irqrestore(&pcie->leg_mask_lock, flags); pcie 402 drivers/pci/controller/pcie-xilinx-nwl.c struct nwl_pcie *pcie; pcie 407 drivers/pci/controller/pcie-xilinx-nwl.c pcie = irq_desc_get_chip_data(desc); pcie 409 drivers/pci/controller/pcie-xilinx-nwl.c raw_spin_lock_irqsave(&pcie->leg_mask_lock, flags); pcie 410 drivers/pci/controller/pcie-xilinx-nwl.c val = nwl_bridge_readl(pcie, MSGF_LEG_MASK); pcie 411 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, (val | mask), MSGF_LEG_MASK); pcie 412 drivers/pci/controller/pcie-xilinx-nwl.c raw_spin_unlock_irqrestore(&pcie->leg_mask_lock, flags); pcie 456 drivers/pci/controller/pcie-xilinx-nwl.c struct nwl_pcie *pcie = irq_data_get_irq_chip_data(data); pcie 457 drivers/pci/controller/pcie-xilinx-nwl.c phys_addr_t msi_addr = pcie->phys_pcie_reg_base; pcie 479 drivers/pci/controller/pcie-xilinx-nwl.c struct nwl_pcie *pcie = domain->host_data; pcie 480 drivers/pci/controller/pcie-xilinx-nwl.c struct nwl_msi *msi = &pcie->msi; pcie 505 drivers/pci/controller/pcie-xilinx-nwl.c struct nwl_pcie *pcie = irq_data_get_irq_chip_data(data); pcie 506 drivers/pci/controller/pcie-xilinx-nwl.c struct nwl_msi *msi = &pcie->msi; pcie 519 drivers/pci/controller/pcie-xilinx-nwl.c static int nwl_pcie_init_msi_irq_domain(struct nwl_pcie *pcie) pcie 522 drivers/pci/controller/pcie-xilinx-nwl.c struct device *dev = pcie->dev; pcie 524 drivers/pci/controller/pcie-xilinx-nwl.c struct nwl_msi *msi = &pcie->msi; pcie 527 drivers/pci/controller/pcie-xilinx-nwl.c &dev_msi_domain_ops, pcie); pcie 544 drivers/pci/controller/pcie-xilinx-nwl.c static int nwl_pcie_init_irq_domain(struct nwl_pcie *pcie) pcie 546 drivers/pci/controller/pcie-xilinx-nwl.c struct device *dev = pcie->dev; pcie 556 drivers/pci/controller/pcie-xilinx-nwl.c pcie->legacy_irq_domain = irq_domain_add_linear(legacy_intc_node, pcie 559 drivers/pci/controller/pcie-xilinx-nwl.c pcie); pcie 561 drivers/pci/controller/pcie-xilinx-nwl.c if (!pcie->legacy_irq_domain) { pcie 566 drivers/pci/controller/pcie-xilinx-nwl.c raw_spin_lock_init(&pcie->leg_mask_lock); pcie 567 drivers/pci/controller/pcie-xilinx-nwl.c nwl_pcie_init_msi_irq_domain(pcie); pcie 571 drivers/pci/controller/pcie-xilinx-nwl.c static int nwl_pcie_enable_msi(struct nwl_pcie *pcie) pcie 573 drivers/pci/controller/pcie-xilinx-nwl.c struct device *dev = pcie->dev; pcie 575 drivers/pci/controller/pcie-xilinx-nwl.c struct nwl_msi *msi = &pcie->msi; pcie 595 drivers/pci/controller/pcie-xilinx-nwl.c nwl_pcie_msi_handler_high, pcie); pcie 606 drivers/pci/controller/pcie-xilinx-nwl.c nwl_pcie_msi_handler_low, pcie); pcie 609 drivers/pci/controller/pcie-xilinx-nwl.c ret = nwl_bridge_readl(pcie, I_MSII_CAPABILITIES) & MSII_PRESENT; pcie 617 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, I_MSII_CONTROL) | pcie 621 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, I_MSII_CONTROL) | pcie 625 drivers/pci/controller/pcie-xilinx-nwl.c base = pcie->phys_pcie_reg_base; pcie 626 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, lower_32_bits(base), I_MSII_BASE_LO); pcie 627 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, upper_32_bits(base), I_MSII_BASE_HI); pcie 633 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, 0, MSGF_MSI_MASK_HI); pcie 635 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, MSGF_MSI_STATUS_HI) & pcie 638 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, MSGF_MSI_SR_HI_MASK, MSGF_MSI_MASK_HI); pcie 644 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, 0, MSGF_MSI_MASK_LO); pcie 646 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, MSGF_MSI_STATUS_LO) & pcie 649 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, MSGF_MSI_SR_LO_MASK, MSGF_MSI_MASK_LO); pcie 658 drivers/pci/controller/pcie-xilinx-nwl.c static int nwl_pcie_bridge_init(struct nwl_pcie *pcie) pcie 660 drivers/pci/controller/pcie-xilinx-nwl.c struct device *dev = pcie->dev; pcie 665 drivers/pci/controller/pcie-xilinx-nwl.c breg_val = nwl_bridge_readl(pcie, E_BREG_CAPABILITIES) & BREG_PRESENT; pcie 672 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, lower_32_bits(pcie->phys_breg_base), pcie 674 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, upper_32_bits(pcie->phys_breg_base), pcie 678 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, ~BREG_ENABLE_FORCE & BREG_ENABLE, pcie 682 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, BRCFG_PCIE_RX0) | pcie 686 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, SET_ISUB_CONTROL, I_ISUB_CONTROL); pcie 689 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, CFG_ENABLE_MSG_FILTER_MASK, pcie 692 drivers/pci/controller/pcie-xilinx-nwl.c err = nwl_wait_for_link(pcie); pcie 696 drivers/pci/controller/pcie-xilinx-nwl.c ecam_val = nwl_bridge_readl(pcie, E_ECAM_CAPABILITIES) & E_ECAM_PRESENT; pcie 703 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, E_ECAM_CONTROL) | pcie 706 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, E_ECAM_CONTROL) | pcie 707 drivers/pci/controller/pcie-xilinx-nwl.c (pcie->ecam_value << E_ECAM_SIZE_SHIFT), pcie 710 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, lower_32_bits(pcie->phys_ecam_base), pcie 712 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, upper_32_bits(pcie->phys_ecam_base), pcie 716 drivers/pci/controller/pcie-xilinx-nwl.c ecam_val = nwl_bridge_readl(pcie, E_ECAM_CONTROL); pcie 717 drivers/pci/controller/pcie-xilinx-nwl.c pcie->last_busno = (ecam_val & E_ECAM_SIZE_LOC) >> E_ECAM_SIZE_SHIFT; pcie 721 drivers/pci/controller/pcie-xilinx-nwl.c ecam_val |= (pcie->last_busno << E_ECAM_SIZE_SHIFT); pcie 722 drivers/pci/controller/pcie-xilinx-nwl.c writel(ecam_val, (pcie->ecam_base + PCI_PRIMARY_BUS)); pcie 724 drivers/pci/controller/pcie-xilinx-nwl.c if (nwl_pcie_link_up(pcie)) pcie 730 drivers/pci/controller/pcie-xilinx-nwl.c pcie->irq_misc = platform_get_irq_byname(pdev, "misc"); pcie 731 drivers/pci/controller/pcie-xilinx-nwl.c if (pcie->irq_misc < 0) { pcie 733 drivers/pci/controller/pcie-xilinx-nwl.c pcie->irq_misc); pcie 737 drivers/pci/controller/pcie-xilinx-nwl.c err = devm_request_irq(dev, pcie->irq_misc, pcie 739 drivers/pci/controller/pcie-xilinx-nwl.c "nwl_pcie:misc", pcie); pcie 742 drivers/pci/controller/pcie-xilinx-nwl.c pcie->irq_misc); pcie 747 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, (u32)~MSGF_MISC_SR_MASKALL, MSGF_MISC_MASK); pcie 750 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, MSGF_MISC_STATUS) & pcie 754 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, MSGF_MISC_SR_MASKALL, MSGF_MISC_MASK); pcie 758 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, (u32)~MSGF_LEG_SR_MASKALL, MSGF_LEG_MASK); pcie 761 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, MSGF_LEG_STATUS) & pcie 765 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, MSGF_LEG_SR_MASKALL, MSGF_LEG_MASK); pcie 768 drivers/pci/controller/pcie-xilinx-nwl.c nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, BRCFG_INTERRUPT) | pcie 774 drivers/pci/controller/pcie-xilinx-nwl.c static int nwl_pcie_parse_dt(struct nwl_pcie *pcie, pcie 777 drivers/pci/controller/pcie-xilinx-nwl.c struct device *dev = pcie->dev; pcie 781 drivers/pci/controller/pcie-xilinx-nwl.c pcie->breg_base = devm_ioremap_resource(dev, res); pcie 782 drivers/pci/controller/pcie-xilinx-nwl.c if (IS_ERR(pcie->breg_base)) pcie 783 drivers/pci/controller/pcie-xilinx-nwl.c return PTR_ERR(pcie->breg_base); pcie 784 drivers/pci/controller/pcie-xilinx-nwl.c pcie->phys_breg_base = res->start; pcie 787 drivers/pci/controller/pcie-xilinx-nwl.c pcie->pcireg_base = devm_ioremap_resource(dev, res); pcie 788 drivers/pci/controller/pcie-xilinx-nwl.c if (IS_ERR(pcie->pcireg_base)) pcie 789 drivers/pci/controller/pcie-xilinx-nwl.c return PTR_ERR(pcie->pcireg_base); pcie 790 drivers/pci/controller/pcie-xilinx-nwl.c pcie->phys_pcie_reg_base = res->start; pcie 793 drivers/pci/controller/pcie-xilinx-nwl.c pcie->ecam_base = devm_pci_remap_cfg_resource(dev, res); pcie 794 drivers/pci/controller/pcie-xilinx-nwl.c if (IS_ERR(pcie->ecam_base)) pcie 795 drivers/pci/controller/pcie-xilinx-nwl.c return PTR_ERR(pcie->ecam_base); pcie 796 drivers/pci/controller/pcie-xilinx-nwl.c pcie->phys_ecam_base = res->start; pcie 799 drivers/pci/controller/pcie-xilinx-nwl.c pcie->irq_intx = platform_get_irq_byname(pdev, "intx"); pcie 800 drivers/pci/controller/pcie-xilinx-nwl.c if (pcie->irq_intx < 0) { pcie 801 drivers/pci/controller/pcie-xilinx-nwl.c dev_err(dev, "failed to get intx IRQ %d\n", pcie->irq_intx); pcie 802 drivers/pci/controller/pcie-xilinx-nwl.c return pcie->irq_intx; pcie 805 drivers/pci/controller/pcie-xilinx-nwl.c irq_set_chained_handler_and_data(pcie->irq_intx, pcie 806 drivers/pci/controller/pcie-xilinx-nwl.c nwl_pcie_leg_handler, pcie); pcie 819 drivers/pci/controller/pcie-xilinx-nwl.c struct nwl_pcie *pcie; pcie 827 drivers/pci/controller/pcie-xilinx-nwl.c bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); pcie 831 drivers/pci/controller/pcie-xilinx-nwl.c pcie = pci_host_bridge_priv(bridge); pcie 833 drivers/pci/controller/pcie-xilinx-nwl.c pcie->dev = dev; pcie 834 drivers/pci/controller/pcie-xilinx-nwl.c pcie->ecam_value = NWL_ECAM_VALUE_DEFAULT; pcie 836 drivers/pci/controller/pcie-xilinx-nwl.c err = nwl_pcie_parse_dt(pcie, pdev); pcie 842 drivers/pci/controller/pcie-xilinx-nwl.c err = nwl_pcie_bridge_init(pcie); pcie 859 drivers/pci/controller/pcie-xilinx-nwl.c err = nwl_pcie_init_irq_domain(pcie); pcie 867 drivers/pci/controller/pcie-xilinx-nwl.c bridge->sysdata = pcie; pcie 868 drivers/pci/controller/pcie-xilinx-nwl.c bridge->busnr = pcie->root_busno; pcie 874 drivers/pci/controller/pcie-xilinx-nwl.c err = nwl_pcie_enable_msi(pcie); pcie 36 drivers/pci/hotplug/pciehp.h pci_dbg(ctrl->pcie->port, format, ## arg) pcie 38 drivers/pci/hotplug/pciehp.h pci_err(ctrl->pcie->port, format, ## arg) pcie 40 drivers/pci/hotplug/pciehp.h pci_info(ctrl->pcie->port, format, ## arg) pcie 42 drivers/pci/hotplug/pciehp.h pci_warn(ctrl->pcie->port, format, ## arg) pcie 84 drivers/pci/hotplug/pciehp.h struct pcie_device *pcie; pcie 71 drivers/pci/hotplug/pciehp_core.c } else if (ctrl->pcie->port->hotplug_user_indicators) { pcie 81 drivers/pci/hotplug/pciehp_core.c ctrl->pcie->port->subordinate, 0, name); pcie 103 drivers/pci/hotplug/pciehp_core.c struct pci_dev *pdev = ctrl->pcie->port; pcie 119 drivers/pci/hotplug/pciehp_core.c struct pci_dev *pdev = ctrl->pcie->port; pcie 130 drivers/pci/hotplug/pciehp_core.c struct pci_dev *pdev = ctrl->pcie->port; pcie 141 drivers/pci/hotplug/pciehp_core.c struct pci_dev *pdev = ctrl->pcie->port; pcie 62 drivers/pci/hotplug/pciehp_ctrl.c struct pci_bus *parent = ctrl->pcie->port->subordinate; pcie 141 drivers/pci/hotplug/pciehp_ctrl.c irq_wake_thread(ctrl->pcie->irq, ctrl); pcie 315 drivers/pci/hotplug/pciehp_ctrl.c pm_runtime_get_sync(&ctrl->pcie->port->dev); pcie 321 drivers/pci/hotplug/pciehp_ctrl.c pm_runtime_put(&ctrl->pcie->port->dev); pcie 351 drivers/pci/hotplug/pciehp_ctrl.c pm_runtime_get_sync(&ctrl->pcie->port->dev); pcie 353 drivers/pci/hotplug/pciehp_ctrl.c pm_runtime_put(&ctrl->pcie->port->dev); pcie 31 drivers/pci/hotplug/pciehp_hpc.c return ctrl->pcie->port; pcie 40 drivers/pci/hotplug/pciehp_hpc.c int retval, irq = ctrl->pcie->irq; pcie 63 drivers/pci/hotplug/pciehp_hpc.c free_irq(ctrl->pcie->irq, ctrl); pcie 266 drivers/pci/hotplug/pciehp_hpc.c found = pci_bus_check_dev(ctrl->pcie->port->subordinate, pcie 283 drivers/pci/hotplug/pciehp_hpc.c pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status); pcie 337 drivers/pci/hotplug/pciehp_hpc.c pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); pcie 364 drivers/pci/hotplug/pciehp_hpc.c pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); pcie 490 drivers/pci/hotplug/pciehp_hpc.c pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd); pcie 509 drivers/pci/hotplug/pciehp_hpc.c pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, pcie 523 drivers/pci/hotplug/pciehp_hpc.c pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, pcie 731 drivers/pci/hotplug/pciehp_hpc.c pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd); pcie 744 drivers/pci/hotplug/pciehp_hpc.c pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0); pcie 805 drivers/pci/hotplug/pciehp_hpc.c pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0); pcie 807 drivers/pci/hotplug/pciehp_hpc.c rc = pci_bridge_secondary_bus_reset(ctrl->pcie->port); pcie 812 drivers/pci/hotplug/pciehp_hpc.c pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, ctrl_mask); pcie 838 drivers/pci/hotplug/pciehp_hpc.c struct pci_dev *pdev = ctrl->pcie->port; pcie 862 drivers/pci/hotplug/pciehp_hpc.c ctrl->pcie = dev; pcie 35 drivers/pci/hotplug/pciehp_pci.c struct pci_dev *bridge = ctrl->pcie->port; pcie 87 drivers/pci/hotplug/pciehp_pci.c struct pci_bus *parent = ctrl->pcie->port->subordinate; pcie 273 drivers/pci/pcie/portdrv_core.c struct pcie_device *pcie; pcie 276 drivers/pci/pcie/portdrv_core.c pcie = kzalloc(sizeof(*pcie), GFP_KERNEL); pcie 277 drivers/pci/pcie/portdrv_core.c if (!pcie) pcie 279 drivers/pci/pcie/portdrv_core.c pcie->port = pdev; pcie 280 drivers/pci/pcie/portdrv_core.c pcie->irq = irq; pcie 281 drivers/pci/pcie/portdrv_core.c pcie->service = service; pcie 284 drivers/pci/pcie/portdrv_core.c device = &pcie->device; pcie 302 drivers/phy/tegra/xusb-tegra124.c if (lane->pad == padctl->pcie) pcie 1024 drivers/phy/tegra/xusb-tegra124.c TEGRA124_LANE("pcie-0", 0x134, 16, 0x3, pcie), pcie 1025 drivers/phy/tegra/xusb-tegra124.c TEGRA124_LANE("pcie-1", 0x134, 18, 0x3, pcie), pcie 1026 drivers/phy/tegra/xusb-tegra124.c TEGRA124_LANE("pcie-2", 0x134, 20, 0x3, pcie), pcie 1027 drivers/phy/tegra/xusb-tegra124.c TEGRA124_LANE("pcie-3", 0x134, 22, 0x3, pcie), pcie 1028 drivers/phy/tegra/xusb-tegra124.c TEGRA124_LANE("pcie-4", 0x134, 24, 0x3, pcie), pcie 1035 drivers/phy/tegra/xusb-tegra124.c struct tegra_xusb_pcie_lane *pcie; pcie 1038 drivers/phy/tegra/xusb-tegra124.c pcie = kzalloc(sizeof(*pcie), GFP_KERNEL); pcie 1039 drivers/phy/tegra/xusb-tegra124.c if (!pcie) pcie 1042 drivers/phy/tegra/xusb-tegra124.c INIT_LIST_HEAD(&pcie->base.list); pcie 1043 drivers/phy/tegra/xusb-tegra124.c pcie->base.soc = &pad->soc->lanes[index]; pcie 1044 drivers/phy/tegra/xusb-tegra124.c pcie->base.index = index; pcie 1045 drivers/phy/tegra/xusb-tegra124.c pcie->base.pad = pad; pcie 1046 drivers/phy/tegra/xusb-tegra124.c pcie->base.np = np; pcie 1048 drivers/phy/tegra/xusb-tegra124.c err = tegra_xusb_lane_parse_dt(&pcie->base, np); pcie 1050 drivers/phy/tegra/xusb-tegra124.c kfree(pcie); pcie 1054 drivers/phy/tegra/xusb-tegra124.c return &pcie->base; pcie 1059 drivers/phy/tegra/xusb-tegra124.c struct tegra_xusb_pcie_lane *pcie = to_pcie_lane(lane); pcie 1061 drivers/phy/tegra/xusb-tegra124.c kfree(pcie); pcie 1154 drivers/phy/tegra/xusb-tegra124.c struct tegra_xusb_pcie_pad *pcie; pcie 1158 drivers/phy/tegra/xusb-tegra124.c pcie = kzalloc(sizeof(*pcie), GFP_KERNEL); pcie 1159 drivers/phy/tegra/xusb-tegra124.c if (!pcie) pcie 1162 drivers/phy/tegra/xusb-tegra124.c pad = &pcie->base; pcie 1168 drivers/phy/tegra/xusb-tegra124.c kfree(pcie); pcie 1188 drivers/phy/tegra/xusb-tegra124.c struct tegra_xusb_pcie_pad *pcie = to_pcie_pad(pad); pcie 1190 drivers/phy/tegra/xusb-tegra124.c kfree(pcie); pcie 1206 drivers/phy/tegra/xusb-tegra124.c TEGRA124_LANE("sata-0", 0x134, 26, 0x3, pcie), pcie 1538 drivers/phy/tegra/xusb-tegra124.c if (lane->pad == padctl->pcie) pcie 1550 drivers/phy/tegra/xusb-tegra124.c if (lane->pad == padctl->pcie) pcie 246 drivers/phy/tegra/xusb-tegra210.c struct tegra_xusb_pcie_pad *pcie = to_pcie_pad(padctl->pcie); pcie 251 drivers/phy/tegra/xusb-tegra210.c if (pcie->enable > 0) { pcie 252 drivers/phy/tegra/xusb-tegra210.c pcie->enable++; pcie 256 drivers/phy/tegra/xusb-tegra210.c err = clk_prepare_enable(pcie->pll); pcie 260 drivers/phy/tegra/xusb-tegra210.c err = reset_control_deassert(pcie->rst); pcie 442 drivers/phy/tegra/xusb-tegra210.c pcie->enable++; pcie 447 drivers/phy/tegra/xusb-tegra210.c reset_control_assert(pcie->rst); pcie 449 drivers/phy/tegra/xusb-tegra210.c clk_disable_unprepare(pcie->pll); pcie 455 drivers/phy/tegra/xusb-tegra210.c struct tegra_xusb_pcie_pad *pcie = to_pcie_pad(padctl->pcie); pcie 459 drivers/phy/tegra/xusb-tegra210.c if (WARN_ON(pcie->enable == 0)) pcie 462 drivers/phy/tegra/xusb-tegra210.c if (--pcie->enable > 0) pcie 465 drivers/phy/tegra/xusb-tegra210.c reset_control_assert(pcie->rst); pcie 466 drivers/phy/tegra/xusb-tegra210.c clk_disable_unprepare(pcie->pll); pcie 815 drivers/phy/tegra/xusb-tegra210.c if (lane->pad == padctl->pcie) pcie 1414 drivers/phy/tegra/xusb-tegra210.c TEGRA210_LANE("pcie-0", 0x028, 12, 0x3, pcie), pcie 1415 drivers/phy/tegra/xusb-tegra210.c TEGRA210_LANE("pcie-1", 0x028, 14, 0x3, pcie), pcie 1416 drivers/phy/tegra/xusb-tegra210.c TEGRA210_LANE("pcie-2", 0x028, 16, 0x3, pcie), pcie 1417 drivers/phy/tegra/xusb-tegra210.c TEGRA210_LANE("pcie-3", 0x028, 18, 0x3, pcie), pcie 1418 drivers/phy/tegra/xusb-tegra210.c TEGRA210_LANE("pcie-4", 0x028, 20, 0x3, pcie), pcie 1419 drivers/phy/tegra/xusb-tegra210.c TEGRA210_LANE("pcie-5", 0x028, 22, 0x3, pcie), pcie 1420 drivers/phy/tegra/xusb-tegra210.c TEGRA210_LANE("pcie-6", 0x028, 24, 0x3, pcie), pcie 1427 drivers/phy/tegra/xusb-tegra210.c struct tegra_xusb_pcie_lane *pcie; pcie 1430 drivers/phy/tegra/xusb-tegra210.c pcie = kzalloc(sizeof(*pcie), GFP_KERNEL); pcie 1431 drivers/phy/tegra/xusb-tegra210.c if (!pcie) pcie 1434 drivers/phy/tegra/xusb-tegra210.c INIT_LIST_HEAD(&pcie->base.list); pcie 1435 drivers/phy/tegra/xusb-tegra210.c pcie->base.soc = &pad->soc->lanes[index]; pcie 1436 drivers/phy/tegra/xusb-tegra210.c pcie->base.index = index; pcie 1437 drivers/phy/tegra/xusb-tegra210.c pcie->base.pad = pad; pcie 1438 drivers/phy/tegra/xusb-tegra210.c pcie->base.np = np; pcie 1440 drivers/phy/tegra/xusb-tegra210.c err = tegra_xusb_lane_parse_dt(&pcie->base, np); pcie 1442 drivers/phy/tegra/xusb-tegra210.c kfree(pcie); pcie 1446 drivers/phy/tegra/xusb-tegra210.c return &pcie->base; pcie 1451 drivers/phy/tegra/xusb-tegra210.c struct tegra_xusb_pcie_lane *pcie = to_pcie_lane(lane); pcie 1453 drivers/phy/tegra/xusb-tegra210.c kfree(pcie); pcie 1525 drivers/phy/tegra/xusb-tegra210.c struct tegra_xusb_pcie_pad *pcie; pcie 1529 drivers/phy/tegra/xusb-tegra210.c pcie = kzalloc(sizeof(*pcie), GFP_KERNEL); pcie 1530 drivers/phy/tegra/xusb-tegra210.c if (!pcie) pcie 1533 drivers/phy/tegra/xusb-tegra210.c pad = &pcie->base; pcie 1539 drivers/phy/tegra/xusb-tegra210.c kfree(pcie); pcie 1543 drivers/phy/tegra/xusb-tegra210.c pcie->pll = devm_clk_get(&pad->dev, "pll"); pcie 1544 drivers/phy/tegra/xusb-tegra210.c if (IS_ERR(pcie->pll)) { pcie 1545 drivers/phy/tegra/xusb-tegra210.c err = PTR_ERR(pcie->pll); pcie 1550 drivers/phy/tegra/xusb-tegra210.c pcie->rst = devm_reset_control_get(&pad->dev, "phy"); pcie 1551 drivers/phy/tegra/xusb-tegra210.c if (IS_ERR(pcie->rst)) { pcie 1552 drivers/phy/tegra/xusb-tegra210.c err = PTR_ERR(pcie->rst); pcie 1573 drivers/phy/tegra/xusb-tegra210.c struct tegra_xusb_pcie_pad *pcie = to_pcie_pad(pad); pcie 1575 drivers/phy/tegra/xusb-tegra210.c kfree(pcie); pcie 1591 drivers/phy/tegra/xusb-tegra210.c TEGRA210_LANE("sata-0", 0x028, 30, 0x3, pcie), pcie 274 drivers/phy/tegra/xusb.c padctl->pcie = pad; pcie 402 drivers/phy/tegra/xusb.h struct tegra_xusb_pad *pcie; pcie 494 drivers/pinctrl/bcm/pinctrl-ns2-mux.c NS2_PIN_FUNCTION(pcie), pcie 511 drivers/pinctrl/qcom/pinctrl-ipq4019.c FUNCTION(pcie), pcie 600 drivers/pinctrl/qcom/pinctrl-ipq4019.c PINGROUP(39, rmii, pcie, led3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, pcie 626 drivers/pinctrl/qcom/pinctrl-ipq4019.c PINGROUP(52, qpic, mdc, pcie, i2s_tx, NA, NA, NA, tm, wifi0, wifi1, NA, pcie 792 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c TEGRA124_FUNCTION(pcie), pcie 1926 drivers/pinctrl/tegra/pinctrl-tegra20.c FUNCTION(pcie), pcie 2057 drivers/pinctrl/tegra/pinctrl-tegra30.c FUNCTION(pcie), pcie 907 drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c UNIPHIER_PINCTRL_GROUP(pcie), pcie 974 drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c UNIPHIER_PINMUX_FUNCTION(pcie), pcie 279 drivers/scsi/csiostor/csio_mb.c ldst_cmd->u.pcie.select_naccess = FW_LDST_CMD_NACCESS_V(1); pcie 280 drivers/scsi/csiostor/csio_mb.c ldst_cmd->u.pcie.ctrl_to_fn = pcie 282 drivers/scsi/csiostor/csio_mb.c ldst_cmd->u.pcie.r = (uint8_t)reg; pcie 110 drivers/staging/mt7621-pci/pci-mt7621.c struct mt7621_pcie *pcie; pcie 147 drivers/staging/mt7621-pci/pci-mt7621.c static inline u32 pcie_read(struct mt7621_pcie *pcie, u32 reg) pcie 149 drivers/staging/mt7621-pci/pci-mt7621.c return readl(pcie->base + reg); pcie 152 drivers/staging/mt7621-pci/pci-mt7621.c static inline void pcie_write(struct mt7621_pcie *pcie, u32 val, u32 reg) pcie 154 drivers/staging/mt7621-pci/pci-mt7621.c writel(val, pcie->base + reg); pcie 178 drivers/staging/mt7621-pci/pci-mt7621.c struct mt7621_pcie *pcie = bus->sysdata; pcie 182 drivers/staging/mt7621-pci/pci-mt7621.c writel(address, pcie->base + RALINK_PCI_CONFIG_ADDR); pcie 184 drivers/staging/mt7621-pci/pci-mt7621.c return pcie->base + RALINK_PCI_CONFIG_DATA + (where & 3); pcie 193 drivers/staging/mt7621-pci/pci-mt7621.c static u32 read_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg) pcie 197 drivers/staging/mt7621-pci/pci-mt7621.c pcie_write(pcie, address, RALINK_PCI_CONFIG_ADDR); pcie 198 drivers/staging/mt7621-pci/pci-mt7621.c return pcie_read(pcie, RALINK_PCI_CONFIG_DATA); pcie 201 drivers/staging/mt7621-pci/pci-mt7621.c static void write_config(struct mt7621_pcie *pcie, unsigned int dev, pcie 206 drivers/staging/mt7621-pci/pci-mt7621.c pcie_write(pcie, address, RALINK_PCI_CONFIG_ADDR); pcie 207 drivers/staging/mt7621-pci/pci-mt7621.c pcie_write(pcie, val, RALINK_PCI_CONFIG_DATA); pcie 210 drivers/staging/mt7621-pci/pci-mt7621.c static inline void mt7621_perst_gpio_pcie_assert(struct mt7621_pcie *pcie) pcie 212 drivers/staging/mt7621-pci/pci-mt7621.c gpiod_set_value(pcie->perst, 0); pcie 216 drivers/staging/mt7621-pci/pci-mt7621.c static inline void mt7621_perst_gpio_pcie_deassert(struct mt7621_pcie *pcie) pcie 218 drivers/staging/mt7621-pci/pci-mt7621.c gpiod_set_value(pcie->perst, 1); pcie 234 drivers/staging/mt7621-pci/pci-mt7621.c struct mt7621_pcie *pcie = port->pcie; pcie 236 drivers/staging/mt7621-pci/pci-mt7621.c if (pcie->resets_inverted) pcie 244 drivers/staging/mt7621-pci/pci-mt7621.c struct mt7621_pcie *pcie = port->pcie; pcie 246 drivers/staging/mt7621-pci/pci-mt7621.c if (pcie->resets_inverted) pcie 259 drivers/staging/mt7621-pci/pci-mt7621.c static void setup_cm_memory_region(struct mt7621_pcie *pcie) pcie 261 drivers/staging/mt7621-pci/pci-mt7621.c struct resource *mem_resource = &pcie->mem; pcie 262 drivers/staging/mt7621-pci/pci-mt7621.c struct device *dev = pcie->dev; pcie 281 drivers/staging/mt7621-pci/pci-mt7621.c static int mt7621_pci_parse_request_of_pci_ranges(struct mt7621_pcie *pcie) pcie 283 drivers/staging/mt7621-pci/pci-mt7621.c struct device *dev = pcie->dev; pcie 300 drivers/staging/mt7621-pci/pci-mt7621.c res = &pcie->io; pcie 301 drivers/staging/mt7621-pci/pci-mt7621.c pcie->offset.io = 0x00000000UL; pcie 304 drivers/staging/mt7621-pci/pci-mt7621.c res = &pcie->mem; pcie 305 drivers/staging/mt7621-pci/pci-mt7621.c pcie->offset.mem = 0x00000000UL; pcie 313 drivers/staging/mt7621-pci/pci-mt7621.c err = of_pci_parse_bus_range(node, &pcie->busn); pcie 316 drivers/staging/mt7621-pci/pci-mt7621.c pcie->busn.name = node->name; pcie 317 drivers/staging/mt7621-pci/pci-mt7621.c pcie->busn.start = 0; pcie 318 drivers/staging/mt7621-pci/pci-mt7621.c pcie->busn.end = 0xff; pcie 319 drivers/staging/mt7621-pci/pci-mt7621.c pcie->busn.flags = IORESOURCE_BUS; pcie 325 drivers/staging/mt7621-pci/pci-mt7621.c static int mt7621_pcie_parse_port(struct mt7621_pcie *pcie, pcie 330 drivers/staging/mt7621-pci/pci-mt7621.c struct device *dev = pcie->dev; pcie 363 drivers/staging/mt7621-pci/pci-mt7621.c port->pcie = pcie; pcie 366 drivers/staging/mt7621-pci/pci-mt7621.c list_add_tail(&port->list, &pcie->ports); pcie 371 drivers/staging/mt7621-pci/pci-mt7621.c static int mt7621_pcie_parse_dt(struct mt7621_pcie *pcie) pcie 373 drivers/staging/mt7621-pci/pci-mt7621.c struct device *dev = pcie->dev; pcie 378 drivers/staging/mt7621-pci/pci-mt7621.c pcie->perst = devm_gpiod_get(dev, "perst", GPIOD_OUT_HIGH); pcie 379 drivers/staging/mt7621-pci/pci-mt7621.c if (IS_ERR(pcie->perst)) { pcie 381 drivers/staging/mt7621-pci/pci-mt7621.c return PTR_ERR(pcie->perst); pcie 390 drivers/staging/mt7621-pci/pci-mt7621.c pcie->base = devm_ioremap_resource(dev, ®s); pcie 391 drivers/staging/mt7621-pci/pci-mt7621.c if (IS_ERR(pcie->base)) pcie 392 drivers/staging/mt7621-pci/pci-mt7621.c return PTR_ERR(pcie->base); pcie 394 drivers/staging/mt7621-pci/pci-mt7621.c pcie->rst = devm_reset_control_get_exclusive(dev, "pcie"); pcie 395 drivers/staging/mt7621-pci/pci-mt7621.c if (PTR_ERR(pcie->rst) == -EPROBE_DEFER) { pcie 397 drivers/staging/mt7621-pci/pci-mt7621.c return PTR_ERR(pcie->rst); pcie 412 drivers/staging/mt7621-pci/pci-mt7621.c err = mt7621_pcie_parse_port(pcie, child, slot); pcie 424 drivers/staging/mt7621-pci/pci-mt7621.c struct mt7621_pcie *pcie = port->pcie; pcie 425 drivers/staging/mt7621-pci/pci-mt7621.c struct device *dev = pcie->dev; pcie 453 drivers/staging/mt7621-pci/pci-mt7621.c static void mt7621_pcie_init_ports(struct mt7621_pcie *pcie) pcie 455 drivers/staging/mt7621-pci/pci-mt7621.c struct device *dev = pcie->dev; pcie 462 drivers/staging/mt7621-pci/pci-mt7621.c mt7621_perst_gpio_pcie_assert(pcie); pcie 464 drivers/staging/mt7621-pci/pci-mt7621.c list_for_each_entry_safe(port, tmp, &pcie->ports, list) { pcie 472 drivers/staging/mt7621-pci/pci-mt7621.c val = read_config(pcie, slot, PCIE_FTS_NUM); pcie 478 drivers/staging/mt7621-pci/pci-mt7621.c reset_control_assert(pcie->rst); pcie 480 drivers/staging/mt7621-pci/pci-mt7621.c mt7621_perst_gpio_pcie_deassert(pcie); pcie 482 drivers/staging/mt7621-pci/pci-mt7621.c list_for_each_entry(port, &pcie->ports, list) { pcie 500 drivers/staging/mt7621-pci/pci-mt7621.c reset_control_deassert(pcie->rst); pcie 505 drivers/staging/mt7621-pci/pci-mt7621.c struct mt7621_pcie *pcie = port->pcie; pcie 511 drivers/staging/mt7621-pci/pci-mt7621.c val = pcie_read(pcie, RALINK_PCI_PCIMSK_ADDR); pcie 513 drivers/staging/mt7621-pci/pci-mt7621.c pcie_write(pcie, val, RALINK_PCI_PCIMSK_ADDR); pcie 516 drivers/staging/mt7621-pci/pci-mt7621.c pcie_write(pcie, PCIE_BAR_MAP_MAX | PCIE_BAR_ENABLE, pcie 518 drivers/staging/mt7621-pci/pci-mt7621.c pcie_write(pcie, MEMORY_BASE, pcie 522 drivers/staging/mt7621-pci/pci-mt7621.c pcie_write(pcie, PCIE_CLASS_CODE | PCIE_REVISION_ID, pcie 526 drivers/staging/mt7621-pci/pci-mt7621.c static void mt7621_pcie_enable_ports(struct mt7621_pcie *pcie) pcie 528 drivers/staging/mt7621-pci/pci-mt7621.c struct device *dev = pcie->dev; pcie 534 drivers/staging/mt7621-pci/pci-mt7621.c list_for_each_entry(port, &pcie->ports, list) { pcie 543 drivers/staging/mt7621-pci/pci-mt7621.c val = read_config(pcie, slot, PCI_COMMAND); pcie 545 drivers/staging/mt7621-pci/pci-mt7621.c write_config(pcie, slot, PCI_COMMAND, val); pcie 547 drivers/staging/mt7621-pci/pci-mt7621.c val = read_config(pcie, slot, PCIE_FTS_NUM); pcie 550 drivers/staging/mt7621-pci/pci-mt7621.c write_config(pcie, slot, PCIE_FTS_NUM, val); pcie 554 drivers/staging/mt7621-pci/pci-mt7621.c static int mt7621_pcie_init_virtual_bridges(struct mt7621_pcie *pcie) pcie 560 drivers/staging/mt7621-pci/pci-mt7621.c list_for_each_entry(port, &pcie->ports, list) { pcie 583 drivers/staging/mt7621-pci/pci-mt7621.c val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR); pcie 587 drivers/staging/mt7621-pci/pci-mt7621.c pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR); pcie 590 drivers/staging/mt7621-pci/pci-mt7621.c val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR); pcie 595 drivers/staging/mt7621-pci/pci-mt7621.c pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR); pcie 598 drivers/staging/mt7621-pci/pci-mt7621.c val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR); pcie 603 drivers/staging/mt7621-pci/pci-mt7621.c pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR); pcie 606 drivers/staging/mt7621-pci/pci-mt7621.c val = pcie_read(pcie, RALINK_PCI_PCICFG_ADDR); pcie 611 drivers/staging/mt7621-pci/pci-mt7621.c pcie_write(pcie, val, RALINK_PCI_PCICFG_ADDR); pcie 618 drivers/staging/mt7621-pci/pci-mt7621.c static int mt7621_pcie_request_resources(struct mt7621_pcie *pcie, pcie 621 drivers/staging/mt7621-pci/pci-mt7621.c struct device *dev = pcie->dev; pcie 623 drivers/staging/mt7621-pci/pci-mt7621.c pci_add_resource_offset(res, &pcie->io, pcie->offset.io); pcie 624 drivers/staging/mt7621-pci/pci-mt7621.c pci_add_resource_offset(res, &pcie->mem, pcie->offset.mem); pcie 625 drivers/staging/mt7621-pci/pci-mt7621.c pci_add_resource(res, &pcie->busn); pcie 633 drivers/staging/mt7621-pci/pci-mt7621.c struct mt7621_pcie *pcie = pci_host_bridge_priv(host); pcie 636 drivers/staging/mt7621-pci/pci-mt7621.c host->busnr = pcie->busn.start; pcie 637 drivers/staging/mt7621-pci/pci-mt7621.c host->dev.parent = pcie->dev; pcie 641 drivers/staging/mt7621-pci/pci-mt7621.c host->sysdata = pcie; pcie 654 drivers/staging/mt7621-pci/pci-mt7621.c struct mt7621_pcie *pcie; pcie 662 drivers/staging/mt7621-pci/pci-mt7621.c bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); pcie 666 drivers/staging/mt7621-pci/pci-mt7621.c pcie = pci_host_bridge_priv(bridge); pcie 667 drivers/staging/mt7621-pci/pci-mt7621.c pcie->dev = dev; pcie 668 drivers/staging/mt7621-pci/pci-mt7621.c platform_set_drvdata(pdev, pcie); pcie 669 drivers/staging/mt7621-pci/pci-mt7621.c INIT_LIST_HEAD(&pcie->ports); pcie 673 drivers/staging/mt7621-pci/pci-mt7621.c pcie->resets_inverted = true; pcie 675 drivers/staging/mt7621-pci/pci-mt7621.c err = mt7621_pcie_parse_dt(pcie); pcie 687 drivers/staging/mt7621-pci/pci-mt7621.c mt7621_pcie_init_ports(pcie); pcie 689 drivers/staging/mt7621-pci/pci-mt7621.c err = mt7621_pcie_init_virtual_bridges(pcie); pcie 695 drivers/staging/mt7621-pci/pci-mt7621.c mt7621_pcie_enable_ports(pcie); pcie 697 drivers/staging/mt7621-pci/pci-mt7621.c err = mt7621_pci_parse_request_of_pci_ranges(pcie); pcie 703 drivers/staging/mt7621-pci/pci-mt7621.c setup_cm_memory_region(pcie); pcie 705 drivers/staging/mt7621-pci/pci-mt7621.c err = mt7621_pcie_request_resources(pcie, &res);