pch_transcoder 5108 drivers/gpu/drm/i915/display/intel_display.c enum pipe pch_transcoder) pch_transcoder 5114 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(PCH_TRANS_HTOTAL(pch_transcoder), pch_transcoder 5116 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(PCH_TRANS_HBLANK(pch_transcoder), pch_transcoder 5118 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(PCH_TRANS_HSYNC(pch_transcoder), pch_transcoder 5121 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(PCH_TRANS_VTOTAL(pch_transcoder), pch_transcoder 5123 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(PCH_TRANS_VBLANK(pch_transcoder), pch_transcoder 5125 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(PCH_TRANS_VSYNC(pch_transcoder), pch_transcoder 5127 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(PCH_TRANS_VSYNCSHIFT(pch_transcoder), pch_transcoder 14575 drivers/gpu/drm/i915/display/intel_display.c enum pipe pch_transcoder = pch_transcoder 14578 drivers/gpu/drm/i915/display/intel_display.c intel_set_pch_fifo_underrun_reporting(dev_priv, pch_transcoder, true); pch_transcoder 16428 drivers/gpu/drm/i915/display/intel_display.c enum pipe pch_transcoder) pch_transcoder 16431 drivers/gpu/drm/i915/display/intel_display.c (HAS_PCH_LPT_H(dev_priv) && pch_transcoder == PIPE_A); pch_transcoder 195 drivers/gpu/drm/i915/display/intel_fifo_underrun.c enum pipe pch_transcoder, pch_transcoder 199 drivers/gpu/drm/i915/display/intel_fifo_underrun.c u32 bit = (pch_transcoder == PIPE_A) ? pch_transcoder 211 drivers/gpu/drm/i915/display/intel_fifo_underrun.c enum pipe pch_transcoder = crtc->pipe; pch_transcoder 216 drivers/gpu/drm/i915/display/intel_fifo_underrun.c if ((serr_int & SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder)) == 0) pch_transcoder 219 drivers/gpu/drm/i915/display/intel_fifo_underrun.c I915_WRITE(SERR_INT, SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder)); pch_transcoder 222 drivers/gpu/drm/i915/display/intel_fifo_underrun.c trace_intel_pch_fifo_underrun(dev_priv, pch_transcoder); pch_transcoder 224 drivers/gpu/drm/i915/display/intel_fifo_underrun.c pipe_name(pch_transcoder)); pch_transcoder 228 drivers/gpu/drm/i915/display/intel_fifo_underrun.c enum pipe pch_transcoder, pch_transcoder 235 drivers/gpu/drm/i915/display/intel_fifo_underrun.c SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder)); pch_transcoder 245 drivers/gpu/drm/i915/display/intel_fifo_underrun.c SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder)) { pch_transcoder 247 drivers/gpu/drm/i915/display/intel_fifo_underrun.c pipe_name(pch_transcoder)); pch_transcoder 321 drivers/gpu/drm/i915/display/intel_fifo_underrun.c enum pipe pch_transcoder, pch_transcoder 325 drivers/gpu/drm/i915/display/intel_fifo_underrun.c intel_get_crtc_for_pipe(dev_priv, pch_transcoder); pch_transcoder 345 drivers/gpu/drm/i915/display/intel_fifo_underrun.c pch_transcoder, pch_transcoder 349 drivers/gpu/drm/i915/display/intel_fifo_underrun.c pch_transcoder, pch_transcoder 398 drivers/gpu/drm/i915/display/intel_fifo_underrun.c enum pipe pch_transcoder) pch_transcoder 400 drivers/gpu/drm/i915/display/intel_fifo_underrun.c if (intel_set_pch_fifo_underrun_reporting(dev_priv, pch_transcoder, pch_transcoder 402 drivers/gpu/drm/i915/display/intel_fifo_underrun.c trace_intel_pch_fifo_underrun(dev_priv, pch_transcoder); pch_transcoder 404 drivers/gpu/drm/i915/display/intel_fifo_underrun.c pipe_name(pch_transcoder)); pch_transcoder 18 drivers/gpu/drm/i915/display/intel_fifo_underrun.h enum pipe pch_transcoder, pch_transcoder 23 drivers/gpu/drm/i915/display/intel_fifo_underrun.h enum pipe pch_transcoder); pch_transcoder 123 drivers/gpu/drm/i915/i915_trace.h TP_PROTO(struct drm_i915_private *dev_priv, enum pipe pch_transcoder), pch_transcoder 124 drivers/gpu/drm/i915/i915_trace.h TP_ARGS(dev_priv, pch_transcoder), pch_transcoder 133 drivers/gpu/drm/i915/i915_trace.h enum pipe pipe = pch_transcoder;