pch_ctl1          880 drivers/gpu/drm/i915/display/intel_panel.c 	u32 pch_ctl1, pch_ctl2, schicken;
pch_ctl1          882 drivers/gpu/drm/i915/display/intel_panel.c 	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
pch_ctl1          883 drivers/gpu/drm/i915/display/intel_panel.c 	if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
pch_ctl1          885 drivers/gpu/drm/i915/display/intel_panel.c 		pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
pch_ctl1          886 drivers/gpu/drm/i915/display/intel_panel.c 		I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
pch_ctl1          908 drivers/gpu/drm/i915/display/intel_panel.c 	pch_ctl1 = 0;
pch_ctl1          910 drivers/gpu/drm/i915/display/intel_panel.c 		pch_ctl1 |= BLM_PCH_POLARITY;
pch_ctl1          914 drivers/gpu/drm/i915/display/intel_panel.c 		pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
pch_ctl1          916 drivers/gpu/drm/i915/display/intel_panel.c 	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
pch_ctl1          918 drivers/gpu/drm/i915/display/intel_panel.c 	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
pch_ctl1          931 drivers/gpu/drm/i915/display/intel_panel.c 	u32 cpu_ctl2, pch_ctl1, pch_ctl2;
pch_ctl1          940 drivers/gpu/drm/i915/display/intel_panel.c 	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
pch_ctl1          941 drivers/gpu/drm/i915/display/intel_panel.c 	if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
pch_ctl1          943 drivers/gpu/drm/i915/display/intel_panel.c 		pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
pch_ctl1          944 drivers/gpu/drm/i915/display/intel_panel.c 		I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
pch_ctl1          961 drivers/gpu/drm/i915/display/intel_panel.c 	pch_ctl1 = 0;
pch_ctl1          963 drivers/gpu/drm/i915/display/intel_panel.c 		pch_ctl1 |= BLM_PCH_POLARITY;
pch_ctl1          965 drivers/gpu/drm/i915/display/intel_panel.c 	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
pch_ctl1          967 drivers/gpu/drm/i915/display/intel_panel.c 	I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
pch_ctl1         1572 drivers/gpu/drm/i915/display/intel_panel.c 	u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
pch_ctl1         1581 drivers/gpu/drm/i915/display/intel_panel.c 	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
pch_ctl1         1582 drivers/gpu/drm/i915/display/intel_panel.c 	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
pch_ctl1         1597 drivers/gpu/drm/i915/display/intel_panel.c 	panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
pch_ctl1         1600 drivers/gpu/drm/i915/display/intel_panel.c 		   !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) &&
pch_ctl1         1615 drivers/gpu/drm/i915/display/intel_panel.c 		I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_OVERRIDE_ENABLE);
pch_ctl1         1627 drivers/gpu/drm/i915/display/intel_panel.c 	u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
pch_ctl1         1629 drivers/gpu/drm/i915/display/intel_panel.c 	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
pch_ctl1         1630 drivers/gpu/drm/i915/display/intel_panel.c 	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
pch_ctl1         1650 drivers/gpu/drm/i915/display/intel_panel.c 		(pch_ctl1 & BLM_PCH_PWM_ENABLE);