patched_disp_clk 401 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; patched_disp_clk 405 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c patched_disp_clk = patched_disp_clk * 115 / 100; patched_disp_clk 415 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { patched_disp_clk 416 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c patched_disp_clk = dce_set_clock(clk_mgr_base, patched_disp_clk); patched_disp_clk 417 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c clk_mgr_base->clks.dispclk_khz = patched_disp_clk; patched_disp_clk 254 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; patched_disp_clk 258 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c patched_disp_clk = patched_disp_clk * 115 / 100; patched_disp_clk 268 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { patched_disp_clk 269 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c context->bw_ctx.bw.dce.dispclk_khz = dce_set_clock(clk_mgr_base, patched_disp_clk); patched_disp_clk 270 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c clk_mgr_base->clks.dispclk_khz = patched_disp_clk; patched_disp_clk 199 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; patched_disp_clk 203 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c patched_disp_clk = patched_disp_clk * 115 / 100; patched_disp_clk 213 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { patched_disp_clk 214 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c patched_disp_clk = dce112_set_clock(clk_mgr_base, patched_disp_clk); patched_disp_clk 215 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c clk_mgr_base->clks.dispclk_khz = patched_disp_clk; patched_disp_clk 91 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; patched_disp_clk 95 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c patched_disp_clk = patched_disp_clk * 115 / 100; patched_disp_clk 97 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { patched_disp_clk 104 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c patched_disp_clk = dce_adjust_dp_ref_freq_for_ss( patched_disp_clk 105 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c clk_mgr_dce, patched_disp_clk); patched_disp_clk 106 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c clock_voltage_req.clocks_in_khz = patched_disp_clk; patched_disp_clk 107 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c clk_mgr_base->clks.dispclk_khz = dce112_set_clock(clk_mgr_base, patched_disp_clk); patched_disp_clk 674 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; patched_disp_clk 678 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c patched_disp_clk = patched_disp_clk * 115 / 100; patched_disp_clk 688 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { patched_disp_clk 689 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c patched_disp_clk = dce_set_clock(clk_mgr, patched_disp_clk); patched_disp_clk 690 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c clk_mgr->clks.dispclk_khz = patched_disp_clk; patched_disp_clk 701 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; patched_disp_clk 705 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c patched_disp_clk = patched_disp_clk * 115 / 100; patched_disp_clk 715 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { patched_disp_clk 716 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c context->bw_ctx.bw.dce.dispclk_khz = dce_set_clock(clk_mgr, patched_disp_clk); patched_disp_clk 717 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c clk_mgr->clks.dispclk_khz = patched_disp_clk; patched_disp_clk 728 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; patched_disp_clk 732 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c patched_disp_clk = patched_disp_clk * 115 / 100; patched_disp_clk 742 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { patched_disp_clk 743 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c patched_disp_clk = dce112_set_clock(clk_mgr, patched_disp_clk); patched_disp_clk 744 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c clk_mgr->clks.dispclk_khz = patched_disp_clk; patched_disp_clk 756 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; patched_disp_clk 760 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c patched_disp_clk = patched_disp_clk * 115 / 100; patched_disp_clk 762 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { patched_disp_clk 769 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c patched_disp_clk = clk_mgr_adjust_dp_ref_freq_for_ss( patched_disp_clk 770 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c clk_mgr_dce, patched_disp_clk); patched_disp_clk 771 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c clock_voltage_req.clocks_in_khz = patched_disp_clk; patched_disp_clk 772 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c clk_mgr->clks.dispclk_khz = dce112_set_clock(clk_mgr, patched_disp_clk);