partial_cacheline_write  683 drivers/gpu/drm/i915/i915_gem.c 	unsigned int partial_cacheline_write;
partial_cacheline_write  704 drivers/gpu/drm/i915/i915_gem.c 	partial_cacheline_write = 0;
partial_cacheline_write  706 drivers/gpu/drm/i915/i915_gem.c 		partial_cacheline_write = boot_cpu_data.x86_clflush_size - 1;
partial_cacheline_write  716 drivers/gpu/drm/i915/i915_gem.c 				   (offset | length) & partial_cacheline_write,