part1             670 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	return psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
part1             715 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	BUILD_BUG_ON(sizeof(dtd->part1) != 8);
part1             718 drivers/gpu/drm/gma500/psb_intel_sdvo.c 				    &dtd->part1, sizeof(dtd->part1)) &&
part1             748 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	dtd->part1.clock = mode->clock / 10;
part1             749 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	dtd->part1.h_active = width & 0xff;
part1             750 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	dtd->part1.h_blank = h_blank_len & 0xff;
part1             751 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
part1             753 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	dtd->part1.v_active = height & 0xff;
part1             754 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	dtd->part1.v_blank = v_blank_len & 0xff;
part1             755 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
part1             780 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	mode->hdisplay = dtd->part1.h_active;
part1             781 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
part1             786 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	mode->htotal = mode->hdisplay + dtd->part1.h_blank;
part1             787 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	mode->htotal += (dtd->part1.h_high & 0xf) << 8;
part1             789 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	mode->vdisplay = dtd->part1.v_active;
part1             790 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
part1             798 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
part1             799 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
part1             801 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	mode->clock = dtd->part1.clock * 10;
part1              74 drivers/gpu/drm/gma500/psb_intel_sdvo_regs.h     } part1;
part1             749 drivers/gpu/drm/i915/display/intel_sdvo.c 	return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
part1             756 drivers/gpu/drm/i915/display/intel_sdvo.c 	return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
part1             813 drivers/gpu/drm/i915/display/intel_sdvo.c 	BUILD_BUG_ON(sizeof(dtd->part1) != 8);
part1             816 drivers/gpu/drm/i915/display/intel_sdvo.c 				    &dtd->part1, sizeof(dtd->part1)) &&
part1             851 drivers/gpu/drm/i915/display/intel_sdvo.c 	dtd->part1.clock = mode_clock;
part1             853 drivers/gpu/drm/i915/display/intel_sdvo.c 	dtd->part1.h_active = width & 0xff;
part1             854 drivers/gpu/drm/i915/display/intel_sdvo.c 	dtd->part1.h_blank = h_blank_len & 0xff;
part1             855 drivers/gpu/drm/i915/display/intel_sdvo.c 	dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
part1             857 drivers/gpu/drm/i915/display/intel_sdvo.c 	dtd->part1.v_active = height & 0xff;
part1             858 drivers/gpu/drm/i915/display/intel_sdvo.c 	dtd->part1.v_blank = v_blank_len & 0xff;
part1             859 drivers/gpu/drm/i915/display/intel_sdvo.c 	dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
part1             886 drivers/gpu/drm/i915/display/intel_sdvo.c 	mode.hdisplay = dtd->part1.h_active;
part1             887 drivers/gpu/drm/i915/display/intel_sdvo.c 	mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
part1             892 drivers/gpu/drm/i915/display/intel_sdvo.c 	mode.htotal = mode.hdisplay + dtd->part1.h_blank;
part1             893 drivers/gpu/drm/i915/display/intel_sdvo.c 	mode.htotal += (dtd->part1.h_high & 0xf) << 8;
part1             895 drivers/gpu/drm/i915/display/intel_sdvo.c 	mode.vdisplay = dtd->part1.v_active;
part1             896 drivers/gpu/drm/i915/display/intel_sdvo.c 	mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
part1             904 drivers/gpu/drm/i915/display/intel_sdvo.c 	mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
part1             905 drivers/gpu/drm/i915/display/intel_sdvo.c 	mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
part1             907 drivers/gpu/drm/i915/display/intel_sdvo.c 	mode.clock = dtd->part1.clock * 10;
part1              85 drivers/gpu/drm/i915/display/intel_sdvo_regs.h 	} part1;
part1             923 drivers/net/ethernet/chelsio/cxgb4/sge.c 		unsigned int part0 = (u8 *)q->stat - (u8 *)sgl->sge, part1;
part1             927 drivers/net/ethernet/chelsio/cxgb4/sge.c 		part1 = (u8 *)end - (u8 *)q->stat;
part1             928 drivers/net/ethernet/chelsio/cxgb4/sge.c 		memcpy(q->desc, (u8 *)buf + part0, part1);
part1             929 drivers/net/ethernet/chelsio/cxgb4/sge.c 		end = (void *)q->desc + part1;
part1             944 drivers/net/ethernet/chelsio/cxgb4vf/sge.c 		unsigned int part0 = (u8 *)tq->stat - (u8 *)sgl->sge, part1;
part1             948 drivers/net/ethernet/chelsio/cxgb4vf/sge.c 		part1 = (u8 *)end - (u8 *)tq->stat;
part1             949 drivers/net/ethernet/chelsio/cxgb4vf/sge.c 		memcpy(tq->desc, (u8 *)buf + part0, part1);
part1             950 drivers/net/ethernet/chelsio/cxgb4vf/sge.c 		end = (void *)tq->desc + part1;