parf 163 drivers/pci/controller/dwc/pcie-qcom.c void __iomem *parf; /* DT parf */ parf 318 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); parf 320 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL); parf 323 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_PHY_REFCLK); parf 325 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK); parf 461 drivers/pci/controller/dwc/pcie-qcom.c writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR); parf 464 drivers/pci/controller/dwc/pcie-qcom.c u32 val = readl(pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT); parf 467 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT); parf 490 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_LTSSM); parf 492 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_LTSSM); parf 587 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); parf 589 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL); parf 592 drivers/pci/controller/dwc/pcie-qcom.c writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR); parf 595 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_SYS_CTRL); parf 597 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_SYS_CTRL); parf 599 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL); parf 601 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL); parf 603 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2); parf 605 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2); parf 868 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); parf 870 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL); parf 873 drivers/pci/controller/dwc/pcie-qcom.c writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR); parf 876 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_SYS_CTRL); parf 878 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_SYS_CTRL); parf 880 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL); parf 882 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL); parf 884 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2); parf 886 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2); parf 1025 drivers/pci/controller/dwc/pcie-qcom.c pcie->parf + PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE); parf 1027 drivers/pci/controller/dwc/pcie-qcom.c val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); parf 1029 drivers/pci/controller/dwc/pcie-qcom.c writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL); parf 1031 drivers/pci/controller/dwc/pcie-qcom.c writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR); parf 1036 drivers/pci/controller/dwc/pcie-qcom.c pcie->parf + PCIE20_PARF_SYS_CTRL); parf 1037 drivers/pci/controller/dwc/pcie-qcom.c writel(0, pcie->parf + PCIE20_PARF_Q2A_FLUSH); parf 1213 drivers/pci/controller/dwc/pcie-qcom.c pcie->parf = devm_ioremap_resource(dev, res); parf 1214 drivers/pci/controller/dwc/pcie-qcom.c if (IS_ERR(pcie->parf)) { parf 1215 drivers/pci/controller/dwc/pcie-qcom.c ret = PTR_ERR(pcie->parf);