param1 468 arch/parisc/kernel/irq.c static void execute_on_irq_stack(void *func, unsigned long param1) param1 489 arch/parisc/kernel/irq.c direct_call(param1); param1 494 arch/parisc/kernel/irq.c call_on_stack(param1, func, irq_stack); param1 164 arch/powerpc/kvm/powerpc.c unsigned long __maybe_unused param1 = kvmppc_get_gpr(vcpu, 3); param1 172 arch/powerpc/kvm/powerpc.c param1 &= 0xffffffff; param1 201 arch/powerpc/kvm/powerpc.c vcpu->arch.magic_page_pa = param1 & ~0xfffULL; param1 88 drivers/acpi/apei/einj.c u64 param1; param1 267 drivers/acpi/apei/einj.c struct acpi_einj_trigger *trigger_tab, u64 param1, u64 param2) param1 279 drivers/acpi/apei/einj.c (entry->register_region.address & param2) == (param1 & param2)) param1 288 drivers/acpi/apei/einj.c u64 param1, u64 param2) param1 362 drivers/acpi/apei/einj.c trigger_tab, param1, param2); param1 402 drivers/acpi/apei/einj.c static int __einj_error_inject(u32 type, u32 flags, u64 param1, u64 param2, param1 422 drivers/acpi/apei/einj.c v5param->apicid = param1; param1 425 drivers/acpi/apei/einj.c v5param->memory_address = param1; param1 429 drivers/acpi/apei/einj.c v5param->pcie_sbdf = param1; param1 435 drivers/acpi/apei/einj.c v5param->memory_address = param1; param1 444 drivers/acpi/apei/einj.c v5param->apicid = param1; param1 450 drivers/acpi/apei/einj.c v5param->memory_address = param1; param1 457 drivers/acpi/apei/einj.c v5param->pcie_sbdf = param1; param1 468 drivers/acpi/apei/einj.c v4param->param1 = param1; param1 497 drivers/acpi/apei/einj.c rc = __einj_error_trigger(trigger_paddr, type, param1, param2); param1 507 drivers/acpi/apei/einj.c static int einj_error_inject(u32 type, u32 flags, u64 param1, u64 param2, param1 540 drivers/acpi/apei/einj.c base_addr = param1 & param2; param1 552 drivers/acpi/apei/einj.c rc = __einj_error_inject(type, flags, param1, param2, param3, param4); param1 62 drivers/crypto/atmel-i2c.c cmd->param1 = CONFIG_ZONE; param1 77 drivers/crypto/atmel-i2c.c cmd->param1 = 0; param1 93 drivers/crypto/atmel-i2c.c cmd->param1 = GENKEY_MODE_PRIVATE; param1 112 drivers/crypto/atmel-i2c.c cmd->param1 = ECDH_PREFIX_MODE; param1 53 drivers/crypto/atmel-i2c.h u8 param1; param1 118 drivers/crypto/cavium/cpt/cptvf_algs.c req_info->req.param1 = req->nbytes; /* Encryption Data length */ param1 469 drivers/crypto/cavium/cpt/cptvf_reqmanager.c vq_cmd.cmd.s.param1 = cpu_to_be16(cpt_req->param1); param1 47 drivers/crypto/cavium/cpt/request_manager.h u16 param1; param1 116 drivers/crypto/cavium/cpt/request_manager.h u16 param1; param1 150 drivers/crypto/cavium/nitrox/nitrox_aead.c creq->gph.param1 = cpu_to_be16(rctx->cryptlen + rctx->assoclen); param1 24 drivers/crypto/cavium/nitrox/nitrox_req.h __be16 param1; param1 415 drivers/crypto/cavium/nitrox/nitrox_req.h __be16 param1; param1 224 drivers/crypto/cavium/nitrox/nitrox_skcipher.c creq->gph.param1 = 0; param1 444 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_COREX_BIST_STATUS(u64 param1) param1 446 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 1) param1 447 drivers/crypto/cavium/zip/zip_regs.h return 0x0520ull + (param1 & 1) * 0x8ull; param1 448 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_COREX_BIST_STATUS: %llu\n", param1); param1 538 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_DBG_COREX_INST(u64 param1) param1 540 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 1) param1 541 drivers/crypto/cavium/zip/zip_regs.h return 0x0640ull + (param1 & 1) * 0x8ull; param1 542 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_DBG_COREX_INST: %llu\n", param1); param1 569 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_DBG_COREX_STA(u64 param1) param1 571 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 1) param1 572 drivers/crypto/cavium/zip/zip_regs.h return 0x0680ull + (param1 & 1) * 0x8ull; param1 573 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_DBG_COREX_STA: %llu\n", param1); param1 600 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_DBG_QUEX_STA(u64 param1) param1 602 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 7) param1 603 drivers/crypto/cavium/zip/zip_regs.h return 0x1800ull + (param1 & 7) * 0x8ull; param1 604 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_DBG_QUEX_STA: %llu\n", param1); param1 818 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_MSIX_PBAX(u64 param1) param1 820 drivers/crypto/cavium/zip/zip_regs.h if (param1 == 0) param1 822 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_MSIX_PBAX: %llu\n", param1); param1 847 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_MSIX_VECX_ADDR(u64 param1) param1 849 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 17) param1 850 drivers/crypto/cavium/zip/zip_regs.h return 0x0000838000F00000ull + (param1 & 31) * 0x10ull; param1 851 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_MSIX_VECX_ADDR: %llu\n", param1); param1 876 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_MSIX_VECX_CTL(u64 param1) param1 878 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 17) param1 879 drivers/crypto/cavium/zip/zip_regs.h return 0x0000838000F00008ull + (param1 & 31) * 0x10ull; param1 880 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_MSIX_VECX_CTL: %llu\n", param1); param1 901 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_QUEX_DONE(u64 param1) param1 903 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 7) param1 904 drivers/crypto/cavium/zip/zip_regs.h return 0x2000ull + (param1 & 7) * 0x8ull; param1 905 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_QUEX_DONE: %llu\n", param1); param1 926 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_QUEX_DONE_ACK(u64 param1) param1 928 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 7) param1 929 drivers/crypto/cavium/zip/zip_regs.h return 0x2200ull + (param1 & 7) * 0x8ull; param1 930 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_QUEX_DONE_ACK: %llu\n", param1); param1 951 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_QUEX_DONE_ENA_W1C(u64 param1) param1 953 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 7) param1 954 drivers/crypto/cavium/zip/zip_regs.h return 0x2600ull + (param1 & 7) * 0x8ull; param1 955 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_QUEX_DONE_ENA_W1C: %llu\n", param1); param1 976 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_QUEX_DONE_ENA_W1S(u64 param1) param1 978 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 7) param1 979 drivers/crypto/cavium/zip/zip_regs.h return 0x2400ull + (param1 & 7) * 0x8ull; param1 980 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_QUEX_DONE_ENA_W1S: %llu\n", param1); param1 1005 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_QUEX_DONE_WAIT(u64 param1) param1 1007 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 7) param1 1008 drivers/crypto/cavium/zip/zip_regs.h return 0x2800ull + (param1 & 7) * 0x8ull; param1 1009 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_QUEX_DONE_WAIT: %llu\n", param1); param1 1030 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_QUEX_DOORBELL(u64 param1) param1 1032 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 7) param1 1033 drivers/crypto/cavium/zip/zip_regs.h return 0x4000ull + (param1 & 7) * 0x8ull; param1 1034 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_QUEX_DOORBELL: %llu\n", param1); param1 1059 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_QUEX_ERR_ENA_W1C(u64 param1) param1 1061 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 7) param1 1062 drivers/crypto/cavium/zip/zip_regs.h return 0x3600ull + (param1 & 7) * 0x8ull; param1 1063 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_QUEX_ERR_ENA_W1C: %llu\n", param1); param1 1088 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_QUEX_ERR_ENA_W1S(u64 param1) param1 1090 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 7) param1 1091 drivers/crypto/cavium/zip/zip_regs.h return 0x3400ull + (param1 & 7) * 0x8ull; param1 1092 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_QUEX_ERR_ENA_W1S: %llu\n", param1); param1 1121 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_QUEX_ERR_INT(u64 param1) param1 1123 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 7) param1 1124 drivers/crypto/cavium/zip/zip_regs.h return 0x3000ull + (param1 & 7) * 0x8ull; param1 1125 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_QUEX_ERR_INT: %llu\n", param1); param1 1151 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_QUEX_ERR_INT_W1S(u64 param1) param1 1153 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 7) param1 1154 drivers/crypto/cavium/zip/zip_regs.h return 0x3200ull + (param1 & 7) * 0x8ull; param1 1155 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_QUEX_ERR_INT_W1S: %llu\n", param1); param1 1180 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_QUEX_GCFG(u64 param1) param1 1182 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 7) param1 1183 drivers/crypto/cavium/zip/zip_regs.h return 0x1A00ull + (param1 & 7) * 0x8ull; param1 1184 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_QUEX_GCFG: %llu\n", param1); param1 1205 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_QUEX_MAP(u64 param1) param1 1207 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 7) param1 1208 drivers/crypto/cavium/zip/zip_regs.h return 0x1400ull + (param1 & 7) * 0x8ull; param1 1209 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_QUEX_MAP: %llu\n", param1); param1 1237 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_QUEX_SBUF_ADDR(u64 param1) param1 1239 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 7) param1 1240 drivers/crypto/cavium/zip/zip_regs.h return 0x1000ull + (param1 & 7) * 0x8ull; param1 1241 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_QUEX_SBUF_ADDR: %llu\n", param1); param1 1277 drivers/crypto/cavium/zip/zip_regs.h static inline u64 ZIP_QUEX_SBUF_CTL(u64 param1) param1 1279 drivers/crypto/cavium/zip/zip_regs.h if (param1 <= 7) param1 1280 drivers/crypto/cavium/zip/zip_regs.h return 0x1200ull + (param1 & 7) * 0x8ull; param1 1281 drivers/crypto/cavium/zip/zip_regs.h pr_err("ZIP_QUEX_SBUF_CTL: %llu\n", param1); param1 36 drivers/gpu/drm/amd/powerplay/arcturus_ppt.h uint32_t param1; param1 720 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c data->dpm_table.vddc_table.dpm_levels[i].param1 = std_voltage_table->entries[i].Leakage; param1 91 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h uint32_t param1; param1 367 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c dpm_table->dpm_level[index].param1 = pcie_lanes; param1 118 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h uint32_t param1; param1 92 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h uint32_t param1; param1 135 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h uint32_t param1; param1 58 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h uint32_t param1; param1 1007 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); param1 842 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c dpm_table->pcie_speed_table.dpm_levels[i].param1); param1 776 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); param1 780 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c dpm_table->pcie_speed_table.dpm_levels[i].param1); param1 519 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); param1 582 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c dpm_table->pcie_speed_table.dpm_levels[i].param1); param1 86 drivers/gpu/drm/amd/powerplay/vega20_ppt.h uint32_t param1; param1 268 drivers/gpu/drm/ast/ast_drv.h u8 param1; param1 411 drivers/gpu/drm/ast/ast_mode.c ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1); param1 468 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c u8 param1, u8 param_num, bool hs) param1 493 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c data[1] = param1; param1 73 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.h u8 param1, u8 param_num, bool hs); param1 2637 drivers/gpu/drm/radeon/ci_dpm.c r600_encode_pci_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); param1 3389 drivers/gpu/drm/radeon/ci_dpm.c dpm_table->dpm_levels[index].param1 = pcie_lanes; param1 3508 drivers/gpu/drm/radeon/ci_dpm.c pi->dpm_table.vddc_table.dpm_levels[i].param1 = param1 3728 drivers/gpu/drm/radeon/ci_dpm.c (pcie_table->dpm_levels[i].param1 < lanes_low) || param1 3730 drivers/gpu/drm/radeon/ci_dpm.c (pcie_table->dpm_levels[i].param1 > lanes_high)) param1 3741 drivers/gpu/drm/radeon/ci_dpm.c (pcie_table->dpm_levels[i].param1 == pcie_table->dpm_levels[j].param1)) param1 56 drivers/gpu/drm/radeon/ci_dpm.h u32 param1; param1 185 drivers/hwmon/asus_atk0110.c u32 param1; param1 534 drivers/hwmon/asus_atk0110.c buf.param1 = 0; param1 1095 drivers/hwmon/asus_atk0110.c sitm.param1 = enable; param1 89 drivers/hwmon/xgene-hwmon.c u32 param1; param1 179 drivers/hwmon/xgene-hwmon.c msg[1] = ctx->sync_msg.param1; param1 217 drivers/hwmon/xgene-hwmon.c msg[1] = ctx->sync_msg.param1; param1 509 drivers/hwmon/xgene-hwmon.c ctx->sync_msg.param1 = ((u32 *)msg)[1]; param1 570 drivers/hwmon/xgene-hwmon.c ctx->sync_msg.param1 = ((u32 *)msg)[1]; param1 117 drivers/ide/ali14xx.c u8 param1, param2, param3, param4; param1 126 drivers/ide/ali14xx.c param3 = param1 = (time2 * bus_speed + 999) / 1000; param1 127 drivers/ide/ali14xx.c param4 = param2 = (time1 * bus_speed + 999) / 1000 - param1; param1 133 drivers/ide/ali14xx.c drive->name, pio, time1, time2, param1, param2, param3, param4); param1 139 drivers/ide/ali14xx.c outReg(param1, regTab[driveNum].reg1); param1 361 drivers/isdn/mISDN/dsp_cmx.c dsp_cmx_hw_message(struct dsp *dsp, u32 message, u32 param1, u32 param2, param1 368 drivers/isdn/mISDN/dsp_cmx.c cq.p1 = param1 | (param2 << 8); param1 988 drivers/media/dvb-frontends/drx39xyj/drxj.c u16 param1; param1 2119 drivers/media/dvb-frontends/drx39xyj/drxj.c hi_cmd.param1 = param1 2243 drivers/media/dvb-frontends/drx39xyj/drxj.c hi_cmd.param1 = SIO_HI_RA_RAM_PAR_1_PAR1_SEC_KEY; param1 2316 drivers/media/dvb-frontends/drx39xyj/drxj.c rc = drxj_dap_write_reg16(dev_addr, SIO_HI_RA_RAM_PAR_1__A, cmd->param1, 0); param1 3893 drivers/media/dvb-frontends/drx39xyj/drxj.c hi_cmd.param1 = SIO_HI_RA_RAM_PAR_1_PAR1_SEC_KEY; param1 1325 drivers/media/dvb-frontends/drxd_hard.c u16 subCmd, u16 param0, u16 param1) param1 1339 drivers/media/dvb-frontends/drxd_hard.c status |= Write16(state, SC_RA_RAM_PARAM1__A, param1, 0); param1 1349 drivers/media/dvb-frontends/drxd_hard.c u16 subCmd, u16 param0, u16 param1) param1 1361 drivers/media/dvb-frontends/drxd_hard.c status = Write16(state, SC_RA_RAM_PARAM1__A, param1, 0); param1 3209 drivers/media/dvb-frontends/drxk_hard.c u16 param0, u16 param1, u16 param2, param1 3262 drivers/media/dvb-frontends/drxk_hard.c status |= write16(state, OFDM_SC_RA_RAM_PARAM1__A, param1); param1 3694 drivers/media/dvb-frontends/drxk_hard.c u16 param1; param1 3701 drivers/media/dvb-frontends/drxk_hard.c param1 = OFDM_SC_RA_RAM_LOCKTRACK_MIN; param1 3703 drivers/media/dvb-frontends/drxk_hard.c OFDM_SC_RA_RAM_SW_EVENT_RUN_NMASK__M, param1, param1 3737 drivers/media/dvb-frontends/drxk_hard.c u16 param1; param1 4051 drivers/media/dvb-frontends/drxk_hard.c param1 = (OFDM_SC_RA_RAM_OP_AUTO_MODE__M | param1 4057 drivers/media/dvb-frontends/drxk_hard.c 0, transmission_params, param1, 0, 0, 0); param1 205 drivers/media/dvb-frontends/drxk_hard.h u16 param1; /* General purpous param */ param1 156 drivers/net/ethernet/cavium/liquidio/lio_core.c int liquidio_set_feature(struct net_device *netdev, int cmd, u16 param1) param1 167 drivers/net/ethernet/cavium/liquidio/lio_core.c nctrl.ncmd.s.param1 = param1; param1 268 drivers/net/ethernet/cavium/liquidio/lio_core.c if (nctrl->ncmd.s.param1) { param1 270 drivers/net/ethernet/cavium/liquidio/lio_core.c int vfidx = nctrl->ncmd.s.param1 - 1; param1 314 drivers/net/ethernet/cavium/liquidio/lio_core.c if (nctrl->ncmd.s.param1) param1 324 drivers/net/ethernet/cavium/liquidio/lio_core.c netdev->name, nctrl->ncmd.s.param1); param1 329 drivers/net/ethernet/cavium/liquidio/lio_core.c netdev->name, nctrl->ncmd.s.param1); param1 342 drivers/net/ethernet/cavium/liquidio/lio_core.c if (nctrl->ncmd.s.param1 == OCTNET_CMD_RXCSUM_ENABLE) { param1 345 drivers/net/ethernet/cavium/liquidio/lio_core.c } else if (nctrl->ncmd.s.param1 == param1 356 drivers/net/ethernet/cavium/liquidio/lio_core.c if (nctrl->ncmd.s.param1 == OCTNET_CMD_TXCSUM_ENABLE) { param1 359 drivers/net/ethernet/cavium/liquidio/lio_core.c } else if (nctrl->ncmd.s.param1 == param1 373 drivers/net/ethernet/cavium/liquidio/lio_core.c nctrl->ncmd.s.param1); param1 378 drivers/net/ethernet/cavium/liquidio/lio_core.c nctrl->ncmd.s.param1); param1 388 drivers/net/ethernet/cavium/liquidio/lio_core.c nctrl->ncmd.s.param1); param1 1227 drivers/net/ethernet/cavium/liquidio/lio_core.c ncmd->s.param1 = new_mtu; param1 1547 drivers/net/ethernet/cavium/liquidio/lio_core.c ncmd->s.param1 = speed; param1 1707 drivers/net/ethernet/cavium/liquidio/lio_core.c ncmd->s.param1 = on_off; param1 480 drivers/net/ethernet/cavium/liquidio/lio_ethtool.c nctrl.ncmd.s.param1 = num_queues; param1 715 drivers/net/ethernet/cavium/liquidio/lio_ethtool.c nctrl.ncmd.s.param1 = addr; param1 742 drivers/net/ethernet/cavium/liquidio/lio_ethtool.c nctrl.ncmd.s.param1 = val; param1 1397 drivers/net/ethernet/cavium/liquidio/lio_ethtool.c nctrl.ncmd.s.param1 = 1; param1 1400 drivers/net/ethernet/cavium/liquidio/lio_ethtool.c nctrl.ncmd.s.param1 = 0; param1 1205 drivers/net/ethernet/cavium/liquidio/lio_main.c ncmd->s.param1 = start_stop; param1 1985 drivers/net/ethernet/cavium/liquidio/lio_main.c nctrl.ncmd.s.param1 = get_new_flags(netdev); param1 2033 drivers/net/ethernet/cavium/liquidio/lio_main.c nctrl.ncmd.s.param1 = 0; param1 2591 drivers/net/ethernet/cavium/liquidio/lio_main.c nctrl.ncmd.s.param1 = vid; param1 2620 drivers/net/ethernet/cavium/liquidio/lio_main.c nctrl.ncmd.s.param1 = vid; param1 2654 drivers/net/ethernet/cavium/liquidio/lio_main.c nctrl.ncmd.s.param1 = rx_cmd; param1 2691 drivers/net/ethernet/cavium/liquidio/lio_main.c nctrl.ncmd.s.param1 = vxlan_port; param1 2838 drivers/net/ethernet/cavium/liquidio/lio_main.c nctrl.ncmd.s.param1 = vfidx + 1; param1 2907 drivers/net/ethernet/cavium/liquidio/lio_main.c nctrl.ncmd.s.param1 = param1 2965 drivers/net/ethernet/cavium/liquidio/lio_main.c nctrl.ncmd.s.param1 = vlantci; param1 3118 drivers/net/ethernet/cavium/liquidio/lio_main.c nctrl.ncmd.s.param1 = param1 619 drivers/net/ethernet/cavium/liquidio/lio_vf_main.c ncmd->s.param1 = start_stop; param1 1049 drivers/net/ethernet/cavium/liquidio/lio_vf_main.c nctrl.ncmd.s.param1 = oct->vf_num; param1 1083 drivers/net/ethernet/cavium/liquidio/lio_vf_main.c nctrl.ncmd.s.param1 = get_new_flags(netdev); param1 1139 drivers/net/ethernet/cavium/liquidio/lio_vf_main.c nctrl.ncmd.s.param1 = 0; param1 1657 drivers/net/ethernet/cavium/liquidio/lio_vf_main.c nctrl.ncmd.s.param1 = vid; param1 1685 drivers/net/ethernet/cavium/liquidio/lio_vf_main.c nctrl.ncmd.s.param1 = vid; param1 1719 drivers/net/ethernet/cavium/liquidio/lio_vf_main.c nctrl.ncmd.s.param1 = rx_cmd; param1 1755 drivers/net/ethernet/cavium/liquidio/lio_vf_main.c nctrl.ncmd.s.param1 = vxlan_port; param1 324 drivers/net/ethernet/cavium/liquidio/liquidio_common.h u64 param1:16; param1 332 drivers/net/ethernet/cavium/liquidio/liquidio_common.h u64 param1:16; param1 202 drivers/net/ethernet/cavium/liquidio/octeon_network.h int liquidio_set_feature(struct net_device *netdev, int cmd, u16 param1); param1 1044 drivers/net/ethernet/intel/i40e/i40e.h u16 uplink, u32 param1); param1 165 drivers/net/ethernet/intel/i40e/i40e_adminq.c desc->params.external.param1 = 0; param1 38 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h __le32 param1; param1 44 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h __le32 param1; param1 308 drivers/net/ethernet/intel/i40e/i40e_common.c le32_to_cpu(aq_desc->params.internal.param1)); param1 1215 drivers/net/ethernet/intel/i40e/i40e_debugfs.c &desc->params.internal.param1, param1 1243 drivers/net/ethernet/intel/i40e/i40e_debugfs.c desc->params.internal.param1, param1 1263 drivers/net/ethernet/intel/i40e/i40e_debugfs.c &desc->params.internal.param1, param1 1304 drivers/net/ethernet/intel/i40e/i40e_debugfs.c desc->params.internal.param1, param1 13561 drivers/net/ethernet/intel/i40e/i40e_main.c u16 uplink_seid, u32 param1) param1 13651 drivers/net/ethernet/intel/i40e/i40e_main.c vsi->vf_id = param1; param1 151 drivers/net/ethernet/intel/iavf/iavf_adminq.c desc->params.external.param1 = 0; param1 34 drivers/net/ethernet/intel/iavf/iavf_adminq_cmd.h __le32 param1; param1 40 drivers/net/ethernet/intel/iavf/iavf_adminq_cmd.h __le32 param1; param1 280 drivers/net/ethernet/intel/iavf/iavf_common.c le32_to_cpu(aq_desc->params.internal.param1)); param1 17 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h __le32 param1; param1 1229 drivers/net/ethernet/intel/ice/ice_common.c le32_to_cpu(cq_desc->params.generic.param1)); param1 188 drivers/net/ethernet/intel/ice/ice_controlq.c desc->params.generic.param1 = 0; param1 296 drivers/net/wireless/intersil/hostap/hostap_download.c u16 param0, param1; param1 326 drivers/net/wireless/intersil/hostap/hostap_download.c param1 = param->start_addr >> 16; param1 329 drivers/net/wireless/intersil/hostap/hostap_download.c HFA384X_OUTW(param1, HFA384X_PARAM1_OFF); param1 352 drivers/net/wireless/intersil/hostap/hostap_download.c HFA384X_OUTW(param1, HFA384X_PARAM1_OFF); param1 551 drivers/net/wireless/intersil/hostap/hostap_download.c u16 param0, param1; param1 557 drivers/net/wireless/intersil/hostap/hostap_download.c param1 = addr >> 16; param1 560 drivers/net/wireless/intersil/hostap/hostap_download.c HFA384X_OUTW(param1, HFA384X_PARAM1_OFF); param1 289 drivers/net/wireless/intersil/hostap/hostap_hw.c HFA384X_OUTW(entry->param1, HFA384X_PARAM1_OFF); param1 311 drivers/net/wireless/intersil/hostap/hostap_hw.c u16 *param1, u16 *resp0) param1 346 drivers/net/wireless/intersil/hostap/hostap_hw.c if (param1) param1 347 drivers/net/wireless/intersil/hostap/hostap_hw.c entry->param1 = *param1; param1 558 drivers/net/wireless/intersil/hostap/hostap_wlan.h u16 cmd, param0, param1; param1 586 drivers/net/wireless/intersil/hostap/hostap_wlan.h int (*cmd)(struct net_device *dev, u16 cmd, u16 param0, u16 *param1, param1 106 drivers/net/wireless/intersil/orinoco/hermes.c u16 param1, u16 param2) param1 122 drivers/net/wireless/intersil/orinoco/hermes.c hermes_write_regn(hw, PARAM1, param1); param1 38 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c __le32 param1; param1 234 drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c ts->ep_next_rx_pkt = &extra_params->param1; param1 34 drivers/rpmsg/qcom_glink_native.c __le16 param1; param1 348 drivers/rpmsg/qcom_glink_native.c msg.param1 = cpu_to_le16(GLINK_VERSION_1); param1 359 drivers/rpmsg/qcom_glink_native.c msg.param1 = cpu_to_le16(GLINK_VERSION_1); param1 371 drivers/rpmsg/qcom_glink_native.c msg.param1 = cpu_to_le16(channel->rcid); param1 430 drivers/rpmsg/qcom_glink_native.c req.msg.param1 = cpu_to_le16(channel->lcid); param1 455 drivers/rpmsg/qcom_glink_native.c req.param1 = cpu_to_le16(channel->lcid); param1 467 drivers/rpmsg/qcom_glink_native.c req.param1 = cpu_to_le16(rcid); param1 610 drivers/rpmsg/qcom_glink_native.c msg.param1 = cpu_to_le16(channel->lcid); param1 816 drivers/rpmsg/qcom_glink_native.c rcid = le16_to_cpu(hdr.msg.param1); param1 982 drivers/rpmsg/qcom_glink_native.c unsigned int param1; param1 996 drivers/rpmsg/qcom_glink_native.c param1 = le16_to_cpu(msg.param1); param1 1008 drivers/rpmsg/qcom_glink_native.c ret = qcom_glink_rx_open_ack(glink, param1); param1 1025 drivers/rpmsg/qcom_glink_native.c qcom_glink_handle_intent(glink, param1, param2, avail); param1 1028 drivers/rpmsg/qcom_glink_native.c qcom_glink_handle_rx_done(glink, param1, param2, false); param1 1032 drivers/rpmsg/qcom_glink_native.c qcom_glink_handle_rx_done(glink, param1, param2, true); param1 1036 drivers/rpmsg/qcom_glink_native.c qcom_glink_handle_intent_req_ack(glink, param1, param2); param1 1307 drivers/rpmsg/qcom_glink_native.c req.msg.param1 = cpu_to_le16(channel->lcid); param1 1517 drivers/rpmsg/qcom_glink_native.c unsigned int param1; param1 1534 drivers/rpmsg/qcom_glink_native.c param1 = le16_to_cpu(msg->param1); param1 1539 drivers/rpmsg/qcom_glink_native.c qcom_glink_receive_version(glink, param1, param2); param1 1542 drivers/rpmsg/qcom_glink_native.c qcom_glink_receive_version_ack(glink, param1, param2); param1 1545 drivers/rpmsg/qcom_glink_native.c qcom_glink_rx_open(glink, param1, msg->data); param1 1548 drivers/rpmsg/qcom_glink_native.c qcom_glink_rx_close(glink, param1); param1 1551 drivers/rpmsg/qcom_glink_native.c qcom_glink_rx_close_ack(glink, param1); param1 1554 drivers/rpmsg/qcom_glink_native.c qcom_glink_handle_intent_req(glink, param1, param2); param1 48 drivers/scsi/bnx2i/57xx_iscsi_hsi.h u16 param1; param1 50 drivers/scsi/bnx2i/57xx_iscsi_hsi.h u16 param1; param1 1771 drivers/scsi/bnx2i/bnx2i_hwi.c resp_hdr->param1 = cpu_to_be16(async_cqe->param1); param1 2673 drivers/scsi/myrb.c unsigned char *param0, unsigned char *param1) param1 2683 drivers/scsi/myrb.c *param1 = readb(base + DAC960_LA_CMDID_OFFSET); param1 2951 drivers/scsi/myrb.c unsigned char *param0, unsigned char *param1) param1 2960 drivers/scsi/myrb.c *param1 = readb(base + DAC960_PG_CMDID_OFFSET); param1 3188 drivers/scsi/myrb.c unsigned char *param0, unsigned char *param1) param1 3197 drivers/scsi/myrb.c *param1 = readb(base + DAC960_PD_CMDID_OFFSET); param1 2545 drivers/scsi/myrs.c unsigned char *param0, unsigned char *param1) param1 2554 drivers/scsi/myrs.c *param1 = readb(base + DAC960_GEM_CMDMBX_OFFSET + 1); param1 2794 drivers/scsi/myrs.c unsigned char *param0, unsigned char *param1) param1 2804 drivers/scsi/myrs.c *param1 = readb(base + DAC960_BA_CMDMBX_OFFSET + 1); param1 3043 drivers/scsi/myrs.c unsigned char *param0, unsigned char *param1) param1 3053 drivers/scsi/myrs.c *param1 = readb(base + DAC960_LP_CMDMBX_OFFSET + 1); param1 3344 drivers/scsi/pm8001/pm8001_hwi.c u32 Qnum, u32 SEA, u32 port_id, u32 phyId, u32 param0, u32 param1) param1 3357 drivers/scsi/pm8001/pm8001_hwi.c payload.param1 = cpu_to_le32(param1); param1 314 drivers/scsi/pm8001/pm8001_hwi.h __le32 param1; param1 328 drivers/scsi/pm8001/pm8001_hwi.h __le32 param1; param1 626 drivers/scsi/pm8001/pm8001_sas.h void *param1; param1 2864 drivers/scsi/pm8001/pm80xx_hwi.c u32 Qnum, u32 SEA, u32 port_id, u32 phyId, u32 param0, u32 param1) param1 2877 drivers/scsi/pm8001/pm80xx_hwi.c payload.param1 = cpu_to_le32(param1); param1 511 drivers/scsi/pm8001/pm80xx_hwi.h __le32 param1; param1 523 drivers/scsi/pm8001/pm80xx_hwi.h __le32 param1; param1 518 drivers/scsi/qedi/qedi_fw.c resp_hdr->param1 = cpu_to_be16(cqe_async_msg->param1_rsrv); param1 1228 drivers/scsi/qla2xxx/qla_bsg.c cpu_to_le32(ql84_mgmt->mgmt.mgmtp.u.config.param1); param1 93 drivers/scsi/qla2xxx/qla_bsg.h uint32_t param1; param1 270 drivers/staging/rtl8188eu/hal/phy.c u32 param1, param2; param1 275 drivers/staging/rtl8188eu/hal/phy.c param1 = RF_CHNLBW; param1 279 drivers/staging/rtl8188eu/hal/phy.c phy_set_rf_reg(adapt, 0, param1, param1 2748 drivers/target/iscsi/iscsi_target.c hdr->param1 = cpu_to_be16(cmd->logout_cid); param1 1380 drivers/usb/dwc3/core.h u32 param1; param1 76 drivers/usb/dwc3/ep0.c params.param1 = lower_32_bits(dwc->ep0_trb_addr); param1 321 drivers/usb/dwc3/gadget.c dwc3_writel(dep->regs, DWC3_DEPCMDPAR1, params->param1); param1 566 drivers/usb/dwc3/gadget.c params.param1 = DWC3_DEPCFG_XFER_COMPLETE_EN; param1 569 drivers/usb/dwc3/gadget.c params.param1 |= DWC3_DEPCFG_XFER_NOT_READY_EN; param1 572 drivers/usb/dwc3/gadget.c params.param1 |= DWC3_DEPCFG_STREAM_CAPABLE param1 578 drivers/usb/dwc3/gadget.c params.param1 |= DWC3_DEPCFG_XFER_IN_PROGRESS_EN; param1 586 drivers/usb/dwc3/gadget.c params.param1 |= DWC3_DEPCFG_EP_NUMBER(dep->number); param1 596 drivers/usb/dwc3/gadget.c params.param1 |= DWC3_DEPCFG_BINTERVAL_M1(desc->bInterval - 1); param1 675 drivers/usb/dwc3/gadget.c params.param1 = lower_32_bits(trb_dma); param1 1244 drivers/usb/dwc3/gadget.c params.param1 = lower_32_bits(req->trb_dma); param1 1343 drivers/usb/dwc3/gadget.c params.param1 = lower_32_bits(dep->dwc->bounce_addr); param1 191 drivers/usb/dwc3/trace.h __field(u32, param1) param1 199 drivers/usb/dwc3/trace.h __entry->param1 = params->param1; param1 206 drivers/usb/dwc3/trace.h __entry->param1, __entry->param2, param1 373 drivers/usb/gadget/udc/bdc/bdc.h u32 param1; param1 18 drivers/usb/gadget/udc/bdc/bdc_cmd.c u32 param1, u32 param2) param1 25 drivers/usb/gadget/udc/bdc/bdc_cmd.c bdc_writel(bdc->regs, BDC_CMDPAR1, param1); param1 52 drivers/usb/gadget/udc/bdc/bdc_cmd.c u32 param0, u32 param1, u32 param2) param1 60 drivers/usb/gadget/udc/bdc/bdc_cmd.c __func__, temp, cmd_sc, param0, param1, param2); param1 67 drivers/usb/gadget/udc/bdc/bdc_cmd.c ret = bdc_issue_cmd(bdc, cmd_sc, param0, param1, param2); param1 138 drivers/usb/gadget/udc/bdc/bdc_cmd.c u32 param0, param1, param2, cmd_sc; param1 146 drivers/usb/gadget/udc/bdc/bdc_cmd.c param1 = upper_32_bits(ep->bd_list.bd_table_array[0]->dma); param1 148 drivers/usb/gadget/udc/bdc/bdc_cmd.c cpu_to_le32s(¶m1); param1 151 drivers/usb/gadget/udc/bdc/bdc_cmd.c __func__, param0, param1); param1 209 drivers/usb/gadget/udc/bdc/bdc_cmd.c ret = bdc_submit_cmd(bdc, cmd_sc, param0, param1, param2); param1 225 drivers/usb/gadget/udc/bdc/bdc_cmd.c u32 param0, param1; param1 231 drivers/usb/gadget/udc/bdc/bdc_cmd.c param1 = upper_32_bits(dma_addr); param1 233 drivers/usb/gadget/udc/bdc/bdc_cmd.c cpu_to_le32s(¶m1); param1 238 drivers/usb/gadget/udc/bdc/bdc_cmd.c return bdc_submit_cmd(bdc, cmd_sc, param0, param1, 0); param1 257 drivers/usb/gadget/udc/bdc/bdc_cmd.c u32 param0, param1; param1 260 drivers/usb/gadget/udc/bdc/bdc_cmd.c param0 = param1 = 0; param1 265 drivers/usb/gadget/udc/bdc/bdc_cmd.c param1 |= DEV_NOTF_TYPE; param1 266 drivers/usb/gadget/udc/bdc/bdc_cmd.c param1 |= (FWK_SUBTYPE<<4); param1 267 drivers/usb/gadget/udc/bdc/bdc_cmd.c dev_dbg(bdc->dev, "param0=%08x param1=%08x\n", param0, param1); param1 269 drivers/usb/gadget/udc/bdc/bdc_cmd.c return bdc_submit_cmd(bdc, cmd_sc, param0, param1, 0); param1 227 include/scsi/iscsi_proto.h __be16 param1; param1 209 lib/zstd/compress.c static U32 ZSTD_equivalentParams(ZSTD_parameters param1, ZSTD_parameters param2) param1 211 lib/zstd/compress.c return (param1.cParams.hashLog == param2.cParams.hashLog) & (param1.cParams.chainLog == param2.cParams.chainLog) & param1 212 lib/zstd/compress.c (param1.cParams.strategy == param2.cParams.strategy) & ((param1.cParams.searchLength == 3) == (param2.cParams.searchLength == 3)); param1 122 net/nfc/digital_technology.c u8 param1; param1 625 net/nfc/digital_technology.c attrib_req->param1 = DIGITAL_ATTRIB_P1_TR0_DEFAULT | param1 209 sound/drivers/vx/vx_cmd.h int param1, int param2) param1 213 sound/drivers/vx/vx_cmd.h rmh->Cmd[0] |= (((u32)param1 & MASK_FIRST_FIELD) << FIELD_SIZE) & MASK_DSP_WORD; param1 822 sound/pci/asihpi/hpi_internal.h u32 param1; /* generic parameter 1 */ param1 832 sound/pci/asihpi/hpi_internal.h u32 param1; /* generic parameter 1 */ param1 853 sound/pci/asihpi/hpi_internal.h u32 param1; param1 860 sound/pci/asihpi/hpi_internal.h u32 param1; param1 349 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = param1 352 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = 0; param1 356 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = 0; param1 364 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = pC->u.mux.source_node_type; param1 372 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = pC->u.mode.mode; param1 385 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = pC->u.tuner.freq_ink_hz; param1 387 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = pC->u.tuner.band; param1 402 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = pC->u.aes3rx.error_status; param1 404 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = pC->u.aes3rx.format; param1 410 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = pC->u.aes3tx.format; param1 416 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = pC->u.tone.state; param1 422 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = pC->u.silence.state; param1 428 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = pC->u.microphone.phantom_state; param1 434 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = pC->u.clk.source; param1 438 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = 0; param1 442 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = pC->u.clk.source_index; param1 444 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = pC->u.clk.sample_rate; param1 461 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = p_pad->pI; param1 463 sound/pci/asihpi/hpicmn.c phr->u.c.param1 = p_pad->pTY; param1 468 sound/pci/asihpi/hpicmn.c unsigned int offset = phm->u.c.param1; param1 562 sound/pci/asihpi/hpicmn.c if (phm->u.c.param1) param1 571 sound/pci/asihpi/hpicmn.c pC->u.mux.source_node_type = (u16)phm->u.c.param1; param1 578 sound/pci/asihpi/hpicmn.c pC->u.mode.mode = (u16)phm->u.c.param1; param1 588 sound/pci/asihpi/hpicmn.c pC->u.microphone.phantom_state = (u16)phm->u.c.param1; param1 592 sound/pci/asihpi/hpicmn.c pC->u.aes3tx.format = phm->u.c.param1; param1 596 sound/pci/asihpi/hpicmn.c pC->u.aes3rx.format = phm->u.c.param1; param1 600 sound/pci/asihpi/hpicmn.c pC->u.clk.source = (u16)phm->u.c.param1; param1 602 sound/pci/asihpi/hpicmn.c pC->u.clk.source_index = (u16)phm->u.c.param1; param1 604 sound/pci/asihpi/hpicmn.c pC->u.clk.sample_rate = phm->u.c.param1; param1 1309 sound/pci/asihpi/hpifunc.c const u32 param1, const u32 param2) param1 1319 sound/pci/asihpi/hpifunc.c hm.u.c.param1 = param1; param1 1343 sound/pci/asihpi/hpifunc.c u16 hpi_control_param_get(const u32 h_control, const u16 attrib, u32 param1, param1 1354 sound/pci/asihpi/hpifunc.c hm.u.c.param1 = param1; param1 1358 sound/pci/asihpi/hpifunc.c *pparam1 = hr.u.c.param1; param1 1401 sound/pci/asihpi/hpifunc.c hm.u.c.param1 = index; param1 1405 sound/pci/asihpi/hpifunc.c *psetting = hr.u.c.param1; param1 1431 sound/pci/asihpi/hpifunc.c hm.u.c.param1 = sub_string_index; param1 1513 sound/pci/asihpi/hpifunc.c hm.u.c.param1 = index; param1 1532 sound/pci/asihpi/hpifunc.c hm.u.c.param1 = index; param1 1631 sound/pci/asihpi/hpifunc.c *pw_clk_activity = (u16)hr.u.c.param1; param1 1980 sound/pci/asihpi/hpifunc.c hr.u.c.param1 = 0; param1 1987 sound/pci/asihpi/hpifunc.c *step_gain_01dB = (short)hr.u.c.param1; param1 2158 sound/pci/asihpi/hpifunc.c hm.u.c.param1 = index; param1 2163 sound/pci/asihpi/hpifunc.c *source_node_type = (u16)hr.u.c.param1; param1 2207 sound/pci/asihpi/hpifunc.c *pfrequency_hz = hr.u.c.param1; param1 2229 sound/pci/asihpi/hpifunc.c hm.u.c.param1 = frequency_hz; param1 2257 sound/pci/asihpi/hpifunc.c coeffs[2] = (short)hr.u.c.param1; param1 2258 sound/pci/asihpi/hpifunc.c coeffs[3] = (short)(hr.u.c.param1 >> 16); param1 2785 sound/pci/asihpi/hpifunc.c hr.u.c.param1 = 0; param1 2792 sound/pci/asihpi/hpifunc.c *step_gain_01dB = (short)hr.u.c.param1; param1 2812 sound/pci/asihpi/hpifunc.c hm.u.c.param1 = duration_ms; param1 730 sound/pci/pcxhr/pcxhr_core.c unsigned int param1, unsigned int param2, param1 733 sound/pci/pcxhr/pcxhr_core.c snd_BUG_ON(param1 > MASK_FIRST_FIELD); param1 736 sound/pci/pcxhr/pcxhr_core.c if (param1) param1 737 sound/pci/pcxhr/pcxhr_core.c rmh->cmd[0] |= (param1 << FIELD_SIZE); param1 85 sound/pci/pcxhr/pcxhr_core.h void pcxhr_set_pipe_cmd_params(struct pcxhr_rmh* rmh, int capture, unsigned int param1, param1 780 sound/soc/sh/rcar/rsnd.h int param1, int param2, int *idx); param1 230 sound/soc/sh/rcar/ssi.c int param1, int param2, int *idx) param1 251 sound/soc/sh/rcar/ssi.c main_rate = width * param1 * param2 * ssi_clk_mul_table[j];