pPhyReg 59 drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c struct bb_reg_definition *pPhyReg; pPhyReg 74 drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c pPhyReg = &priv->PHYRegDef[eRFPath]; pPhyReg 80 drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c u4RegValue = rtl92e_get_bb_reg(dev, pPhyReg->rfintfs, pPhyReg 85 drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c u4RegValue = rtl92e_get_bb_reg(dev, pPhyReg->rfintfs, pPhyReg 90 drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c rtl92e_set_bb_reg(dev, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); pPhyReg 92 drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c rtl92e_set_bb_reg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); pPhyReg 94 drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, pPhyReg 96 drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, pPhyReg 130 drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c rtl92e_set_bb_reg(dev, pPhyReg->rfintfs, bRFSI_RFENV, pPhyReg 135 drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c rtl92e_set_bb_reg(dev, pPhyReg->rfintfs, pPhyReg 97 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c struct bb_reg_definition *pPhyReg = &priv->PHYRegDef[eRFPath]; pPhyReg 105 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, pPhyReg 112 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, pPhyReg 124 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, bLSSIReadAddress, pPhyReg 126 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x0); pPhyReg 127 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x1); pPhyReg 131 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c ret = rtl92e_get_bb_reg(dev, pPhyReg->rfLSSIReadBack, pPhyReg 137 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, bMaskDWord, pPhyReg 154 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c struct bb_reg_definition *pPhyReg = &priv->PHYRegDef[eRFPath]; pPhyReg 162 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, pPhyReg 169 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, pPhyReg 183 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); pPhyReg 191 drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, pPhyReg 116 drivers/staging/rtl8192u/r8190_rtl8256.c BB_REGISTER_DEFINITION_T *pPhyReg; pPhyReg 128 drivers/staging/rtl8192u/r8190_rtl8256.c pPhyReg = &priv->PHYRegDef[eRFPath]; pPhyReg 137 drivers/staging/rtl8192u/r8190_rtl8256.c u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV); pPhyReg 141 drivers/staging/rtl8192u/r8190_rtl8256.c u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV << 16); pPhyReg 146 drivers/staging/rtl8192u/r8190_rtl8256.c rtl8192_setBBreg(dev, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1); pPhyReg 149 drivers/staging/rtl8192u/r8190_rtl8256.c rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); pPhyReg 152 drivers/staging/rtl8192u/r8190_rtl8256.c rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 0 to 4 bits for Z-serial and set 1 to 6 bits for 8258 */ pPhyReg 153 drivers/staging/rtl8192u/r8190_rtl8256.c rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for Z-serial and 8258, and set 1 to 14 bits for ??? */ pPhyReg 207 drivers/staging/rtl8192u/r8190_rtl8256.c rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); pPhyReg 211 drivers/staging/rtl8192u/r8190_rtl8256.c rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue); pPhyReg 132 drivers/staging/rtl8192u/r819xU_phy.c BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[e_rfpath]; pPhyReg 134 drivers/staging/rtl8192u/r819xU_phy.c rtl8192_setBBreg(dev, pPhyReg->rfLSSIReadBack, bLSSIReadBackData, 0); pPhyReg 143 drivers/staging/rtl8192u/r819xU_phy.c rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, pPhyReg 152 drivers/staging/rtl8192u/r819xU_phy.c rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, pPhyReg 166 drivers/staging/rtl8192u/r819xU_phy.c rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadAddress, pPhyReg 169 drivers/staging/rtl8192u/r819xU_phy.c rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x0); pPhyReg 170 drivers/staging/rtl8192u/r819xU_phy.c rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x1); pPhyReg 176 drivers/staging/rtl8192u/r819xU_phy.c ret = rtl8192_QueryBBReg(dev, pPhyReg->rfLSSIReadBack, pPhyReg 184 drivers/staging/rtl8192u/r819xU_phy.c rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, pPhyReg 218 drivers/staging/rtl8192u/r819xU_phy.c BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[e_rfpath]; pPhyReg 225 drivers/staging/rtl8192u/r819xU_phy.c rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, pPhyReg 232 drivers/staging/rtl8192u/r819xU_phy.c rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, pPhyReg 249 drivers/staging/rtl8192u/r819xU_phy.c rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); pPhyReg 259 drivers/staging/rtl8192u/r819xU_phy.c rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, pPhyReg 132 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c struct bb_register_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; pPhyReg 173 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi|MaskforPhySet, bLSSIReadBackData); pPhyReg 178 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack|MaskforPhySet, bLSSIReadBackData); pPhyReg 238 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c struct bb_register_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; pPhyReg 257 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); pPhyReg 87 drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c struct bb_register_def *pPhyReg; pPhyReg 107 drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c pPhyReg = &pHalData->PHYRegDef[eRFPath]; pPhyReg 113 drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); pPhyReg 117 drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16); pPhyReg 122 drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1); pPhyReg 126 drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); pPhyReg 130 drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */ pPhyReg 133 drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */ pPhyReg 162 drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); pPhyReg 166 drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue);