p2gm0plbase        20 arch/mips/include/asm/txx9/tx4927pcic.h 	u32 p2gm0plbase;		/* +10 */
p2gm0plbase       284 arch/mips/pci/ops-tx4927.c 	__raw_writel(0, &pcicptr->p2gm0plbase);