ovsr              608 drivers/perf/arm_smmuv3_pmu.c 	u64 ovsr;
ovsr              611 drivers/perf/arm_smmuv3_pmu.c 	ovsr = readq(smmu_pmu->reloc_base + SMMU_PMCG_OVSSET0);
ovsr              612 drivers/perf/arm_smmuv3_pmu.c 	if (!ovsr)
ovsr              615 drivers/perf/arm_smmuv3_pmu.c 	writeq(ovsr, smmu_pmu->reloc_base + SMMU_PMCG_OVSCLR0);
ovsr              617 drivers/perf/arm_smmuv3_pmu.c 	for_each_set_bit(idx, (unsigned long *)&ovsr, smmu_pmu->num_counters) {
ovsr              329 drivers/perf/qcom_l2_pmu.c static inline bool cluster_pmu_has_overflowed(u32 ovsr)
ovsr              331 drivers/perf/qcom_l2_pmu.c 	return !!(ovsr & l2_counter_present_mask);
ovsr              334 drivers/perf/qcom_l2_pmu.c static inline bool cluster_pmu_counter_has_overflowed(u32 ovsr, u32 idx)
ovsr              336 drivers/perf/qcom_l2_pmu.c 	return !!(ovsr & idx_to_reg_bit(idx));
ovsr              431 drivers/perf/qcom_l2_pmu.c 	u32 ovsr;
ovsr              434 drivers/perf/qcom_l2_pmu.c 	ovsr = cluster_pmu_getreset_ovsr();
ovsr              435 drivers/perf/qcom_l2_pmu.c 	if (!cluster_pmu_has_overflowed(ovsr))
ovsr              445 drivers/perf/qcom_l2_pmu.c 		if (!cluster_pmu_counter_has_overflowed(ovsr, idx))