output_reg 258 drivers/gpu/drm/gma500/cdv_intel_dp.c uint32_t output_reg; output_reg 574 drivers/gpu/drm/gma500/cdv_intel_dp.c uint32_t output_reg = intel_dp->output_reg; output_reg 576 drivers/gpu/drm/gma500/cdv_intel_dp.c uint32_t ch_ctl = output_reg + 0x10; output_reg 1089 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, (intel_dp->DP | DP_PORT_EN)); output_reg 1175 drivers/gpu/drm/gma500/cdv_intel_dp.c uint32_t dp_reg = REG_READ(intel_dp->output_reg); output_reg 1394 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, dp_reg_value); output_reg 1395 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_READ(intel_dp->output_reg); output_reg 1440 drivers/gpu/drm/gma500/cdv_intel_dp.c if (intel_dp->output_reg == DP_B) output_reg 1516 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, reg); output_reg 1517 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_READ(intel_dp->output_reg); output_reg 1672 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, reg); output_reg 1673 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_READ(intel_dp->output_reg); output_reg 1685 drivers/gpu/drm/gma500/cdv_intel_dp.c if ((REG_READ(intel_dp->output_reg) & DP_PORT_EN) == 0) output_reg 1693 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE); output_reg 1695 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_READ(intel_dp->output_reg); output_reg 1699 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN); output_reg 1700 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_READ(intel_dp->output_reg); output_reg 1995 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_intel_dp_init(struct drm_device *dev, struct psb_intel_mode_device *mode_dev, int output_reg) output_reg 2015 drivers/gpu/drm/gma500/cdv_intel_dp.c if ((output_reg == DP_C) && cdv_intel_dpc_is_edp(dev)) output_reg 2035 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->output_reg = output_reg; output_reg 2047 drivers/gpu/drm/gma500/cdv_intel_dp.c switch (output_reg) { output_reg 262 drivers/gpu/drm/gma500/psb_intel_drv.h extern void cdv_intel_dp_init(struct drm_device *dev, struct psb_intel_mode_device *mode_dev, int output_reg); output_reg 4033 drivers/gpu/drm/i915/display/intel_ddi.c intel_dig_port->dp.output_reg = DDI_BUF_CTL(port); output_reg 4344 drivers/gpu/drm/i915/display/intel_ddi.c intel_dig_port->dp.output_reg = INVALID_MMIO_REG; output_reg 1148 drivers/gpu/drm/i915/display/intel_display_types.h i915_reg_t output_reg; output_reg 1411 drivers/gpu/drm/i915/display/intel_display_types.h return i915_mmio_reg_valid(enc_to_intel_dp(&encoder->base)->output_reg); output_reg 734 drivers/gpu/drm/i915/display/intel_dp.c if (WARN(I915_READ(intel_dp->output_reg) & DP_PORT_EN, output_reg 745 drivers/gpu/drm/i915/display/intel_dp.c DP = I915_READ(intel_dp->output_reg) & DP_DETECTED; output_reg 779 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, DP); output_reg 780 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); output_reg 782 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, DP | DP_PORT_EN); output_reg 783 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); output_reg 785 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN); output_reg 786 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); output_reg 2389 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP = I915_READ(intel_dp->output_reg) & DP_DETECTED; output_reg 2926 drivers/gpu/drm/i915/display/intel_dp.c bool cur_state = I915_READ(intel_dp->output_reg) & DP_PORT_EN; output_reg 3134 drivers/gpu/drm/i915/display/intel_dp.c ret = intel_dp_port_enabled(dev_priv, intel_dp->output_reg, output_reg 3156 drivers/gpu/drm/i915/display/intel_dp.c tmp = I915_READ(intel_dp->output_reg); output_reg 3406 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, intel_dp->DP); output_reg 3407 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); output_reg 3417 drivers/gpu/drm/i915/display/intel_dp.c u32 dp_reg = I915_READ(intel_dp->output_reg); output_reg 4014 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, intel_dp->DP); output_reg 4015 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); output_reg 4028 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, intel_dp->DP); output_reg 4029 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); output_reg 4072 drivers/gpu/drm/i915/display/intel_dp.c if (WARN_ON((I915_READ(intel_dp->output_reg) & DP_PORT_EN) == 0)) output_reg 4085 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, DP); output_reg 4086 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); output_reg 4089 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, DP); output_reg 4090 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); output_reg 4109 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, DP); output_reg 4110 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); output_reg 4113 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, DP); output_reg 4114 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); output_reg 6206 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_port_enabled(dev_priv, intel_dp->output_reg, output_reg 6221 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP = I915_READ(intel_dp->output_reg); output_reg 7164 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP = I915_READ(intel_dp->output_reg); output_reg 7256 drivers/gpu/drm/i915/display/intel_dp.c i915_reg_t output_reg, output_reg 7306 drivers/gpu/drm/i915/display/intel_dp.c intel_dig_port->dp.output_reg = output_reg; output_reg 41 drivers/gpu/drm/i915/display/intel_dp.h bool intel_dp_init(struct drm_i915_private *dev_priv, i915_reg_t output_reg, output_reg 3235 drivers/gpu/drm/i915/display/intel_hdmi.c intel_dig_port->dp.output_reg = INVALID_MMIO_REG; output_reg 699 drivers/iio/light/gp2ap020a00f.c unsigned int output_reg, int *val) output_reg 708 drivers/iio/light/gp2ap020a00f.c err = regmap_bulk_read(data->regmap, output_reg, reg_buf, 2);