output_bppdp4_lane_hbr 402 drivers/gpu/drm/amd/display/dc/calcs/calcs_logger.h DC_LOG_BANDWIDTH_CALCS(" [uint32_t] output_bppdp4_lane_hbr[%d]:%d", i, data->output_bppdp4_lane_hbr[i]); output_bppdp4_lane_hbr 2008 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->output_bppdp4_lane_hbr[k] = bw_def_na; output_bppdp4_lane_hbr 2014 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->output_bppdp4_lane_hbr[k] = bw_fixed_to_int(bw_mul(bw_div(bw_mul(bw_int_to_fixed(270), bw_int_to_fixed(4)), data->pixel_rate[k]), bw_int_to_fixed(8))); output_bppdp4_lane_hbr 378 drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h uint32_t output_bppdp4_lane_hbr[maximum_number_of_surfaces]; output_bppdp4_lane_hbr 425 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h float output_bppdp4_lane_hbr[number_of_planes_minus_one + 1];