out_fle 353 drivers/crypto/caam/caamalg_qi2.c struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; out_fle 556 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_format(out_fle, dpaa2_fl_single); out_fle 557 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, sg_dma_address(req->src)); out_fle 559 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_format(out_fle, dpaa2_fl_sg); out_fle 560 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, qm_sg_dma + out_fle 572 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_format(out_fle, dpaa2_fl_single); out_fle 573 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, sg_dma_address(req->dst)); out_fle 575 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_format(out_fle, dpaa2_fl_sg); out_fle 576 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, qm_sg_dma + qm_sg_index * out_fle 580 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_len(out_fle, out_len); out_fle 1121 drivers/crypto/caam/caamalg_qi2.c struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; out_fle 1248 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_len(out_fle, req->cryptlen + ivsize); out_fle 1253 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_format(out_fle, dpaa2_fl_sg); out_fle 1256 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, edesc->qm_sg_dma + out_fle 1259 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, edesc->qm_sg_dma + dst_sg_idx * out_fle 3173 drivers/crypto/caam/caamalg_qi2.c struct dpaa2_fl_entry *in_fle, *out_fle; out_fle 3180 drivers/crypto/caam/caamalg_qi2.c out_fle = &req_ctx->fd_flt[0]; out_fle 3216 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_format(out_fle, dpaa2_fl_single); out_fle 3217 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, key_dma); out_fle 3218 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_len(out_fle, digestsize); out_fle 3464 drivers/crypto/caam/caamalg_qi2.c struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; out_fle 3550 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_format(out_fle, dpaa2_fl_single); out_fle 3551 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, state->ctx_dma); out_fle 3552 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_len(out_fle, ctx->ctx_len); out_fle 3592 drivers/crypto/caam/caamalg_qi2.c struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; out_fle 3635 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_format(out_fle, dpaa2_fl_single); out_fle 3636 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, state->ctx_dma); out_fle 3637 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_len(out_fle, digestsize); out_fle 3663 drivers/crypto/caam/caamalg_qi2.c struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; out_fle 3729 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_format(out_fle, dpaa2_fl_single); out_fle 3730 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, state->ctx_dma); out_fle 3731 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_len(out_fle, digestsize); out_fle 3757 drivers/crypto/caam/caamalg_qi2.c struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; out_fle 3825 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_format(out_fle, dpaa2_fl_single); out_fle 3826 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, state->ctx_dma); out_fle 3827 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_len(out_fle, digestsize); out_fle 3852 drivers/crypto/caam/caamalg_qi2.c struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; out_fle 3897 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_format(out_fle, dpaa2_fl_single); out_fle 3898 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, state->ctx_dma); out_fle 3899 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_len(out_fle, digestsize); out_fle 3925 drivers/crypto/caam/caamalg_qi2.c struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; out_fle 4009 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_format(out_fle, dpaa2_fl_single); out_fle 4010 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, state->ctx_dma); out_fle 4011 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_len(out_fle, ctx->ctx_len); out_fle 4055 drivers/crypto/caam/caamalg_qi2.c struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; out_fle 4123 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_format(out_fle, dpaa2_fl_single); out_fle 4124 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, state->ctx_dma); out_fle 4125 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_len(out_fle, digestsize); out_fle 4151 drivers/crypto/caam/caamalg_qi2.c struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; out_fle 4237 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_format(out_fle, dpaa2_fl_single); out_fle 4238 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, state->ctx_dma); out_fle 4239 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_len(out_fle, ctx->ctx_len);