otg_timing       1234 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 		const struct dc_crtc_timing *otg_timing)
otg_timing       1239 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	if (tg == NULL || otg_timing == NULL)
otg_timing       1254 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	if (otg_timing->h_total != hw_crtc_timing.h_total)
otg_timing       1257 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	if (otg_timing->h_border_left != hw_crtc_timing.h_border_left)
otg_timing       1260 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	if (otg_timing->h_addressable != hw_crtc_timing.h_addressable)
otg_timing       1263 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	if (otg_timing->h_border_right != hw_crtc_timing.h_border_right)
otg_timing       1266 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	if (otg_timing->h_front_porch != hw_crtc_timing.h_front_porch)
otg_timing       1269 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	if (otg_timing->h_sync_width != hw_crtc_timing.h_sync_width)
otg_timing       1272 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	if (otg_timing->v_total != hw_crtc_timing.v_total)
otg_timing       1275 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	if (otg_timing->v_border_top != hw_crtc_timing.v_border_top)
otg_timing       1278 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	if (otg_timing->v_addressable != hw_crtc_timing.v_addressable)
otg_timing       1281 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	if (otg_timing->v_border_bottom != hw_crtc_timing.v_border_bottom)
otg_timing       1284 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	if (otg_timing->v_sync_width != hw_crtc_timing.v_sync_width)
otg_timing        552 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h 	const struct dc_crtc_timing *otg_timing);
otg_timing        176 drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h 			const struct dc_crtc_timing *otg_timing);