POD                32 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	unsigned long POD;
POD               246 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 	pllreg |= HIBMC_FIELD(HIBMC_PLL_CTRL_POD, pll.POD);
POD                37 drivers/staging/sm750fb/ddk750_chip.c 	unsigned int M, N, OD, POD;
POD                46 drivers/staging/sm750fb/ddk750_chip.c 	POD = (pll_reg & PLL_CTRL_POD_MASK) >> PLL_CTRL_POD_SHIFT;
POD                48 drivers/staging/sm750fb/ddk750_chip.c 	return DEFAULT_INPUT_CLOCK * M / N / BIT(OD) / BIT(POD);
POD               373 drivers/staging/sm750fb/ddk750_chip.c 					pll->POD = 0;
POD               375 drivers/staging/sm750fb/ddk750_chip.c 						pll->POD = d - max_OD;
POD               376 drivers/staging/sm750fb/ddk750_chip.c 					pll->OD = d - pll->POD;
POD               389 drivers/staging/sm750fb/ddk750_chip.c 	unsigned int POD = pPLL->POD;
POD               403 drivers/staging/sm750fb/ddk750_chip.c 		((POD << PLL_CTRL_POD_SHIFT) & PLL_CTRL_POD_MASK) |
POD                50 drivers/staging/sm750fb/ddk750_chip.h 	unsigned long POD;