optimal 116 drivers/cpufreq/freq_table.c struct cpufreq_frequency_table optimal = { optimal 138 drivers/cpufreq/freq_table.c optimal.frequency = ~0; optimal 148 drivers/cpufreq/freq_table.c optimal.driver_data = i; optimal 154 drivers/cpufreq/freq_table.c if (freq >= optimal.frequency) { optimal 155 drivers/cpufreq/freq_table.c optimal.frequency = freq; optimal 156 drivers/cpufreq/freq_table.c optimal.driver_data = i; optimal 167 drivers/cpufreq/freq_table.c if (freq <= optimal.frequency) { optimal 168 drivers/cpufreq/freq_table.c optimal.frequency = freq; optimal 169 drivers/cpufreq/freq_table.c optimal.driver_data = i; optimal 180 drivers/cpufreq/freq_table.c if (diff < optimal.frequency || optimal 181 drivers/cpufreq/freq_table.c (diff == optimal.frequency && optimal 182 drivers/cpufreq/freq_table.c freq > table[optimal.driver_data].frequency)) { optimal 183 drivers/cpufreq/freq_table.c optimal.frequency = diff; optimal 184 drivers/cpufreq/freq_table.c optimal.driver_data = i; optimal 189 drivers/cpufreq/freq_table.c if (optimal.driver_data > i) { optimal 197 drivers/cpufreq/freq_table.c index = optimal.driver_data; optimal 12899 drivers/gpu/drm/i915/display/intel_display.c sw_wm = &new_crtc_state->wm.skl.optimal; optimal 696 drivers/gpu/drm/i915/display/intel_display_types.h struct intel_pipe_wm optimal; optimal 701 drivers/gpu/drm/i915/display/intel_display_types.h struct skl_pipe_wm optimal; optimal 713 drivers/gpu/drm/i915/display/intel_display_types.h struct vlv_wm_state optimal; optimal 724 drivers/gpu/drm/i915/display/intel_display_types.h struct g4x_wm_state optimal; optimal 1337 drivers/gpu/drm/i915/intel_pm.c struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal; optimal 1425 drivers/gpu/drm/i915/intel_pm.c const struct g4x_wm_state *optimal = &new_crtc_state->wm.g4x.optimal; optimal 1430 drivers/gpu/drm/i915/intel_pm.c const struct g4x_wm_state *active = &old_crtc_state->wm.g4x.optimal; optimal 1434 drivers/gpu/drm/i915/intel_pm.c *intermediate = *optimal; optimal 1441 drivers/gpu/drm/i915/intel_pm.c intermediate->cxsr = optimal->cxsr && active->cxsr && optimal 1443 drivers/gpu/drm/i915/intel_pm.c intermediate->hpll_en = optimal->hpll_en && active->hpll_en && optimal 1445 drivers/gpu/drm/i915/intel_pm.c intermediate->fbc_en = optimal->fbc_en && active->fbc_en; optimal 1449 drivers/gpu/drm/i915/intel_pm.c max(optimal->wm.plane[plane_id], optimal 1456 drivers/gpu/drm/i915/intel_pm.c intermediate->sr.plane = max(optimal->sr.plane, optimal 1458 drivers/gpu/drm/i915/intel_pm.c intermediate->sr.cursor = max(optimal->sr.cursor, optimal 1460 drivers/gpu/drm/i915/intel_pm.c intermediate->sr.fbc = max(optimal->sr.fbc, optimal 1463 drivers/gpu/drm/i915/intel_pm.c intermediate->hpll.plane = max(optimal->hpll.plane, optimal 1465 drivers/gpu/drm/i915/intel_pm.c intermediate->hpll.cursor = max(optimal->hpll.cursor, optimal 1467 drivers/gpu/drm/i915/intel_pm.c intermediate->hpll.fbc = max(optimal->hpll.fbc, optimal 1491 drivers/gpu/drm/i915/intel_pm.c if (memcmp(intermediate, optimal, sizeof(*intermediate)) != 0) optimal 1584 drivers/gpu/drm/i915/intel_pm.c crtc->wm.active.g4x = crtc_state->wm.g4x.optimal; optimal 1856 drivers/gpu/drm/i915/intel_pm.c struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal; optimal 2058 drivers/gpu/drm/i915/intel_pm.c const struct vlv_wm_state *optimal = &new_crtc_state->wm.vlv.optimal; optimal 2063 drivers/gpu/drm/i915/intel_pm.c const struct vlv_wm_state *active = &old_crtc_state->wm.vlv.optimal; optimal 2067 drivers/gpu/drm/i915/intel_pm.c *intermediate = *optimal; optimal 2073 drivers/gpu/drm/i915/intel_pm.c intermediate->num_levels = min(optimal->num_levels, active->num_levels); optimal 2074 drivers/gpu/drm/i915/intel_pm.c intermediate->cxsr = optimal->cxsr && active->cxsr && optimal 2082 drivers/gpu/drm/i915/intel_pm.c min(optimal->wm[level].plane[plane_id], optimal 2086 drivers/gpu/drm/i915/intel_pm.c intermediate->sr[level].plane = min(optimal->sr[level].plane, optimal 2088 drivers/gpu/drm/i915/intel_pm.c intermediate->sr[level].cursor = min(optimal->sr[level].cursor, optimal 2099 drivers/gpu/drm/i915/intel_pm.c if (memcmp(intermediate, optimal, sizeof(*intermediate)) != 0) optimal 2203 drivers/gpu/drm/i915/intel_pm.c crtc->wm.active.vlv = crtc_state->wm.vlv.optimal; optimal 3128 drivers/gpu/drm/i915/intel_pm.c pipe_wm = &crtc_state->wm.ilk.optimal; optimal 3205 drivers/gpu/drm/i915/intel_pm.c const struct intel_pipe_wm *b = &oldstate->wm.ilk.optimal; optimal 3213 drivers/gpu/drm/i915/intel_pm.c *a = newstate->wm.ilk.optimal; optimal 3246 drivers/gpu/drm/i915/intel_pm.c if (memcmp(a, &newstate->wm.ilk.optimal, sizeof(*a)) != 0) optimal 3792 drivers/gpu/drm/i915/intel_pm.c &crtc_state->wm.skl.optimal.planes[plane->id]; optimal 4400 drivers/gpu/drm/i915/intel_pm.c &crtc_state->wm.skl.optimal.planes[plane_id]; optimal 4435 drivers/gpu/drm/i915/intel_pm.c &crtc_state->wm.skl.optimal.planes[plane_id]; optimal 4507 drivers/gpu/drm/i915/intel_pm.c &crtc_state->wm.skl.optimal.planes[plane_id]; optimal 4544 drivers/gpu/drm/i915/intel_pm.c &crtc_state->wm.skl.optimal.planes[plane_id]; optimal 4990 drivers/gpu/drm/i915/intel_pm.c struct skl_plane_wm *wm = &crtc_state->wm.skl.optimal.planes[plane_id]; optimal 5009 drivers/gpu/drm/i915/intel_pm.c struct skl_plane_wm *wm = &crtc_state->wm.skl.optimal.planes[plane_id]; optimal 5092 drivers/gpu/drm/i915/intel_pm.c struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal; optimal 5155 drivers/gpu/drm/i915/intel_pm.c &crtc_state->wm.skl.optimal.planes[plane_id]; optimal 5191 drivers/gpu/drm/i915/intel_pm.c &crtc_state->wm.skl.optimal.planes[plane_id]; optimal 5357 drivers/gpu/drm/i915/intel_pm.c old_pipe_wm = &old_crtc_state->wm.skl.optimal; optimal 5358 drivers/gpu/drm/i915/intel_pm.c new_pipe_wm = &new_crtc_state->wm.skl.optimal; optimal 5586 drivers/gpu/drm/i915/intel_pm.c &old_crtc_state->wm.skl.optimal.planes[plane_id], optimal 5587 drivers/gpu/drm/i915/intel_pm.c &new_crtc_state->wm.skl.optimal.planes[plane_id])) optimal 5634 drivers/gpu/drm/i915/intel_pm.c &old_crtc_state->wm.skl.optimal, optimal 5635 drivers/gpu/drm/i915/intel_pm.c &new_crtc_state->wm.skl.optimal)) optimal 5653 drivers/gpu/drm/i915/intel_pm.c struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal; optimal 5753 drivers/gpu/drm/i915/intel_pm.c crtc->wm.active.ilk = crtc_state->wm.ilk.optimal; optimal 5816 drivers/gpu/drm/i915/intel_pm.c skl_pipe_wm_get_hw_state(crtc, &crtc_state->wm.skl.optimal); optimal 5834 drivers/gpu/drm/i915/intel_pm.c struct intel_pipe_wm *active = &crtc_state->wm.ilk.optimal; optimal 6052 drivers/gpu/drm/i915/intel_pm.c crtc_state->wm.g4x.optimal = *active; optimal 6084 drivers/gpu/drm/i915/intel_pm.c struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal; optimal 6117 drivers/gpu/drm/i915/intel_pm.c crtc_state->wm.g4x.optimal; optimal 6118 drivers/gpu/drm/i915/intel_pm.c crtc->wm.active.g4x = crtc_state->wm.g4x.optimal; optimal 6208 drivers/gpu/drm/i915/intel_pm.c crtc_state->wm.vlv.optimal = *active; optimal 6237 drivers/gpu/drm/i915/intel_pm.c struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal; optimal 6263 drivers/gpu/drm/i915/intel_pm.c crtc_state->wm.vlv.optimal; optimal 6264 drivers/gpu/drm/i915/intel_pm.c crtc->wm.active.vlv = crtc_state->wm.vlv.optimal;