opt_param_mask    160 drivers/infiniband/hw/mthca/mthca_qp.c 	__be32 opt_param_mask;
opt_param_mask    587 drivers/infiniband/hw/mthca/mthca_qp.c 		qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_PM_STATE);
opt_param_mask    642 drivers/infiniband/hw/mthca/mthca_qp.c 			qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_PORT_NUM);
opt_param_mask    649 drivers/infiniband/hw/mthca/mthca_qp.c 		qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_PKEY_INDEX);
opt_param_mask    655 drivers/infiniband/hw/mthca/mthca_qp.c 		qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_RNR_RETRY |
opt_param_mask    664 drivers/infiniband/hw/mthca/mthca_qp.c 		qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_PRIMARY_ADDR_PATH);
opt_param_mask    676 drivers/infiniband/hw/mthca/mthca_qp.c 		qp_param->opt_param_mask |=
opt_param_mask    682 drivers/infiniband/hw/mthca/mthca_qp.c 		qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_ACK_TIMEOUT);
opt_param_mask    705 drivers/infiniband/hw/mthca/mthca_qp.c 		qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_ALT_ADDR_PATH);
opt_param_mask    719 drivers/infiniband/hw/mthca/mthca_qp.c 		qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_RETRY_COUNT);
opt_param_mask    730 drivers/infiniband/hw/mthca/mthca_qp.c 		qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_SRA_MAX);
opt_param_mask    747 drivers/infiniband/hw/mthca/mthca_qp.c 		qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_RRA_MAX);
opt_param_mask    752 drivers/infiniband/hw/mthca/mthca_qp.c 		qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_RWE |
opt_param_mask    764 drivers/infiniband/hw/mthca/mthca_qp.c 		qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_RNR_TIMEOUT);
opt_param_mask    781 drivers/infiniband/hw/mthca/mthca_qp.c 		qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_Q_KEY);
opt_param_mask    424 drivers/net/ethernet/mellanox/mlx5/core/qp.c 				u32 opt_param_mask, void *qpc,
opt_param_mask    443 drivers/net/ethernet/mellanox/mlx5/core/qp.c 		MLX5_SET(typ##_in, in, opt_param_mask, _opt_p);                \
opt_param_mask    466 drivers/net/ethernet/mellanox/mlx5/core/qp.c 				  opt_param_mask, qpc, uid);
opt_param_mask    472 drivers/net/ethernet/mellanox/mlx5/core/qp.c 				  opt_param_mask, qpc, uid);
opt_param_mask    478 drivers/net/ethernet/mellanox/mlx5/core/qp.c 				  opt_param_mask, qpc, uid);
opt_param_mask    484 drivers/net/ethernet/mellanox/mlx5/core/qp.c 				  opt_param_mask, qpc, uid);
opt_param_mask    490 drivers/net/ethernet/mellanox/mlx5/core/qp.c 				  opt_param_mask, qpc, uid);
opt_param_mask    496 drivers/net/ethernet/mellanox/mlx5/core/qp.c 				  opt_param_mask, qpc, uid);
opt_param_mask    507 drivers/net/ethernet/mellanox/mlx5/core/qp.c 			u32 opt_param_mask, void *qpc,
opt_param_mask    514 drivers/net/ethernet/mellanox/mlx5/core/qp.c 				   opt_param_mask, qpc, &mbox, qp->uid);
opt_param_mask   3803 include/linux/mlx5/mlx5_ifc.h 	u8         opt_param_mask[0x20];
opt_param_mask   3833 include/linux/mlx5/mlx5_ifc.h 	u8         opt_param_mask[0x20];
opt_param_mask   4038 include/linux/mlx5/mlx5_ifc.h 	u8         opt_param_mask[0x20];
opt_param_mask   4068 include/linux/mlx5/mlx5_ifc.h 	u8         opt_param_mask[0x20];
opt_param_mask   4098 include/linux/mlx5/mlx5_ifc.h 	u8         opt_param_mask[0x20];
opt_param_mask   4624 include/linux/mlx5/mlx5_ifc.h 	u8         opt_param_mask[0x20];
opt_param_mask   6371 include/linux/mlx5/mlx5_ifc.h 	u8         opt_param_mask[0x20];
opt_param_mask   6401 include/linux/mlx5/mlx5_ifc.h 	u8         opt_param_mask[0x20];
opt_param_mask   7481 include/linux/mlx5/mlx5_ifc.h 	u8         opt_param_mask[0x20];
opt_param_mask    570 include/linux/mlx5/qp.h 			u32 opt_param_mask, void *qpc,