oppn10 33 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c (oppn10->regs->reg) oppn10 37 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c oppn10->opp_shift->field_name, oppn10->opp_mask->field_name oppn10 40 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c oppn10->base.ctx oppn10 52 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c struct dcn10_opp *oppn10, oppn10 62 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c struct dcn10_opp *oppn10, oppn10 144 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c struct dcn10_opp *oppn10 = TO_DCN10_OPP(opp); oppn10 146 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c opp1_set_truncation(oppn10, params); oppn10 147 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c opp1_set_spatial_dither(oppn10, params); oppn10 161 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c struct dcn10_opp *oppn10, oppn10 191 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c struct dcn10_opp *oppn10, oppn10 234 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c struct dcn10_opp *oppn10 = TO_DCN10_OPP(opp); oppn10 272 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c struct dcn10_opp *oppn10 = TO_DCN10_OPP(opp); oppn10 274 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c opp1_set_clamping(oppn10, params); oppn10 275 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c opp1_set_pixel_encoding(oppn10, params); oppn10 283 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c struct dcn10_opp *oppn10 = TO_DCN10_OPP(opp); oppn10 306 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c struct dcn10_opp *oppn10 = TO_DCN10_OPP(opp); oppn10 349 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c struct dcn10_opp *oppn10 = TO_DCN10_OPP(opp); oppn10 379 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c struct dcn10_opp *oppn10 = TO_DCN10_OPP(opp); oppn10 407 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c void dcn10_opp_construct(struct dcn10_opp *oppn10, oppn10 415 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c oppn10->base.ctx = ctx; oppn10 416 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c oppn10->base.inst = inst; oppn10 417 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c oppn10->base.funcs = &dcn10_opp_funcs; oppn10 419 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c oppn10->regs = regs; oppn10 420 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c oppn10->opp_shift = opp_shift; oppn10 421 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c oppn10->opp_mask = opp_mask; oppn10 156 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h void dcn10_opp_construct(struct dcn10_opp *oppn10,