opad 47 crypto/hmac.c char *opad = ipad + ss; opad 48 crypto/hmac.c struct hmac_ctx *ctx = align_ptr(opad + ss, opad 68 crypto/hmac.c memcpy(opad, ipad, bs); opad 72 crypto/hmac.c opad[i] ^= HMAC_OPAD_VALUE; opad 79 crypto/hmac.c crypto_shash_update(shash, opad, bs) ?: opad 80 crypto/hmac.c crypto_shash_export(shash, opad); opad 118 crypto/hmac.c char *opad = crypto_shash_ctx_aligned(parent) + ss; opad 122 crypto/hmac.c crypto_shash_import(desc, opad) ?: opad 133 crypto/hmac.c char *opad = crypto_shash_ctx_aligned(parent) + ss; opad 137 crypto/hmac.c crypto_shash_import(desc, opad) ?: opad 1732 drivers/crypto/atmel-sha.c u32 opad[SHA512_BLOCK_SIZE / sizeof(u32)]; opad 1839 drivers/crypto/atmel-sha.c memcpy(hmac->opad, hmac->ipad, bs); opad 1842 drivers/crypto/atmel-sha.c hmac->opad[i] ^= 0x5c5c5c5c; opad 1861 drivers/crypto/atmel-sha.c return atmel_sha_cpu_hash(dd, hmac->opad, bs, false, opad 1875 drivers/crypto/atmel-sha.c hmac->opad[i] = atmel_sha_read(dd, SHA_REG_DIGEST(i)); opad 1974 drivers/crypto/atmel-sha.c atmel_sha_write(dd, SHA_REG_DIN(i), hmac->opad[i]); opad 2038 drivers/crypto/atmel-sha.c atmel_sha_write(dd, SHA_REG_DIN(i), hmac->opad[i]); opad 2434 drivers/crypto/atmel-sha.c atmel_sha_write(dd, SHA_REG_DIN(i), hmac->opad[i]); opad 943 drivers/crypto/bcm/cipher.c rc = do_shash("md5", req->result, ctx->opad, blocksize, opad 947 drivers/crypto/bcm/cipher.c rc = do_shash("sha1", req->result, ctx->opad, blocksize, opad 951 drivers/crypto/bcm/cipher.c rc = do_shash("sha224", req->result, ctx->opad, blocksize, opad 955 drivers/crypto/bcm/cipher.c rc = do_shash("sha256", req->result, ctx->opad, blocksize, opad 959 drivers/crypto/bcm/cipher.c rc = do_shash("sha384", req->result, ctx->opad, blocksize, opad 963 drivers/crypto/bcm/cipher.c rc = do_shash("sha512", req->result, ctx->opad, blocksize, opad 2463 drivers/crypto/bcm/cipher.c memcpy(ctx->opad, ctx->ipad, blocksize); opad 2467 drivers/crypto/bcm/cipher.c ctx->opad[index] ^= HMAC_OPAD_VALUE; opad 2471 drivers/crypto/bcm/cipher.c flow_dump(" opad: ", ctx->opad, blocksize); opad 213 drivers/crypto/bcm/cipher.h u8 opad[MAX_HASH_BLOCK_SIZE]; opad 90 drivers/crypto/cavium/cpt/cptvf_algs.h u8 opad[64]; /* or OPAD */ opad 145 drivers/crypto/cavium/nitrox/nitrox_req.h u8 opad[64]; opad 160 drivers/crypto/ccp/ccp-crypto-sha.c rctx->cmd.u.sha.opad = ctx->u.sha.key_len ? opad 308 drivers/crypto/ccp/ccp-crypto-sha.c ctx->u.sha.opad[i] = ctx->u.sha.key[i] ^ HMAC_OPAD_VALUE; opad 311 drivers/crypto/ccp/ccp-crypto-sha.c sg_init_one(&ctx->u.sha.opad_sg, ctx->u.sha.opad, block_size); opad 191 drivers/crypto/ccp/ccp-crypto.h u8 opad[MAX_SHA_BLOCK_SIZE]; opad 1742 drivers/crypto/ccp/ccp-ops.c if (sha->final && sha->opad) { opad 1760 drivers/crypto/ccp/ccp-ops.c scatterwalk_map_and_copy(hmac_buf, sha->opad, 0, block_size, 0); opad 1791 drivers/crypto/ccp/ccp-ops.c hmac_cmd.u.sha.opad = NULL; opad 1545 drivers/crypto/chelsio/chcr_algo.c hmacctx->opad, param->alg_prm.result_size); opad 2124 drivers/crypto/chelsio/chcr_algo.c memcpy(hmacctx->opad, hmacctx->ipad, bs); opad 2128 drivers/crypto/chelsio/chcr_algo.c *((unsigned int *)(&hmacctx->opad) + i) ^= OPAD_DATA; opad 2142 drivers/crypto/chelsio/chcr_algo.c err = chcr_compute_partial_hash(shash, hmacctx->opad, opad 2143 drivers/crypto/chelsio/chcr_algo.c hmacctx->opad, digestsize); opad 2146 drivers/crypto/chelsio/chcr_algo.c chcr_change_order(hmacctx->opad, updated_digestsize); opad 178 drivers/crypto/chelsio/chcr_algo.h #define FILL_SEC_CPL_SCMD0_SEQNO(ctrl, seq, cmode, amode, opad, size) \ opad 187 drivers/crypto/chelsio/chcr_algo.h SCMD_HMAC_CTRL_V((opad)) | \ opad 203 drivers/crypto/chelsio/chcr_algo.h #define FILL_KEY_CTX_HDR(ck_size, mk_size, d_ck, opad, ctx_len) \ opad 208 drivers/crypto/chelsio/chcr_algo.h KEY_CONTEXT_OPAD_PRESENT_V((opad)) | \ opad 212 drivers/crypto/chelsio/chcr_algo.h #define FILL_KEY_CRX_HDR(ck_size, mk_size, d_ck, opad, ctx_len) \ opad 242 drivers/crypto/chelsio/chcr_crypto.h u8 opad[CHCR_HASH_MAX_BLOCK_SIZE_128]; opad 55 drivers/crypto/inside-secure/safexcel_cipher.c u32 opad[SHA512_DIGEST_SIZE / sizeof(u32)]; opad 387 drivers/crypto/inside-secure/safexcel_cipher.c memcmp(ctx->opad, ostate.state, ctx->state_sz))) opad 395 drivers/crypto/inside-secure/safexcel_cipher.c memcpy(ctx->opad, &ostate.state, ctx->state_sz); opad 586 drivers/crypto/inside-secure/safexcel_cipher.c ctx->state_sz) / sizeof(u32), ctx->opad, opad 24 drivers/crypto/inside-secure/safexcel_hash.c u32 opad[SHA512_DIGEST_SIZE / sizeof(u32)]; opad 157 drivers/crypto/inside-secure/safexcel_hash.c ctx->opad, req->state_sz); opad 226 drivers/crypto/inside-secure/safexcel_hash.c memcpy(sreq->state, ctx->opad, sreq->state_sz); opad 604 drivers/crypto/inside-secure/safexcel_hash.c ctx->opad, req->state_sz)))) opad 926 drivers/crypto/inside-secure/safexcel_hash.c unsigned int keylen, u8 *ipad, u8 *opad) opad 963 drivers/crypto/inside-secure/safexcel_hash.c memcpy(opad, ipad, blocksize); opad 967 drivers/crypto/inside-secure/safexcel_hash.c opad[i] ^= HMAC_OPAD_VALUE; opad 1012 drivers/crypto/inside-secure/safexcel_hash.c u8 *ipad, *opad; opad 1034 drivers/crypto/inside-secure/safexcel_hash.c opad = ipad + blocksize; opad 1036 drivers/crypto/inside-secure/safexcel_hash.c ret = safexcel_hmac_init_pad(areq, blocksize, key, keylen, ipad, opad); opad 1044 drivers/crypto/inside-secure/safexcel_hash.c ret = safexcel_hmac_init_iv(areq, blocksize, opad, ostate); opad 1071 drivers/crypto/inside-secure/safexcel_hash.c memcmp(ctx->opad, ostate.state, state_sz))) opad 1075 drivers/crypto/inside-secure/safexcel_hash.c memcpy(ctx->opad, &ostate.state, state_sz); opad 1121 drivers/crypto/marvell/hash.c u8 *ipad, u8 *opad, opad 1160 drivers/crypto/marvell/hash.c memcpy(opad, ipad, blocksize); opad 1164 drivers/crypto/marvell/hash.c opad[i] ^= HMAC_OPAD_VALUE; opad 1178 drivers/crypto/marvell/hash.c u8 *opad; opad 1201 drivers/crypto/marvell/hash.c opad = ipad + blocksize; opad 1203 drivers/crypto/marvell/hash.c ret = mv_cesa_ahmac_pad_init(req, key, keylen, ipad, opad, blocksize); opad 1211 drivers/crypto/marvell/hash.c ret = mv_cesa_ahmac_iv_state_init(req, opad, ostate, blocksize); opad 101 drivers/crypto/mediatek/mtk-sha.c u8 opad[SHA512_BLOCK_SIZE] __aligned(sizeof(u32)); opad 367 drivers/crypto/mediatek/mtk-sha.c crypto_shash_update(shash, bctx->opad, ctx->bs) ?: opad 822 drivers/crypto/mediatek/mtk-sha.c memcpy(bctx->opad, bctx->ipad, bs); opad 826 drivers/crypto/mediatek/mtk-sha.c bctx->opad[i] ^= HMAC_OPAD_VALUE; opad 164 drivers/crypto/omap-sham.c u8 opad[SHA512_BLOCK_SIZE] OMAP_ALIGNED; opad 306 drivers/crypto/omap-sham.c u32 *opad = (u32 *)bctx->opad; opad 310 drivers/crypto/omap-sham.c opad[i] = omap_sham_read(dd, opad 314 drivers/crypto/omap-sham.c opad[i]); opad 1057 drivers/crypto/omap-sham.c crypto_shash_update(shash, bctx->opad, bs) ?: opad 1338 drivers/crypto/omap-sham.c memcpy(bctx->opad, bctx->ipad, bs); opad 1342 drivers/crypto/omap-sham.c bctx->opad[i] ^= HMAC_OPAD_VALUE; opad 122 drivers/crypto/qat/qat_common/qat_algs.c char opad[SHA512_BLOCK_SIZE]; opad 164 drivers/crypto/qat/qat_common/qat_algs.c memset(ctx->opad, 0, block_size); opad 173 drivers/crypto/qat/qat_common/qat_algs.c memcpy(ctx->opad, ctx->ipad, digest_size); opad 176 drivers/crypto/qat/qat_common/qat_algs.c memcpy(ctx->opad, auth_key, auth_keylen); opad 181 drivers/crypto/qat/qat_common/qat_algs.c char *opad_ptr = ctx->opad + i; opad 221 drivers/crypto/qat/qat_common/qat_algs.c if (crypto_shash_update(shash, ctx->opad, block_size)) opad 254 drivers/crypto/qat/qat_common/qat_algs.c memzero_explicit(ctx->opad, block_size); opad 293 include/linux/ccp.h struct scatterlist *opad;