op2               361 arch/arc/include/asm/atomic.h #define ATOMIC64_OP(op, op1, op2)					\
op2               370 arch/arc/include/asm/atomic.h 	"	" #op2 " %H0, %H0, %H2	\n"				\
op2               378 arch/arc/include/asm/atomic.h #define ATOMIC64_OP_RETURN(op, op1, op2)		        	\
op2               389 arch/arc/include/asm/atomic.h 	"	" #op2 " %H0, %H0, %H2	\n"				\
op2               401 arch/arc/include/asm/atomic.h #define ATOMIC64_FETCH_OP(op, op1, op2)		        		\
op2               412 arch/arc/include/asm/atomic.h 	"	" #op2 " %H1, %H0, %H3	\n"				\
op2               424 arch/arc/include/asm/atomic.h #define ATOMIC64_OPS(op, op1, op2)					\
op2               425 arch/arc/include/asm/atomic.h 	ATOMIC64_OP(op, op1, op2)					\
op2               426 arch/arc/include/asm/atomic.h 	ATOMIC64_OP_RETURN(op, op1, op2)				\
op2               427 arch/arc/include/asm/atomic.h 	ATOMIC64_FETCH_OP(op, op1, op2)
op2               306 arch/arm/include/asm/atomic.h #define ATOMIC64_OP(op, op1, op2)					\
op2               316 arch/arm/include/asm/atomic.h "	" #op2 " %R0, %R0, %R4\n"					\
op2               325 arch/arm/include/asm/atomic.h #define ATOMIC64_OP_RETURN(op, op1, op2)				\
op2               337 arch/arm/include/asm/atomic.h "	" #op2 " %R0, %R0, %R4\n"					\
op2               348 arch/arm/include/asm/atomic.h #define ATOMIC64_FETCH_OP(op, op1, op2)					\
op2               360 arch/arm/include/asm/atomic.h "	" #op2 " %R1, %R0, %R5\n"					\
op2               371 arch/arm/include/asm/atomic.h #define ATOMIC64_OPS(op, op1, op2)					\
op2               372 arch/arm/include/asm/atomic.h 	ATOMIC64_OP(op, op1, op2)					\
op2               373 arch/arm/include/asm/atomic.h 	ATOMIC64_OP_RETURN(op, op1, op2)				\
op2               374 arch/arm/include/asm/atomic.h 	ATOMIC64_FETCH_OP(op, op1, op2)
op2               385 arch/arm/include/asm/atomic.h #define ATOMIC64_OPS(op, op1, op2)					\
op2               386 arch/arm/include/asm/atomic.h 	ATOMIC64_OP(op, op1, op2)					\
op2               387 arch/arm/include/asm/atomic.h 	ATOMIC64_FETCH_OP(op, op1, op2)
op2                17 arch/arm/include/asm/hardware/cp14.h #define MRC14(op1, crn, crm, op2)					\
op2                20 arch/arm/include/asm/hardware/cp14.h asm volatile("mrc p14, "#op1", %0, "#crn", "#crm", "#op2 : "=r" (val));	\
op2                24 arch/arm/include/asm/hardware/cp14.h #define MCR14(val, op1, crn, crm, op2)					\
op2                26 arch/arm/include/asm/hardware/cp14.h asm volatile("mcr p14, "#op1", %0, "#crn", "#crm", "#op2 : : "r" (val));\
op2               165 arch/arm/include/uapi/asm/kvm.h #define __ARM_CP15_REG(op1,crn,crm,op2) \
op2               170 arch/arm/include/uapi/asm/kvm.h 	ARM_CP15_REG_SHIFT_MASK(op2, 32_OPC2))
op2               800 arch/arm/kvm/coproc.c #define FUNCTION_FOR32(crn, crm, op1, op2, name)			\
op2               809 arch/arm/kvm/coproc.c 			     ", " __stringify(op2) "\n" : "=r" (val));	\
op2               175 arch/arm64/include/asm/esr.h #define ESR_ELx_SYS64_ISS_SYS_VAL(op0, op1, op2, crn, crm) \
op2               178 arch/arm64/include/asm/esr.h 					 ((op2) << ESR_ELx_SYS64_ISS_OP2_SHIFT) | \
op2               284 arch/arm64/include/asm/esr.h #define ESR_ELx_CP15_32_ISS_SYS_VAL(op1, op2, crn, crm) \
op2               286 arch/arm64/include/asm/esr.h 					 ((op2) << ESR_ELx_CP15_32_ISS_OP2_SHIFT) | \
op2                36 arch/arm64/include/asm/sysreg.h #define sys_reg(op0, op1, crn, crm, op2) \
op2                39 arch/arm64/include/asm/sysreg.h 	 ((op2) << Op2_shift))
op2                88 arch/arm64/include/asm/sysreg.h #define pstate_field(op1, op2)		((op1) << Op1_shift | (op2) << Op2_shift)
op2                99 arch/arm64/include/asm/sysreg.h #define __SYS_BARRIER_INSN(CRm, op2, Rt) \
op2               100 arch/arm64/include/asm/sysreg.h 	__emit_inst(0xd5000000 | sys_insn(0, 3, 3, (CRm), (op2)) | ((Rt) & 0x1f))
op2               207 arch/arm64/include/uapi/asm/kvm.h #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \
op2               213 arch/arm64/include/uapi/asm/kvm.h 	ARM64_SYS_REG_SHIFT_MASK(op2, OP2))
op2              1337 arch/arm64/kvm/sys_regs.c #define ID_UNALLOCATED(crm, op2) {			\
op2              1338 arch/arm64/kvm/sys_regs.c 	Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2),	\
op2                28 arch/powerpc/math-emu/math.c #define FLOATFUNC(x)	static inline int x(void *op1, void *op2, void *op3, \
op2               228 arch/powerpc/math-emu/math.c 	void *op0 = 0, *op1 = 0, *op2 = 0, *op3 = 0;
op2               334 arch/powerpc/math-emu/math.c 		op2 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
op2               340 arch/powerpc/math-emu/math.c 		op2 = (void *)&current->thread.TS_FPR((insn >>  6) & 0x1f);
op2               346 arch/powerpc/math-emu/math.c 		op2 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
op2               400 arch/powerpc/math-emu/math.c 		op2 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
op2               407 arch/powerpc/math-emu/math.c 		op2 = (void *)((insn >> 18) & 0x7);
op2               435 arch/powerpc/math-emu/math.c 	eflag = func(op0, op1, op2, op3);
op2                66 arch/s390/include/asm/percpu.h #define arch_this_cpu_add(pcp, val, op1, op2, szcast)			\
op2                76 arch/s390/include/asm/percpu.h 			op2 "   %[ptr__],%[val__]\n"			\
op2                91 arch/s390/kvm/priv.c 	u64 op2;
op2                98 arch/s390/kvm/priv.c 	op2 = kvm_s390_get_base_disp_s(vcpu, &ar);
op2                99 arch/s390/kvm/priv.c 	if (op2 & 7)	/* Operand must be on a doubleword boundary */
op2               101 arch/s390/kvm/priv.c 	rc = read_guest(vcpu, op2, ar, &gtod.tod, sizeof(gtod.tod));
op2               195 arch/s390/net/bpf_jit_comp.c #define _EMIT6(op1, op2)					\
op2               199 arch/s390/net/bpf_jit_comp.c 		*(u16 *) (jit->prg_buf + jit->prg + 4) = op2;	\
op2               204 arch/s390/net/bpf_jit_comp.c #define _EMIT6_DISP(op1, op2, disp)				\
op2               207 arch/s390/net/bpf_jit_comp.c 	_EMIT6(op1 | __disp, op2);				\
op2               210 arch/s390/net/bpf_jit_comp.c #define _EMIT6_DISP_LH(op1, op2, disp)				\
op2               215 arch/s390/net/bpf_jit_comp.c 	_EMIT6(op1 | __disp_l, op2 | __disp_h >> 4);		\
op2               218 arch/s390/net/bpf_jit_comp.c #define EMIT6_DISP_LH(op1, op2, b1, b2, b3, disp)		\
op2               221 arch/s390/net/bpf_jit_comp.c 		       reg_high(b3) << 8, op2, disp);		\
op2               227 arch/s390/net/bpf_jit_comp.c #define EMIT6_PCREL_LABEL(op1, op2, b1, b2, label, mask)	\
op2               231 arch/s390/net/bpf_jit_comp.c 	       op2 | mask << 12);				\
op2               236 arch/s390/net/bpf_jit_comp.c #define EMIT6_PCREL_IMM_LABEL(op1, op2, b1, imm, label, mask)	\
op2               240 arch/s390/net/bpf_jit_comp.c 		(rel & 0xffff), op2 | (imm & 0xff) << 8);	\
op2               245 arch/s390/net/bpf_jit_comp.c #define EMIT6_PCREL(op1, op2, b1, b2, i, off, mask)		\
op2               249 arch/s390/net/bpf_jit_comp.c 	_EMIT6(op1 | reg(b1, b2) << 16 | (rel & 0xffff), op2 | mask);	\
op2               149 arch/sh/kernel/kprobes.c 		struct kprobe *op1, *op2;
op2               154 arch/sh/kernel/kprobes.c 		op2 = this_cpu_ptr(&saved_next_opcode2);
op2               178 arch/sh/kernel/kprobes.c 			op2->addr =
op2               180 arch/sh/kernel/kprobes.c 			op2->opcode = *(op2->addr);
op2               181 arch/sh/kernel/kprobes.c 			arch_arm_kprobe(op2);
op2               188 arch/sh/kernel/kprobes.c 			op2->addr =
op2               190 arch/sh/kernel/kprobes.c 			op2->opcode = *(op2->addr);
op2               191 arch/sh/kernel/kprobes.c 			arch_arm_kprobe(op2);
op2                60 arch/sparc/kernel/uprobes.c 	u32 op2 = (insn >> 22) & 0x7;
op2                63 arch/sparc/kernel/uprobes.c 	    (op2 == 1 || op2 == 2 || op2 == 3 || op2 == 5 || op2 == 6) &&
op2               155 arch/x86/kvm/vmx/ops.h #define vmx_asm2(insn, op1, op2, error_args...)				\
op2               161 arch/x86/kvm/vmx/ops.h 			  : : op1, op2 : "cc" : error, fault);		\
op2               138 drivers/gpu/host1x/cdma.c static void host1x_pushbuffer_push(struct push_buffer *pb, u32 op1, u32 op2)
op2               144 drivers/gpu/host1x/cdma.c 	*(p++) = op2;
op2               526 drivers/gpu/host1x/cdma.c void host1x_cdma_push(struct host1x_cdma *cdma, u32 op1, u32 op2)
op2               534 drivers/gpu/host1x/cdma.c 				       op1, op2);
op2               544 drivers/gpu/host1x/cdma.c 	host1x_pushbuffer_push(pb, op1, op2);
op2               556 drivers/gpu/host1x/cdma.c void host1x_cdma_push_wide(struct host1x_cdma *cdma, u32 op1, u32 op2,
op2               566 drivers/gpu/host1x/cdma.c 		trace_host1x_cdma_push_wide(dev_name(channel->dev), op1, op2,
op2               596 drivers/gpu/host1x/cdma.c 	host1x_pushbuffer_push(pb, op1, op2);
op2                81 drivers/gpu/host1x/cdma.h void host1x_cdma_push(struct host1x_cdma *cdma, u32 op1, u32 op2);
op2                82 drivers/gpu/host1x/cdma.h void host1x_cdma_push_wide(struct host1x_cdma *cdma, u32 op1, u32 op2,
op2                61 drivers/gpu/host1x/hw/channel_hw.c 		u32 op2, op3;
op2                63 drivers/gpu/host1x/hw/channel_hw.c 		op2 = lower_32_bits(addr);
op2                73 drivers/gpu/host1x/hw/channel_hw.c 			host1x_cdma_push_wide(cdma, op1, op2, op3, op4);
op2                82 drivers/gpu/host1x/hw/channel_hw.c 			host1x_cdma_push(cdma, op1, op2);
op2                29 drivers/iommu/msm_iommu.c #define MRC(reg, processor, op1, crn, crm, op2)				\
op2                31 drivers/iommu/msm_iommu.c "   mrc   "   #processor "," #op1 ", %0,"  #crn "," #crm "," #op2 "\n"  \
op2                13 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c u16 qm_mulu16(u16 op1, u16 op2)
op2                15 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c 	return (u16) (((u32) op1 * (u32) op2) >> 16);
op2                26 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c s16 qm_muls16(s16 op1, s16 op2)
op2                29 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c 	if (op1 == (s16) 0x8000 && op2 == (s16) 0x8000)
op2                32 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c 		result = ((s32) (op1) * (s32) (op2));
op2                42 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c s32 qm_add32(s32 op1, s32 op2)
op2                45 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c 	result = op1 + op2;
op2                46 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c 	if (op1 < 0 && op2 < 0 && result > 0)
op2                48 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c 	else if (op1 > 0 && op2 > 0 && result < 0)
op2                59 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c s16 qm_add16(s16 op1, s16 op2)
op2                62 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c 	s32 temp = (s32) op1 + (s32) op2;
op2                78 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c s16 qm_sub16(s16 op1, s16 op2)
op2                81 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c 	s32 temp = (s32) op1 - (s32) op2;
op2                11 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h u16 qm_mulu16(u16 op1, u16 op2);
op2                13 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h s16 qm_muls16(s16 op1, s16 op2);
op2                15 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h s32 qm_add32(s32 op1, s32 op2);
op2                17 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h s16 qm_add16(s16 op1, s16 op2);
op2                19 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h s16 qm_sub16(s16 op1, s16 op2);
op2                50 include/trace/events/host1x.h 	TP_PROTO(const char *name, u32 op1, u32 op2),
op2                52 include/trace/events/host1x.h 	TP_ARGS(name, op1, op2),
op2                57 include/trace/events/host1x.h 		__field(u32, op2)
op2                63 include/trace/events/host1x.h 		__entry->op2 = op2;
op2                67 include/trace/events/host1x.h 		__entry->name, __entry->op1, __entry->op2)
op2                71 include/trace/events/host1x.h 	TP_PROTO(const char *name, u32 op1, u32 op2, u32 op3, u32 op4),
op2                73 include/trace/events/host1x.h 	TP_ARGS(name, op1, op2, op3, op4),
op2                78 include/trace/events/host1x.h 		__field(u32, op2)
op2                86 include/trace/events/host1x.h 		__entry->op2 = op2;
op2                92 include/trace/events/host1x.h 		__entry->name, __entry->op1, __entry->op2, __entry->op3,
op2               278 lib/zstd/huf_decompress.c 		BYTE *op2 = opStart2;
op2               312 lib/zstd/huf_decompress.c 			HUF_DECODE_SYMBOLX2_2(op2, &bitD2);
op2               316 lib/zstd/huf_decompress.c 			HUF_DECODE_SYMBOLX2_1(op2, &bitD2);
op2               320 lib/zstd/huf_decompress.c 			HUF_DECODE_SYMBOLX2_2(op2, &bitD2);
op2               324 lib/zstd/huf_decompress.c 			HUF_DECODE_SYMBOLX2_0(op2, &bitD2);
op2               333 lib/zstd/huf_decompress.c 		if (op2 > opStart3)
op2               341 lib/zstd/huf_decompress.c 		HUF_decodeStreamX2(op2, &bitD2, opStart3, dt, dtLog);
op2               737 lib/zstd/huf_decompress.c 		BYTE *op2 = opStart2;
op2               771 lib/zstd/huf_decompress.c 			HUF_DECODE_SYMBOLX4_2(op2, &bitD2);
op2               775 lib/zstd/huf_decompress.c 			HUF_DECODE_SYMBOLX4_1(op2, &bitD2);
op2               779 lib/zstd/huf_decompress.c 			HUF_DECODE_SYMBOLX4_2(op2, &bitD2);
op2               783 lib/zstd/huf_decompress.c 			HUF_DECODE_SYMBOLX4_0(op2, &bitD2);
op2               793 lib/zstd/huf_decompress.c 		if (op2 > opStart3)
op2               801 lib/zstd/huf_decompress.c 		HUF_decodeStreamX4(op2, &bitD2, opStart3, dt, dtLog);
op2               847 scripts/gcc-plugins/gcc-common.h static inline gimple gimple_build_assign_with_ops(enum tree_code subcode, tree lhs, tree op1, tree op2 MEM_STAT_DECL)
op2               849 scripts/gcc-plugins/gcc-common.h 	return gimple_build_assign(lhs, subcode, op1, op2 PASS_MEM_STAT);
op2               341 scripts/gcc-plugins/latent_entropy_plugin.c 				tree op2)
op2               343 scripts/gcc-plugins/latent_entropy_plugin.c 	return gimple_build_assign_with_ops(code, lhs, op1, op2);
op2               165 tools/arch/arm/include/uapi/asm/kvm.h #define __ARM_CP15_REG(op1,crn,crm,op2) \
op2               170 tools/arch/arm/include/uapi/asm/kvm.h 	ARM_CP15_REG_SHIFT_MASK(op2, 32_OPC2))
op2               207 tools/arch/arm64/include/uapi/asm/kvm.h #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \
op2               213 tools/arch/arm64/include/uapi/asm/kvm.h 	ARM64_SYS_REG_SHIFT_MASK(op2, OP2))
op2                76 tools/objtool/arch/x86/decode.c 	unsigned char op1, op2, rex = 0, rex_b = 0, rex_r = 0, rex_w = 0,
op2                99 tools/objtool/arch/x86/decode.c 	op2 = insn.opcode.bytes[1];
op2               360 tools/objtool/arch/x86/decode.c 		if (op2 == 0x01) {
op2               367 tools/objtool/arch/x86/decode.c 		} else if (op2 >= 0x80 && op2 <= 0x8f) {
op2               371 tools/objtool/arch/x86/decode.c 		} else if (op2 == 0x05 || op2 == 0x07 || op2 == 0x34 ||
op2               372 tools/objtool/arch/x86/decode.c 			   op2 == 0x35) {
op2               377 tools/objtool/arch/x86/decode.c 		} else if (op2 == 0x0b || op2 == 0xb9) {
op2               382 tools/objtool/arch/x86/decode.c 		} else if (op2 == 0x0d || op2 == 0x1f) {
op2               387 tools/objtool/arch/x86/decode.c 		} else if (op2 == 0xa0 || op2 == 0xa8) {
op2               394 tools/objtool/arch/x86/decode.c 		} else if (op2 == 0xa1 || op2 == 0xa9) {