op1 361 arch/arc/include/asm/atomic.h #define ATOMIC64_OP(op, op1, op2) \ op1 369 arch/arc/include/asm/atomic.h " " #op1 " %L0, %L0, %L2 \n" \ op1 378 arch/arc/include/asm/atomic.h #define ATOMIC64_OP_RETURN(op, op1, op2) \ op1 388 arch/arc/include/asm/atomic.h " " #op1 " %L0, %L0, %L2 \n" \ op1 401 arch/arc/include/asm/atomic.h #define ATOMIC64_FETCH_OP(op, op1, op2) \ op1 411 arch/arc/include/asm/atomic.h " " #op1 " %L1, %L0, %L3 \n" \ op1 424 arch/arc/include/asm/atomic.h #define ATOMIC64_OPS(op, op1, op2) \ op1 425 arch/arc/include/asm/atomic.h ATOMIC64_OP(op, op1, op2) \ op1 426 arch/arc/include/asm/atomic.h ATOMIC64_OP_RETURN(op, op1, op2) \ op1 427 arch/arc/include/asm/atomic.h ATOMIC64_FETCH_OP(op, op1, op2) op1 306 arch/arm/include/asm/atomic.h #define ATOMIC64_OP(op, op1, op2) \ op1 315 arch/arm/include/asm/atomic.h " " #op1 " %Q0, %Q0, %Q4\n" \ op1 325 arch/arm/include/asm/atomic.h #define ATOMIC64_OP_RETURN(op, op1, op2) \ op1 336 arch/arm/include/asm/atomic.h " " #op1 " %Q0, %Q0, %Q4\n" \ op1 348 arch/arm/include/asm/atomic.h #define ATOMIC64_FETCH_OP(op, op1, op2) \ op1 359 arch/arm/include/asm/atomic.h " " #op1 " %Q1, %Q0, %Q5\n" \ op1 371 arch/arm/include/asm/atomic.h #define ATOMIC64_OPS(op, op1, op2) \ op1 372 arch/arm/include/asm/atomic.h ATOMIC64_OP(op, op1, op2) \ op1 373 arch/arm/include/asm/atomic.h ATOMIC64_OP_RETURN(op, op1, op2) \ op1 374 arch/arm/include/asm/atomic.h ATOMIC64_FETCH_OP(op, op1, op2) op1 385 arch/arm/include/asm/atomic.h #define ATOMIC64_OPS(op, op1, op2) \ op1 386 arch/arm/include/asm/atomic.h ATOMIC64_OP(op, op1, op2) \ op1 387 arch/arm/include/asm/atomic.h ATOMIC64_FETCH_OP(op, op1, op2) op1 17 arch/arm/include/asm/hardware/cp14.h #define MRC14(op1, crn, crm, op2) \ op1 20 arch/arm/include/asm/hardware/cp14.h asm volatile("mrc p14, "#op1", %0, "#crn", "#crm", "#op2 : "=r" (val)); \ op1 24 arch/arm/include/asm/hardware/cp14.h #define MCR14(val, op1, crn, crm, op2) \ op1 26 arch/arm/include/asm/hardware/cp14.h asm volatile("mcr p14, "#op1", %0, "#crn", "#crm", "#op2 : : "r" (val));\ op1 165 arch/arm/include/uapi/asm/kvm.h #define __ARM_CP15_REG(op1,crn,crm,op2) \ op1 167 arch/arm/include/uapi/asm/kvm.h ARM_CP15_REG_SHIFT_MASK(op1, OPC1) | \ op1 174 arch/arm/include/uapi/asm/kvm.h #define __ARM_CP15_REG64(op1,crm) \ op1 175 arch/arm/include/uapi/asm/kvm.h (__ARM_CP15_REG(op1, 0, crm, 0) | KVM_REG_SIZE_U64) op1 800 arch/arm/kvm/coproc.c #define FUNCTION_FOR32(crn, crm, op1, op2, name) \ op1 806 arch/arm/kvm/coproc.c asm volatile("mrc p15, " __stringify(op1) \ op1 175 arch/arm64/include/asm/esr.h #define ESR_ELx_SYS64_ISS_SYS_VAL(op0, op1, op2, crn, crm) \ op1 177 arch/arm64/include/asm/esr.h ((op1) << ESR_ELx_SYS64_ISS_OP1_SHIFT) | \ op1 284 arch/arm64/include/asm/esr.h #define ESR_ELx_CP15_32_ISS_SYS_VAL(op1, op2, crn, crm) \ op1 285 arch/arm64/include/asm/esr.h (((op1) << ESR_ELx_CP15_32_ISS_OP1_SHIFT) | \ op1 305 arch/arm64/include/asm/esr.h #define ESR_ELx_CP15_64_ISS_SYS_VAL(op1, crm) \ op1 306 arch/arm64/include/asm/esr.h (((op1) << ESR_ELx_CP15_64_ISS_OP1_SHIFT) | \ op1 36 arch/arm64/include/asm/sysreg.h #define sys_reg(op0, op1, crn, crm, op2) \ op1 37 arch/arm64/include/asm/sysreg.h (((op0) << Op0_shift) | ((op1) << Op1_shift) | \ op1 88 arch/arm64/include/asm/sysreg.h #define pstate_field(op1, op2) ((op1) << Op1_shift | (op2) << Op2_shift) op1 207 arch/arm64/include/uapi/asm/kvm.h #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \ op1 210 arch/arm64/include/uapi/asm/kvm.h ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | \ op1 203 arch/powerpc/include/asm/mpc52xx_psc.h u8 op1; /* PSC + 0x38 */ op1 344 arch/powerpc/include/asm/mpc52xx_psc.h u8 op1; /* PSC + 0x48 */ op1 484 arch/powerpc/kernel/trace/ftrace.c expected_nop_sequence(void *ip, unsigned int op0, unsigned int op1) op1 495 arch/powerpc/kernel/trace/ftrace.c if ((op0 != 0x48000008) || ((op1 & 0xffff0000) != 0xe8410000)) op1 501 arch/powerpc/kernel/trace/ftrace.c expected_nop_sequence(void *ip, unsigned int op0, unsigned int op1) op1 28 arch/powerpc/math-emu/math.c #define FLOATFUNC(x) static inline int x(void *op1, void *op2, void *op3, \ op1 228 arch/powerpc/math-emu/math.c void *op0 = 0, *op1 = 0, *op2 = 0, *op3 = 0; op1 333 arch/powerpc/math-emu/math.c op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); op1 339 arch/powerpc/math-emu/math.c op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); op1 345 arch/powerpc/math-emu/math.c op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); op1 354 arch/powerpc/math-emu/math.c op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); op1 364 arch/powerpc/math-emu/math.c op1 = (void *)(regs->gpr[idx] + sdisp); op1 373 arch/powerpc/math-emu/math.c op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); op1 378 arch/powerpc/math-emu/math.c op1 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); op1 384 arch/powerpc/math-emu/math.c op1 = (void *)((idx ? regs->gpr[idx] : 0) op1 393 arch/powerpc/math-emu/math.c op1 = (void *)(regs->gpr[idx] op1 399 arch/powerpc/math-emu/math.c op1 = (void *)((insn >> 23) & 0x7); op1 406 arch/powerpc/math-emu/math.c op1 = (void *)((insn >> 23) & 0x7); op1 416 arch/powerpc/math-emu/math.c op1 = (void *)((insn >> 12) & 0xf); op1 421 arch/powerpc/math-emu/math.c op1 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); op1 435 arch/powerpc/math-emu/math.c eflag = func(op0, op1, op2, op3); op1 449 arch/powerpc/math-emu/math.c regs->gpr[idx] = (unsigned long)op1; op1 66 arch/s390/include/asm/percpu.h #define arch_this_cpu_add(pcp, val, op1, op2, szcast) \ op1 82 arch/s390/include/asm/percpu.h op1 " %[old__],%[val__],%[ptr__]\n" \ op1 195 arch/s390/net/bpf_jit_comp.c #define _EMIT6(op1, op2) \ op1 198 arch/s390/net/bpf_jit_comp.c *(u32 *) (jit->prg_buf + jit->prg) = op1; \ op1 204 arch/s390/net/bpf_jit_comp.c #define _EMIT6_DISP(op1, op2, disp) \ op1 207 arch/s390/net/bpf_jit_comp.c _EMIT6(op1 | __disp, op2); \ op1 210 arch/s390/net/bpf_jit_comp.c #define _EMIT6_DISP_LH(op1, op2, disp) \ op1 215 arch/s390/net/bpf_jit_comp.c _EMIT6(op1 | __disp_l, op2 | __disp_h >> 4); \ op1 218 arch/s390/net/bpf_jit_comp.c #define EMIT6_DISP_LH(op1, op2, b1, b2, b3, disp) \ op1 220 arch/s390/net/bpf_jit_comp.c _EMIT6_DISP_LH(op1 | reg(b1, b2) << 16 | \ op1 227 arch/s390/net/bpf_jit_comp.c #define EMIT6_PCREL_LABEL(op1, op2, b1, b2, label, mask) \ op1 230 arch/s390/net/bpf_jit_comp.c _EMIT6(op1 | reg(b1, b2) << 16 | (rel & 0xffff), \ op1 236 arch/s390/net/bpf_jit_comp.c #define EMIT6_PCREL_IMM_LABEL(op1, op2, b1, imm, label, mask) \ op1 239 arch/s390/net/bpf_jit_comp.c _EMIT6(op1 | (reg_high(b1) | mask) << 16 | \ op1 245 arch/s390/net/bpf_jit_comp.c #define EMIT6_PCREL(op1, op2, b1, b2, i, off, mask) \ op1 249 arch/s390/net/bpf_jit_comp.c _EMIT6(op1 | reg(b1, b2) << 16 | (rel & 0xffff), op2 | mask); \ op1 149 arch/sh/kernel/kprobes.c struct kprobe *op1, *op2; op1 153 arch/sh/kernel/kprobes.c op1 = this_cpu_ptr(&saved_next_opcode); op1 158 arch/sh/kernel/kprobes.c op1->addr = (kprobe_opcode_t *) regs->regs[reg_nr]; op1 161 arch/sh/kernel/kprobes.c op1->addr = op1 166 arch/sh/kernel/kprobes.c op1->addr = op1 171 arch/sh/kernel/kprobes.c op1->addr = (kprobe_opcode_t *) regs->pr; op1 176 arch/sh/kernel/kprobes.c op1->addr = p->addr + 1; op1 186 arch/sh/kernel/kprobes.c op1->addr = p->addr + 2; op1 194 arch/sh/kernel/kprobes.c op1->addr = p->addr + 1; op1 197 arch/sh/kernel/kprobes.c op1->opcode = *(op1->addr); op1 198 arch/sh/kernel/kprobes.c arch_arm_kprobe(op1); op1 140 arch/x86/kvm/vmx/ops.h #define vmx_asm1(insn, op1, error_args...) \ op1 146 arch/x86/kvm/vmx/ops.h : : op1 : "cc" : error, fault); \ op1 155 arch/x86/kvm/vmx/ops.h #define vmx_asm2(insn, op1, op2, error_args...) \ op1 161 arch/x86/kvm/vmx/ops.h : : op1, op2 : "cc" : error, fault); \ op1 138 drivers/gpu/host1x/cdma.c static void host1x_pushbuffer_push(struct push_buffer *pb, u32 op1, u32 op2) op1 143 drivers/gpu/host1x/cdma.c *(p++) = op1; op1 526 drivers/gpu/host1x/cdma.c void host1x_cdma_push(struct host1x_cdma *cdma, u32 op1, u32 op2) op1 534 drivers/gpu/host1x/cdma.c op1, op2); op1 544 drivers/gpu/host1x/cdma.c host1x_pushbuffer_push(pb, op1, op2); op1 556 drivers/gpu/host1x/cdma.c void host1x_cdma_push_wide(struct host1x_cdma *cdma, u32 op1, u32 op2, op1 566 drivers/gpu/host1x/cdma.c trace_host1x_cdma_push_wide(dev_name(channel->dev), op1, op2, op1 596 drivers/gpu/host1x/cdma.c host1x_pushbuffer_push(pb, op1, op2); op1 81 drivers/gpu/host1x/cdma.h void host1x_cdma_push(struct host1x_cdma *cdma, u32 op1, u32 op2); op1 82 drivers/gpu/host1x/cdma.h void host1x_cdma_push_wide(struct host1x_cdma *cdma, u32 op1, u32 op2, op1 70 drivers/gpu/host1x/hw/channel_hw.c u32 op1 = host1x_opcode_gather_wide(g->words); op1 73 drivers/gpu/host1x/hw/channel_hw.c host1x_cdma_push_wide(cdma, op1, op2, op3, op4); op1 80 drivers/gpu/host1x/hw/channel_hw.c u32 op1 = host1x_opcode_gather(g->words); op1 82 drivers/gpu/host1x/hw/channel_hw.c host1x_cdma_push(cdma, op1, op2); op1 29 drivers/iommu/msm_iommu.c #define MRC(reg, processor, op1, crn, crm, op2) \ op1 31 drivers/iommu/msm_iommu.c " mrc " #processor "," #op1 ", %0," #crn "," #crm "," #op2 "\n" \ op1 13 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c u16 qm_mulu16(u16 op1, u16 op2) op1 15 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c return (u16) (((u32) op1 * (u32) op2) >> 16); op1 26 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c s16 qm_muls16(s16 op1, s16 op2) op1 29 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c if (op1 == (s16) 0x8000 && op2 == (s16) 0x8000) op1 32 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c result = ((s32) (op1) * (s32) (op2)); op1 42 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c s32 qm_add32(s32 op1, s32 op2) op1 45 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c result = op1 + op2; op1 46 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c if (op1 < 0 && op2 < 0 && result > 0) op1 48 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c else if (op1 > 0 && op2 > 0 && result < 0) op1 59 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c s16 qm_add16(s16 op1, s16 op2) op1 62 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c s32 temp = (s32) op1 + (s32) op2; op1 78 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c s16 qm_sub16(s16 op1, s16 op2) op1 81 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c s32 temp = (s32) op1 - (s32) op2; op1 11 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h u16 qm_mulu16(u16 op1, u16 op2); op1 13 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h s16 qm_muls16(s16 op1, s16 op2); op1 15 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h s32 qm_add32(s32 op1, s32 op2); op1 17 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h s16 qm_add16(s16 op1, s16 op2); op1 19 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h s16 qm_sub16(s16 op1, s16 op2); op1 160 drivers/tty/serial/mpc52xx_uart.c out_8(&PSC(port)->op1, MPC52xx_PSC_OP_RTS); op1 936 drivers/tty/serial/mpc52xx_uart.c out_8(&PSC_5125(port)->op1, MPC52xx_PSC_OP_RTS); op1 50 include/trace/events/host1x.h TP_PROTO(const char *name, u32 op1, u32 op2), op1 52 include/trace/events/host1x.h TP_ARGS(name, op1, op2), op1 56 include/trace/events/host1x.h __field(u32, op1) op1 62 include/trace/events/host1x.h __entry->op1 = op1; op1 67 include/trace/events/host1x.h __entry->name, __entry->op1, __entry->op2) op1 71 include/trace/events/host1x.h TP_PROTO(const char *name, u32 op1, u32 op2, u32 op3, u32 op4), op1 73 include/trace/events/host1x.h TP_ARGS(name, op1, op2, op3, op4), op1 77 include/trace/events/host1x.h __field(u32, op1) op1 85 include/trace/events/host1x.h __entry->op1 = op1; op1 92 include/trace/events/host1x.h __entry->name, __entry->op1, __entry->op2, __entry->op3, op1 277 lib/zstd/huf_decompress.c BYTE *op1 = ostart; op1 311 lib/zstd/huf_decompress.c HUF_DECODE_SYMBOLX2_2(op1, &bitD1); op1 315 lib/zstd/huf_decompress.c HUF_DECODE_SYMBOLX2_1(op1, &bitD1); op1 319 lib/zstd/huf_decompress.c HUF_DECODE_SYMBOLX2_2(op1, &bitD1); op1 323 lib/zstd/huf_decompress.c HUF_DECODE_SYMBOLX2_0(op1, &bitD1); op1 331 lib/zstd/huf_decompress.c if (op1 > opStart2) op1 340 lib/zstd/huf_decompress.c HUF_decodeStreamX2(op1, &bitD1, opStart2, dt, dtLog); op1 736 lib/zstd/huf_decompress.c BYTE *op1 = ostart; op1 770 lib/zstd/huf_decompress.c HUF_DECODE_SYMBOLX4_2(op1, &bitD1); op1 774 lib/zstd/huf_decompress.c HUF_DECODE_SYMBOLX4_1(op1, &bitD1); op1 778 lib/zstd/huf_decompress.c HUF_DECODE_SYMBOLX4_2(op1, &bitD1); op1 782 lib/zstd/huf_decompress.c HUF_DECODE_SYMBOLX4_0(op1, &bitD1); op1 791 lib/zstd/huf_decompress.c if (op1 > opStart2) op1 800 lib/zstd/huf_decompress.c HUF_decodeStreamX4(op1, &bitD1, opStart2, dt, dtLog); op1 847 scripts/gcc-plugins/gcc-common.h static inline gimple gimple_build_assign_with_ops(enum tree_code subcode, tree lhs, tree op1, tree op2 MEM_STAT_DECL) op1 849 scripts/gcc-plugins/gcc-common.h return gimple_build_assign(lhs, subcode, op1, op2 PASS_MEM_STAT); op1 340 scripts/gcc-plugins/latent_entropy_plugin.c static gimple create_assign(enum tree_code code, tree lhs, tree op1, op1 343 scripts/gcc-plugins/latent_entropy_plugin.c return gimple_build_assign_with_ops(code, lhs, op1, op2); op1 165 tools/arch/arm/include/uapi/asm/kvm.h #define __ARM_CP15_REG(op1,crn,crm,op2) \ op1 167 tools/arch/arm/include/uapi/asm/kvm.h ARM_CP15_REG_SHIFT_MASK(op1, OPC1) | \ op1 174 tools/arch/arm/include/uapi/asm/kvm.h #define __ARM_CP15_REG64(op1,crm) \ op1 175 tools/arch/arm/include/uapi/asm/kvm.h (__ARM_CP15_REG(op1, 0, crm, 0) | KVM_REG_SIZE_U64) op1 207 tools/arch/arm64/include/uapi/asm/kvm.h #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \ op1 210 tools/arch/arm64/include/uapi/asm/kvm.h ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | \ op1 76 tools/objtool/arch/x86/decode.c unsigned char op1, op2, rex = 0, rex_b = 0, rex_r = 0, rex_w = 0, op1 98 tools/objtool/arch/x86/decode.c op1 = insn.opcode.bytes[0]; op1 119 tools/objtool/arch/x86/decode.c switch (op1) { op1 139 tools/objtool/arch/x86/decode.c op->src.reg = op_to_cfi_reg[op1 & 0x7][rex_b]; op1 150 tools/objtool/arch/x86/decode.c op->dest.reg = op_to_cfi_reg[op1 & 0x7][rex_b];