omap4_prcm_irq_setup 45 arch/arm/mach-omap2/prm44xx.c static struct omap_prcm_irq_setup omap4_prcm_irq_setup = { omap4_prcm_irq_setup 227 arch/arm/mach-omap2/prm44xx.c for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++) omap4_prcm_irq_setup 228 arch/arm/mach-omap2/prm44xx.c events[i] = _read_pending_irq_reg(omap4_prcm_irq_setup.mask + omap4_prcm_irq_setup 229 arch/arm/mach-omap2/prm44xx.c i * 4, omap4_prcm_irq_setup.ack + i * 4); omap4_prcm_irq_setup 262 arch/arm/mach-omap2/prm44xx.c for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++) { omap4_prcm_irq_setup 263 arch/arm/mach-omap2/prm44xx.c reg = omap4_prcm_irq_setup.mask + i * 4; omap4_prcm_irq_setup 290 arch/arm/mach-omap2/prm44xx.c for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++) omap4_prcm_irq_setup 293 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.mask + i * 4); omap4_prcm_irq_setup 317 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.pm_ctrl); omap4_prcm_irq_setup 320 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.pm_ctrl) & omap4_prcm_irq_setup 330 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.pm_ctrl); omap4_prcm_irq_setup 333 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.pm_ctrl) & omap4_prcm_irq_setup 361 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.pm_ctrl); omap4_prcm_irq_setup 752 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.mask); omap4_prcm_irq_setup 756 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.pm_ctrl); omap4_prcm_irq_setup 763 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.mask); omap4_prcm_irq_setup 767 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.pm_ctrl); omap4_prcm_irq_setup 821 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.nr_irqs = 1; omap4_prcm_irq_setup 822 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.nr_regs = 1; omap4_prcm_irq_setup 823 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.pm_ctrl = AM43XX_PRM_IO_PMCTRL_OFFSET; omap4_prcm_irq_setup 824 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.ack = AM43XX_PRM_IRQSTATUS_MPU_OFFSET; omap4_prcm_irq_setup 825 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.mask = AM43XX_PRM_IRQENABLE_MPU_OFFSET; omap4_prcm_irq_setup 848 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.irq = irq_num; omap4_prcm_irq_setup 852 arch/arm/mach-omap2/prm44xx.c return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);