old1              320 arch/arm64/include/asm/atomic_ll_sc.h __ll_sc__cmpxchg_double##name(unsigned long old1,			\
old1              341 arch/arm64/include/asm/atomic_ll_sc.h 	: "r" (old1), "r" (old2), "r" (new1), "r" (new2)		\
old1              385 arch/arm64/include/asm/atomic_lse.h __lse__cmpxchg_double##name(unsigned long old1,				\
old1              391 arch/arm64/include/asm/atomic_lse.h 	unsigned long oldval1 = old1;					\
old1              393 arch/arm64/include/asm/atomic_lse.h 	register unsigned long x0 asm ("x0") = old1;			\
old1              405 arch/arm64/include/asm/atomic_lse.h 	: [old1] "+&r" (x0), [old2] "+&r" (x1),				\
old1              135 arch/arm64/include/asm/cmpxchg.h static inline long __cmpxchg_double##name(unsigned long old1,		\
old1              142 arch/arm64/include/asm/cmpxchg.h 				old1, old2, new1, new2, ptr);		\
old1             1210 drivers/gpio/gpio-omap.c 		u32 old0, old1;
old1             1213 drivers/gpio/gpio-omap.c 		old1 = readl_relaxed(bank->base + bank->regs->leveldetect1);
old1             1218 drivers/gpio/gpio-omap.c 			writel_relaxed(old1 | gen, bank->base +
old1             1225 drivers/gpio/gpio-omap.c 			writel_relaxed(old1 | l, bank->base +
old1             1229 drivers/gpio/gpio-omap.c 		writel_relaxed(old1, bank->base + bank->regs->leveldetect1);