offsets 3268 arch/arm/mach-omap2/omap_hwmod.c if (data->offsets[SYSC_REVISION] >= 0) offsets 3269 arch/arm/mach-omap2/omap_hwmod.c *rev_offs = data->offsets[SYSC_REVISION]; offsets 3271 arch/arm/mach-omap2/omap_hwmod.c if (data->offsets[SYSC_SYSCONFIG] >= 0) offsets 3272 arch/arm/mach-omap2/omap_hwmod.c *sysc_offs = data->offsets[SYSC_SYSCONFIG]; offsets 3274 arch/arm/mach-omap2/omap_hwmod.c if (data->offsets[SYSC_SYSSTATUS] >= 0) offsets 3275 arch/arm/mach-omap2/omap_hwmod.c *syss_offs = data->offsets[SYSC_SYSSTATUS]; offsets 195 arch/arm/net/bpf_jit_32.c u32 *offsets; offsets 375 arch/arm/net/bpf_jit_32.c offset = ctx->offsets[ctx->prog->len - 1] * 4; offsets 405 arch/arm/net/bpf_jit_32.c to = ctx->offsets[bpf_to]; offsets 406 arch/arm/net/bpf_jit_32.c from = ctx->offsets[bpf_from]; offsets 1838 arch/arm/net/bpf_jit_32.c ctx->offsets[i] = ctx->idx; offsets 1843 arch/arm/net/bpf_jit_32.c ctx->offsets[i] = ctx->idx; offsets 1910 arch/arm/net/bpf_jit_32.c ctx.offsets = kcalloc(prog->len, sizeof(int), GFP_KERNEL); offsets 1911 arch/arm/net/bpf_jit_32.c if (ctx.offsets == NULL) { offsets 2016 arch/arm/net/bpf_jit_32.c kfree(ctx.offsets); offsets 11 arch/m68k/fpsp040/fpsp.h | fpsp.h --- stack frame offsets during FPSP exception handling offsets 44 arch/m68k/fpsp040/fpsp.h | Positive offsets from A6 refer to the exception frame. Negative offsets 45 arch/m68k/fpsp040/fpsp.h | offsets refer to the Local Variable area and the fsave area. offsets 122 arch/m68k/fpsp040/fpsp.h | fsave offsets and bit definitions offsets 105 arch/mips/net/ebpf_jit.c u32 *offsets; offsets 150 arch/mips/net/ebpf_jit.c target_va = base_va + (ctx->offsets[target_idx] & ~OFFSETS_B_CONV); offsets 176 arch/mips/net/ebpf_jit.c return (ctx->offsets[tgt] & ~OFFSETS_B_CONV) - offsets 1111 arch/mips/net/ebpf_jit.c if (!(ctx->offsets[this_idx] & OFFSETS_B_CONV)) { offsets 1112 arch/mips/net/ebpf_jit.c ctx->offsets[this_idx] |= OFFSETS_B_CONV; offsets 1122 arch/mips/net/ebpf_jit.c if (ctx->offsets[this_idx] & OFFSETS_B_CONV) { offsets 1135 arch/mips/net/ebpf_jit.c if (!(ctx->offsets[this_idx] & OFFSETS_B_CONV)) { offsets 1136 arch/mips/net/ebpf_jit.c ctx->offsets[this_idx] |= OFFSETS_B_CONV; offsets 1146 arch/mips/net/ebpf_jit.c if (ctx->offsets[this_idx] & OFFSETS_B_CONV) { offsets 1533 arch/mips/net/ebpf_jit.c ctx->offsets[i] = (ctx->offsets[i] & OFFSETS_B_CONV) | (ctx->idx * 4); offsets 1542 arch/mips/net/ebpf_jit.c ctx->offsets[i] = ctx->idx * 4; offsets 1553 arch/mips/net/ebpf_jit.c ctx->offsets[i] = ctx->idx * 4; offsets 1836 arch/mips/net/ebpf_jit.c ctx.offsets = kcalloc(prog->len + 1, sizeof(*ctx.offsets), GFP_KERNEL); offsets 1837 arch/mips/net/ebpf_jit.c if (ctx.offsets == NULL) offsets 1920 arch/mips/net/ebpf_jit.c kfree(ctx.offsets); offsets 53 arch/um/drivers/ubd_kern.c unsigned long offsets[2]; offsets 1343 arch/um/drivers/ubd_kern.c io_req->offsets[0] = 0; offsets 1344 arch/um/drivers/ubd_kern.c io_req->offsets[1] = dev->cow.data_offset; offsets 1525 arch/um/drivers/ubd_kern.c off = req->offset + req->offsets[bit] + offsets 447 drivers/acpi/battery.c const struct acpi_offsets *offsets, int num) offsets 457 drivers/acpi/battery.c if (offsets[i].mode) { offsets 458 drivers/acpi/battery.c u8 *ptr = (u8 *)battery + offsets[i].offset; offsets 469 drivers/acpi/battery.c int *x = (int *)((u8 *)battery + offsets[i].offset); offsets 3086 drivers/android/binder.c (u64)tr->data.ptr.offsets, offsets 3095 drivers/android/binder.c (u64)tr->data.ptr.offsets, offsets 3190 drivers/android/binder.c (uintptr_t)tr->data.ptr.offsets, offsets 4495 drivers/android/binder.c trd->data.ptr.offsets = trd->data.ptr.buffer + offsets 4537 drivers/android/binder.c (u64)trd->data.ptr.offsets); offsets 84 drivers/bus/ti-sysc.c int offsets[SYSC_MAX_REGS]; offsets 116 drivers/bus/ti-sysc.c if (ddata->offsets[SYSC_REVISION] >= 0 && offsets 117 drivers/bus/ti-sysc.c offset == ddata->offsets[SYSC_REVISION]) { offsets 137 drivers/bus/ti-sysc.c if (ddata->offsets[SYSC_REVISION] >= 0 && offsets 138 drivers/bus/ti-sysc.c offset == ddata->offsets[SYSC_REVISION]) { offsets 157 drivers/bus/ti-sysc.c int offset = ddata->offsets[SYSC_REVISION]; offsets 167 drivers/bus/ti-sysc.c int offset = ddata->offsets[SYSC_SYSCONFIG]; offsets 177 drivers/bus/ti-sysc.c int offset = ddata->offsets[SYSC_SYSSTATUS]; offsets 679 drivers/bus/ti-sysc.c ddata->offsets[reg] = -ENODEV; offsets 684 drivers/bus/ti-sysc.c ddata->offsets[reg] = res->start - ddata->module_pa; offsets 713 drivers/bus/ti-sysc.c if (ddata->offsets[i] < 0) offsets 716 drivers/bus/ti-sysc.c if (ddata->offsets[i] > (ddata->module_size - 4)) { offsets 723 drivers/bus/ti-sysc.c if (ddata->offsets[j] < 0) offsets 726 drivers/bus/ti-sysc.c if (ddata->offsets[i] == ddata->offsets[j]) offsets 757 drivers/bus/ti-sysc.c if (ddata->offsets[SYSC_REVISION] < 0 && offsets 758 drivers/bus/ti-sysc.c ddata->offsets[SYSC_SYSCONFIG] < 0 && offsets 759 drivers/bus/ti-sysc.c ddata->offsets[SYSC_SYSSTATUS] < 0) { offsets 762 drivers/bus/ti-sysc.c size = max3(ddata->offsets[SYSC_REVISION], offsets 763 drivers/bus/ti-sysc.c ddata->offsets[SYSC_SYSCONFIG], offsets 764 drivers/bus/ti-sysc.c ddata->offsets[SYSC_SYSSTATUS]); offsets 820 drivers/bus/ti-sysc.c if (ddata->offsets[SYSC_REVISION] < 0) offsets 831 drivers/bus/ti-sysc.c if (ddata->offsets[reg] < 0) offsets 834 drivers/bus/ti-sysc.c return sprintf(bufp, ":%x", ddata->offsets[reg]); offsets 877 drivers/bus/ti-sysc.c if (ddata->offsets[SYSC_SYSCONFIG] == -ENODEV) offsets 881 drivers/bus/ti-sysc.c reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]); offsets 912 drivers/bus/ti-sysc.c sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg); offsets 931 drivers/bus/ti-sysc.c sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg); offsets 938 drivers/bus/ti-sysc.c sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg); offsets 970 drivers/bus/ti-sysc.c if (ddata->offsets[SYSC_SYSCONFIG] == -ENODEV) offsets 977 drivers/bus/ti-sysc.c reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]); offsets 996 drivers/bus/ti-sysc.c sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg); offsets 1019 drivers/bus/ti-sysc.c sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg); offsets 1359 drivers/bus/ti-sysc.c q->rev_offset != ddata->offsets[SYSC_REVISION]) offsets 1363 drivers/bus/ti-sysc.c q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG]) offsets 1367 drivers/bus/ti-sysc.c q->syss_offset != ddata->offsets[SYSC_SYSSTATUS]) offsets 1388 drivers/bus/ti-sysc.c q->rev_offset != ddata->offsets[SYSC_REVISION]) offsets 1392 drivers/bus/ti-sysc.c q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG]) offsets 1396 drivers/bus/ti-sysc.c q->syss_offset != ddata->offsets[SYSC_SYSSTATUS]) offsets 1608 drivers/bus/ti-sysc.c sysc_offset = ddata->offsets[SYSC_SYSCONFIG]; offsets 1609 drivers/bus/ti-sysc.c syss_offset = ddata->offsets[SYSC_SYSSTATUS]; offsets 2375 drivers/bus/ti-sysc.c mdata->offsets = ddata->offsets; offsets 1271 drivers/crypto/inside-secure/safexcel.c struct safexcel_register_offsets *offsets = &priv->offsets; offsets 1274 drivers/crypto/inside-secure/safexcel.c offsets->hia_aic = EIP197_HIA_AIC_BASE; offsets 1275 drivers/crypto/inside-secure/safexcel.c offsets->hia_aic_g = EIP197_HIA_AIC_G_BASE; offsets 1276 drivers/crypto/inside-secure/safexcel.c offsets->hia_aic_r = EIP197_HIA_AIC_R_BASE; offsets 1277 drivers/crypto/inside-secure/safexcel.c offsets->hia_aic_xdr = EIP197_HIA_AIC_xDR_BASE; offsets 1278 drivers/crypto/inside-secure/safexcel.c offsets->hia_dfe = EIP197_HIA_DFE_BASE; offsets 1279 drivers/crypto/inside-secure/safexcel.c offsets->hia_dfe_thr = EIP197_HIA_DFE_THR_BASE; offsets 1280 drivers/crypto/inside-secure/safexcel.c offsets->hia_dse = EIP197_HIA_DSE_BASE; offsets 1281 drivers/crypto/inside-secure/safexcel.c offsets->hia_dse_thr = EIP197_HIA_DSE_THR_BASE; offsets 1282 drivers/crypto/inside-secure/safexcel.c offsets->hia_gen_cfg = EIP197_HIA_GEN_CFG_BASE; offsets 1283 drivers/crypto/inside-secure/safexcel.c offsets->pe = EIP197_PE_BASE; offsets 1284 drivers/crypto/inside-secure/safexcel.c offsets->global = EIP197_GLOBAL_BASE; offsets 1286 drivers/crypto/inside-secure/safexcel.c offsets->hia_aic = EIP97_HIA_AIC_BASE; offsets 1287 drivers/crypto/inside-secure/safexcel.c offsets->hia_aic_g = EIP97_HIA_AIC_G_BASE; offsets 1288 drivers/crypto/inside-secure/safexcel.c offsets->hia_aic_r = EIP97_HIA_AIC_R_BASE; offsets 1289 drivers/crypto/inside-secure/safexcel.c offsets->hia_aic_xdr = EIP97_HIA_AIC_xDR_BASE; offsets 1290 drivers/crypto/inside-secure/safexcel.c offsets->hia_dfe = EIP97_HIA_DFE_BASE; offsets 1291 drivers/crypto/inside-secure/safexcel.c offsets->hia_dfe_thr = EIP97_HIA_DFE_THR_BASE; offsets 1292 drivers/crypto/inside-secure/safexcel.c offsets->hia_dse = EIP97_HIA_DSE_BASE; offsets 1293 drivers/crypto/inside-secure/safexcel.c offsets->hia_dse_thr = EIP97_HIA_DSE_THR_BASE; offsets 1294 drivers/crypto/inside-secure/safexcel.c offsets->hia_gen_cfg = EIP97_HIA_GEN_CFG_BASE; offsets 1295 drivers/crypto/inside-secure/safexcel.c offsets->pe = EIP97_PE_BASE; offsets 1296 drivers/crypto/inside-secure/safexcel.c offsets->global = EIP97_GLOBAL_BASE; offsets 72 drivers/crypto/inside-secure/safexcel.h #define EIP197_HIA_AIC(priv) ((priv)->base + (priv)->offsets.hia_aic) offsets 73 drivers/crypto/inside-secure/safexcel.h #define EIP197_HIA_AIC_G(priv) ((priv)->base + (priv)->offsets.hia_aic_g) offsets 74 drivers/crypto/inside-secure/safexcel.h #define EIP197_HIA_AIC_R(priv) ((priv)->base + (priv)->offsets.hia_aic_r) offsets 75 drivers/crypto/inside-secure/safexcel.h #define EIP197_HIA_AIC_xDR(priv) ((priv)->base + (priv)->offsets.hia_aic_xdr) offsets 76 drivers/crypto/inside-secure/safexcel.h #define EIP197_HIA_DFE(priv) ((priv)->base + (priv)->offsets.hia_dfe) offsets 77 drivers/crypto/inside-secure/safexcel.h #define EIP197_HIA_DFE_THR(priv) ((priv)->base + (priv)->offsets.hia_dfe_thr) offsets 78 drivers/crypto/inside-secure/safexcel.h #define EIP197_HIA_DSE(priv) ((priv)->base + (priv)->offsets.hia_dse) offsets 79 drivers/crypto/inside-secure/safexcel.h #define EIP197_HIA_DSE_THR(priv) ((priv)->base + (priv)->offsets.hia_dse_thr) offsets 80 drivers/crypto/inside-secure/safexcel.h #define EIP197_HIA_GEN_CFG(priv) ((priv)->base + (priv)->offsets.hia_gen_cfg) offsets 81 drivers/crypto/inside-secure/safexcel.h #define EIP197_PE(priv) ((priv)->base + (priv)->offsets.pe) offsets 82 drivers/crypto/inside-secure/safexcel.h #define EIP197_GLOBAL(priv) ((priv)->base + (priv)->offsets.global) offsets 720 drivers/crypto/inside-secure/safexcel.h struct safexcel_register_offsets offsets; offsets 216 drivers/edac/qcom_edac.c ret = regmap_read(drv->regmap, drv->offsets[bank] + synd_reg, offsets 226 drivers/edac/qcom_edac.c drv->offsets[bank] + reg_data.count_status_reg, offsets 237 drivers/edac/qcom_edac.c drv->offsets[bank] + reg_data.ways_status_reg, offsets 300 drivers/edac/qcom_edac.c drv->offsets[i] + DRP_INTERRUPT_STATUS, offsets 316 drivers/edac/qcom_edac.c drv->offsets[i] + TRP_INTERRUPT_0_STATUS, offsets 2794 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c uint64_t chroma_addr = afb->address + fb->offsets[1]; offsets 95 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c (reg + enc110->offsets.dig) offsets 98 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c (reg + enc110->offsets.dp) offsets 423 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c const struct dce110_timing_generator_offsets *offsets) offsets 431 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c dce110_timing_generator_construct(tg110, ctx, instance, offsets); offsets 43 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c (reg + cp110->offsets.dcp_offset) offsets 45 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c (reg + cp110->offsets.dmif_offset) offsets 81 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c cp110->offsets = reg_offsets[crtc_inst]; offsets 307 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c cp110->offsets = reg_offsets[params->inst]; offsets 40 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.h struct dce110_compressor_reg_offsets offsets; offsets 464 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c const struct dce110_timing_generator_offsets *offsets) offsets 472 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c dce110_timing_generator_construct(tg110, ctx, instance, offsets); offsets 48 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c #define CRTC_REG(reg) (reg + tg110->offsets.crtc) offsets 49 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c #define DCP_REG(reg) (reg + tg110->offsets.dcp) offsets 2248 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c const struct dce110_timing_generator_offsets *offsets) offsets 2253 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c tg110->offsets = *offsets; offsets 98 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h struct dce110_timing_generator_offsets offsets; offsets 124 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h const struct dce110_timing_generator_offsets *offsets); offsets 42 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c (reg + cp110->offsets.dcp_offset) offsets 44 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c (reg + cp110->offsets.dmif_offset) offsets 405 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c cp110->offsets = reg_offsets[params->inst]; offsets 40 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.h struct dce112_compressor_reg_offsets offsets; offsets 442 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c const struct dce110_timing_generator_offsets *offsets) offsets 450 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c dce110_timing_generator_construct(tg110, ctx, instance, offsets); offsets 530 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c const struct dce110_timing_generator_offsets *offsets) offsets 538 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c dce120_timing_generator_construct(tg110, ctx, instance, offsets); offsets 43 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c generic_reg_update_soc15(tg110->base.ctx, tg110->offsets.crtc, reg_name, n, __VA_ARGS__) offsets 46 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c generic_reg_set_soc15(tg110->base.ctx, tg110->offsets.crtc, reg_name, n, __VA_ARGS__) offsets 93 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 176 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 192 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 203 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 253 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 261 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(tg->ctx, mmCRTC0_CRTC_GSL_WINDOW, tg110->offsets.crtc, 0); offsets 315 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 377 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 516 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 521 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc, offsets 531 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc, offsets 611 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 626 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 648 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 676 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 698 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc, offsets 717 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 721 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc, offsets 758 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 786 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc, 0); offsets 941 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_PARAMETERS, tg110->offsets.crtc, 0); offsets 980 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value); offsets 993 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value); offsets 1067 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, 0); offsets 1070 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_CONTROL, tg110->offsets.crtc, 0); offsets 1082 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_CONTROL, tg110->offsets.crtc, value); offsets 1083 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value); offsets 1084 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_PARAMETERS, tg110->offsets.crtc, value); offsets 1124 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 1142 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc, 0); offsets 1184 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 1192 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 1197 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); offsets 1244 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c const struct dce110_timing_generator_offsets *offsets) offsets 1249 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets = *offsets; offsets 38 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.h const struct dce110_timing_generator_offsets *offsets); offsets 455 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c const struct dce110_timing_generator_offsets *offsets) offsets 463 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c dce80_timing_generator_construct(tg110, ctx, instance, offsets); offsets 83 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c #define CRTC_REG(reg) (reg + tg110->offsets.crtc) offsets 84 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c #define DCP_REG(reg) (reg + tg110->offsets.dcp) offsets 85 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c #define DMIF_REG(reg) (reg + tg110->offsets.dmif) offsets 91 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c + DCE110TG_FROM_TG(tg)->offsets.dmif; offsets 228 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c const struct dce110_timing_generator_offsets *offsets) offsets 232 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c tg110->offsets = *offsets; offsets 37 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.h const struct dce110_timing_generator_offsets *offsets); offsets 82 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c if (fb->offsets[0] % alignment_header) { offsets 95 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c min_size = kfb->afbc_size + fb->offsets[0]; offsets 252 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c offset = fb->offsets[plane]; offsets 280 drivers/gpu/drm/arm/malidp_drv.c if (mode_cmd->offsets[0] != 0) { offsets 174 drivers/gpu/drm/arm/malidp_mw.c mw_state->addrs[i] = obj->paddr + fb->offsets[i]; offsets 54 drivers/gpu/drm/armada/armada_plane.c addrs[0][0] = addr + fb->offsets[0] + y * fb->pitches[0] + offsets 62 drivers/gpu/drm/armada/armada_plane.c addrs[0][i] = addr + fb->offsets[i] + y * fb->pitches[i] + offsets 64 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c unsigned int offsets[ATMEL_HLCDC_LAYER_MAX_PLANES]; offsets 451 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->dscrs[i]->addr = gem->paddr + state->offsets[i]; offsets 690 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->offsets[i] = offset + fb->offsets[i]; offsets 42 drivers/gpu/drm/bochs/bochs_kms.c state->fb->offsets[0] + gbo->bo.offset); offsets 232 drivers/gpu/drm/drm_client_modeset.c struct drm_client_offset *offsets, offsets 311 drivers/gpu/drm/drm_client_modeset.c struct drm_client_offset *offsets, offsets 335 drivers/gpu/drm/drm_client_modeset.c offsets[idx].x = hoffset; offsets 336 drivers/gpu/drm/drm_client_modeset.c offsets[idx].y = voffset; offsets 344 drivers/gpu/drm/drm_client_modeset.c struct drm_client_offset *offsets, offsets 384 drivers/gpu/drm/drm_client_modeset.c drm_client_get_tile_offsets(connectors, connector_count, modes, offsets, i, offsets 508 drivers/gpu/drm/drm_client_modeset.c struct drm_client_offset *offsets, offsets 696 drivers/gpu/drm/drm_client_modeset.c struct drm_client_offset *offsets; offsets 731 drivers/gpu/drm/drm_client_modeset.c offsets = kcalloc(connector_count, sizeof(*offsets), GFP_KERNEL); offsets 733 drivers/gpu/drm/drm_client_modeset.c if (!crtcs || !modes || !enabled || !offsets) { offsets 749 drivers/gpu/drm/drm_client_modeset.c modes, offsets, enabled, width, height)) { offsets 752 drivers/gpu/drm/drm_client_modeset.c memset(offsets, 0, connector_count * sizeof(*offsets)); offsets 755 drivers/gpu/drm/drm_client_modeset.c offsets, enabled, width, height) && offsets 757 drivers/gpu/drm/drm_client_modeset.c offsets, enabled, width, height)) offsets 773 drivers/gpu/drm/drm_client_modeset.c struct drm_client_offset *offset = &offsets[i]; offsets 800 drivers/gpu/drm/drm_client_modeset.c kfree(offsets); offsets 81 drivers/gpu/drm/drm_fb_cma_helper.c paddr = obj->paddr + fb->offsets[plane]; offsets 220 drivers/gpu/drm/drm_framebuffer.c if ((uint64_t) height * r->pitches[i] + r->offsets[i] > UINT_MAX) offsets 280 drivers/gpu/drm/drm_framebuffer.c if (r->offsets[i]) { offsets 1058 drivers/gpu/drm/drm_framebuffer.c drm_printf_indent(p, indent + 1, "offset[%u]=%u\n", i, fb->offsets[i]); offsets 170 drivers/gpu/drm/drm_gem_framebuffer_helper.c + mode_cmd->offsets[i]; offsets 879 drivers/gpu/drm/drm_ioc32.c u32 offsets[4]; offsets 91 drivers/gpu/drm/drm_modeset_helper.c fb->offsets[i] = mode_cmd->offsets[i]; offsets 109 drivers/gpu/drm/exynos/exynos_drm_fb.c mode_cmd->offsets[i]; offsets 150 drivers/gpu/drm/exynos/exynos_drm_fb.c return exynos_gem->dma_addr + fb->offsets[index]; offsets 2395 drivers/gpu/drm/i915/display/intel_display.c fb->offsets[color_plane] % intel_tile_size(dev_priv)) { offsets 2397 drivers/gpu/drm/i915/display/intel_display.c fb->offsets[color_plane], color_plane); offsets 2406 drivers/gpu/drm/i915/display/intel_display.c fb->offsets[color_plane])) { offsets 2408 drivers/gpu/drm/i915/display/intel_display.c fb->offsets[color_plane], fb->pitches[color_plane], offsets 2419 drivers/gpu/drm/i915/display/intel_display.c fb->offsets[color_plane], 0); offsets 2653 drivers/gpu/drm/i915/display/intel_display.c i, fb->offsets[i]); offsets 2700 drivers/gpu/drm/i915/display/intel_display.c i, fb->offsets[i]); offsets 15674 drivers/gpu/drm/i915/display/intel_display.c if (mode_cmd->offsets[0] != 0) offsets 285 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c u32 *offsets, *values; offsets 294 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c offsets = kmalloc_array(ncachelines, 2*sizeof(u32), GFP_KERNEL); offsets 295 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c if (!offsets) offsets 298 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c offsets[count] = count * 64 + 4 * (count % 16); offsets 300 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c values = offsets + ncachelines; offsets 332 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c i915_random_reorder(offsets, ncachelines, &prng); offsets 337 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c err = over->set(obj, offsets[n], ~values[n]); offsets 346 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c err = write->set(obj, offsets[n], values[n]); offsets 357 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c err = read->get(obj, offsets[n], &found); offsets 369 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c ~values[n], offsets[n]); offsets 383 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c kfree(offsets); offsets 103 drivers/gpu/drm/imx/ipuv3-plane.c return cma_obj->paddr + fb->offsets[plane] + fb->pitches[plane] * y + offsets 122 drivers/gpu/drm/imx/ipuv3-plane.c return cma_obj->paddr + fb->offsets[1] + fb->pitches[1] * y + offsets 141 drivers/gpu/drm/imx/ipuv3-plane.c return cma_obj->paddr + fb->offsets[2] + fb->pitches[2] * y + offsets 74 drivers/gpu/drm/mediatek/mtk_drm_fb.c size += cmd->offsets[0]; offsets 463 drivers/gpu/drm/meson/meson_overlay.c priv->viu.vd1_addr2 = gem->paddr + fb->offsets[2]; offsets 475 drivers/gpu/drm/meson/meson_overlay.c priv->viu.vd1_addr1 = gem->paddr + fb->offsets[1]; offsets 487 drivers/gpu/drm/meson/meson_overlay.c priv->viu.vd1_addr0 = gem->paddr + fb->offsets[0]; offsets 1150 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c for (i = 0; i < ARRAY_SIZE(fb->offsets); i++) offsets 1152 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c fb->offsets[i]); offsets 802 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c const enum mdp5_pipe *pipes, const uint32_t *offsets, offsets 811 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c hwpipe = mdp5_pipe_init(pipes[i], offsets[i], caps); offsets 44 drivers/gpu/drm/msm/msm_fb.c i, fb->offsets[i], fb->pitches[i]); offsets 85 drivers/gpu/drm/msm/msm_fb.c return msm_gem_iova(fb->obj[plane], aspace) + fb->offsets[plane]; offsets 178 drivers/gpu/drm/msm/msm_fb.c + mode_cmd->offsets[i]; offsets 175 drivers/gpu/drm/nouveau/dispnv04/overlay.c nv_fb->nvbo->bo.offset + fb->offsets[1]); offsets 360 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c uint32_t offsets[] = { base, base + 0x1c, base + 0x40, base + 0x5c }; offsets 364 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c regs[i][j] = nv_read_ptv(dev, offsets[i]+4*j); offsets 372 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c uint32_t offsets[] = { base, base + 0x1c, base + 0x40, base + 0x5c }; offsets 376 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c nv_write_ptv(dev, offsets[i]+4*j, regs[i][j]); offsets 1683 drivers/gpu/drm/omapdrm/dss/dsi.c static const u8 offsets[] = { 0, 4, 8, 12, 16 }; offsets 1697 drivers/gpu/drm/omapdrm/dss/dsi.c unsigned int offset = offsets[i]; offsets 1717 drivers/gpu/drm/omapdrm/dss/dsi.c unsigned int offset = offsets[i]; offsets 1876 drivers/gpu/drm/omapdrm/dss/dsi.c const u8 *offsets; offsets 1879 drivers/gpu/drm/omapdrm/dss/dsi.c offsets = offsets_old; offsets 1881 drivers/gpu/drm/omapdrm/dss/dsi.c offsets = offsets_new; offsets 1895 drivers/gpu/drm/omapdrm/dss/dsi.c if (!in_use[i] || (l & (1 << offsets[i]))) offsets 1904 drivers/gpu/drm/omapdrm/dss/dsi.c if (!in_use[i] || (l & (1 << offsets[i]))) offsets 89 drivers/gpu/drm/omapdrm/omap_fb.c offset = fb->offsets[n] offsets 300 drivers/gpu/drm/omapdrm/omap_fb.c i, fb->offsets[n], fb->pitches[i]); offsets 400 drivers/gpu/drm/omapdrm/omap_fb.c if (size > omap_gem_mmap_size(bos[i]) - mode_cmd->offsets[i]) { offsets 403 drivers/gpu/drm/omapdrm/omap_fb.c bos[i]->size - mode_cmd->offsets[i], size); offsets 112 drivers/gpu/drm/radeon/mkregtable.c struct list_head offsets; offsets 133 drivers/gpu/drm/radeon/mkregtable.c list_add_tail(&offset->list, &t->offsets); offsets 138 drivers/gpu/drm/radeon/mkregtable.c INIT_LIST_HEAD(&t->offsets); offsets 179 drivers/gpu/drm/radeon/mkregtable.c list_for_each_entry(offset, &t->offsets, list) { offsets 17 drivers/gpu/drm/radeon/radeon_dp_mst.c static const int offsets[] = { EVERGREEN_CRTC0_REGISTER_OFFSET, offsets 25 drivers/gpu/drm/radeon/radeon_dp_mst.c return offsets[id]; offsets 353 drivers/gpu/drm/rcar-du/rcar_du_plane.c dma[i] = gem->paddr + fb->offsets[i]; offsets 174 drivers/gpu/drm/rcar-du/rcar_du_vsp.c + fb->offsets[i]; offsets 236 drivers/gpu/drm/rcar-du/rcar_du_writeback.c + fb->offsets[i]; offsets 83 drivers/gpu/drm/rockchip/rockchip_drm_fb.c mode_cmd->offsets[i] + offsets 835 drivers/gpu/drm/rockchip/rockchip_drm_vop.c dma_addr = rk_obj->dma_addr + offset + fb->offsets[0]; offsets 868 drivers/gpu/drm/rockchip/rockchip_drm_vop.c dma_addr = rk_uv_obj->dma_addr + offset + fb->offsets[1]; offsets 75 drivers/gpu/drm/selftests/test-drm_framebuffer.c .handles = { 1, 0, 0 }, .offsets = { UINT_MAX - 1, 0, 0 }, .pitches = { 4 * MAX_WIDTH, 0, 0 }, offsets 80 drivers/gpu/drm/selftests/test-drm_framebuffer.c .handles = { 1, 0, 0 }, .offsets = { UINT_MAX / 2, 0, 0 }, .pitches = { 4 * MAX_WIDTH, 0, 0 }, offsets 85 drivers/gpu/drm/selftests/test-drm_framebuffer.c .handles = { 1, 0, 0 }, .offsets = { UINT_MAX / 2, 0, 0 }, offsets 91 drivers/gpu/drm/selftests/test-drm_framebuffer.c .handles = { 1, 0, 0 }, .offsets = { UINT_MAX / 2, 0, 0 }, .pitches = { 4 * MAX_WIDTH, 0, 0 }, offsets 97 drivers/gpu/drm/selftests/test-drm_framebuffer.c .handles = { 1, 0, 0 }, .offsets = { UINT_MAX / 2, 0, 0 }, offsets 104 drivers/gpu/drm/selftests/test-drm_framebuffer.c .handles = { 1, 0, 0 }, .offsets = { UINT_MAX / 2, 0, 0 }, offsets 205 drivers/gpu/drm/selftests/test-drm_framebuffer.c .handles = { 1, 1, 1 }, .offsets = { MAX_WIDTH, MAX_WIDTH + MAX_WIDTH * MAX_HEIGHT, offsets 280 drivers/gpu/drm/selftests/test-drm_framebuffer.c .handles = { 1, 0, 0 }, .offsets = { 0, 0, 3 }, offsets 295 drivers/gpu/drm/shmobile/shmob_drm_crtc.c scrtc->dma[0] = gem->paddr + fb->offsets[0] offsets 301 drivers/gpu/drm/shmobile/shmob_drm_crtc.c scrtc->dma[1] = gem->paddr + fb->offsets[1] offsets 48 drivers/gpu/drm/shmobile/shmob_drm_plane.c splane->dma[0] = gem->paddr + fb->offsets[0] offsets 54 drivers/gpu/drm/shmobile/shmob_drm_plane.c splane->dma[1] = gem->paddr + fb->offsets[1] offsets 779 drivers/gpu/drm/sti/sti_gdp.c top_field->gam_gdp_pml = (u32)cma_obj->paddr + fb->offsets[0]; offsets 1181 drivers/gpu/drm/sti/sti_hqvdp.c cmd->top.current_luma = (u32)cma_obj->paddr + fb->offsets[0]; offsets 1182 drivers/gpu/drm/sti/sti_hqvdp.c cmd->top.current_chroma = (u32)cma_obj->paddr + fb->offsets[1]; offsets 215 drivers/gpu/drm/sun4i/sun8i_ui_layer.c paddr = gem->paddr + fb->offsets[0]; offsets 287 drivers/gpu/drm/sun4i/sun8i_vi_layer.c paddr = gem->paddr + fb->offsets[i]; offsets 720 drivers/gpu/drm/tegra/dc.c window.base[i] = bo->paddr + fb->offsets[i]; offsets 154 drivers/gpu/drm/tegra/fb.c width * bpp + cmd->offsets[i]; offsets 72 drivers/gpu/drm/tilcdc/tilcdc_crtc.c start = gem->paddr + fb->offsets[0] + offsets 386 drivers/gpu/drm/vc4/vc4_drv.h u32 offsets[3]; offsets 332 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->offsets[i] = bo->paddr + fb->offsets[i]; offsets 643 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->offsets[i] += src_y / offsets 647 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->offsets[i] += vc4_state->src_x / offsets 704 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->offsets[0] += tiles_t * (tiles_w << tile_size_shift); offsets 705 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->offsets[0] += subtile_y << 8; offsets 706 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->offsets[0] += utile_y << 4; offsets 711 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->offsets[0] += (tiles_w - tiles_l) << offsets 713 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->offsets[0] -= (1 + !tile_y) << 10; offsets 715 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->offsets[0] += tiles_l << tile_size_shift; offsets 716 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->offsets[0] += tile_y << 10; offsets 760 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->offsets[i] += param * tile_w * tile; offsets 761 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->offsets[i] += src_y / offsets 764 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->offsets[i] += x_off / offsets 837 drivers/gpu/drm/vc4/vc4_plane.c vc4_dlist_write(vc4_state, vc4_state->offsets[i]); offsets 1003 drivers/gpu/drm/vc4/vc4_plane.c addr = bo->paddr + fb->offsets[0]; offsets 1063 drivers/gpu/drm/vc4/vc4_plane.c memcpy(vc4_state->offsets, new_vc4_state->offsets, offsets 1064 drivers/gpu/drm/vc4/vc4_plane.c sizeof(vc4_state->offsets)); offsets 296 drivers/gpu/drm/vc4/vc4_txp.c TXP_WRITE(TXP_DST_PTR, gem->paddr + fb->offsets[0]); offsets 108 drivers/gpu/drm/vkms/vkms_plane.c composer->offset = fb->offsets[0]; offsets 143 drivers/gpu/drm/vmwgfx/device_include/svga_overlay.h uint32 *offsets) /* OUT (optional) */ offsets 149 drivers/gpu/drm/vmwgfx/device_include/svga_overlay.h if (offsets) { offsets 150 drivers/gpu/drm/vmwgfx/device_include/svga_overlay.h offsets[0] = 0; offsets 162 drivers/gpu/drm/vmwgfx/device_include/svga_overlay.h if (offsets) { offsets 163 drivers/gpu/drm/vmwgfx/device_include/svga_overlay.h offsets[1] = *size; offsets 175 drivers/gpu/drm/vmwgfx/device_include/svga_overlay.h if (offsets) { offsets 176 drivers/gpu/drm/vmwgfx/device_include/svga_overlay.h offsets[2] = *size; offsets 142 drivers/gpu/drm/vmwgfx/vmwgfx_binding.c const size_t *offsets; offsets 187 drivers/gpu/drm/vmwgfx/vmwgfx_binding.c .offsets = vmw_binding_shader_offsets, offsets 191 drivers/gpu/drm/vmwgfx/vmwgfx_binding.c .offsets = vmw_binding_rt_offsets, offsets 195 drivers/gpu/drm/vmwgfx/vmwgfx_binding.c .offsets = vmw_binding_tex_offsets, offsets 199 drivers/gpu/drm/vmwgfx/vmwgfx_binding.c .offsets = vmw_binding_cb_offsets, offsets 203 drivers/gpu/drm/vmwgfx/vmwgfx_binding.c .offsets = vmw_binding_shader_offsets, offsets 207 drivers/gpu/drm/vmwgfx/vmwgfx_binding.c .offsets = vmw_binding_rt_offsets, offsets 211 drivers/gpu/drm/vmwgfx/vmwgfx_binding.c .offsets = vmw_binding_sr_offsets, offsets 215 drivers/gpu/drm/vmwgfx/vmwgfx_binding.c .offsets = vmw_binding_dx_ds_offsets, offsets 219 drivers/gpu/drm/vmwgfx/vmwgfx_binding.c .offsets = vmw_binding_so_offsets, offsets 223 drivers/gpu/drm/vmwgfx/vmwgfx_binding.c .offsets = vmw_binding_vb_offsets, offsets 227 drivers/gpu/drm/vmwgfx/vmwgfx_binding.c .offsets = vmw_binding_ib_offsets, offsets 266 drivers/gpu/drm/vmwgfx/vmwgfx_binding.c size_t offset = b->offsets[shader_slot] + b->size*slot; offsets 229 drivers/gpu/drm/vmwgfx/vmwgfx_drv.h struct vmw_surface_offset *offsets; offsets 289 drivers/gpu/drm/vmwgfx/vmwgfx_surface.c const struct vmw_surface_offset *cur_offset = &srf->offsets[i]; offsets 646 drivers/gpu/drm/vmwgfx/vmwgfx_surface.c kfree(srf->offsets); offsets 788 drivers/gpu/drm/vmwgfx/vmwgfx_surface.c srf->offsets = kmalloc_array(srf->num_sizes, offsets 789 drivers/gpu/drm/vmwgfx/vmwgfx_surface.c sizeof(*srf->offsets), offsets 791 drivers/gpu/drm/vmwgfx/vmwgfx_surface.c if (unlikely(!srf->offsets)) { offsets 803 drivers/gpu/drm/vmwgfx/vmwgfx_surface.c cur_offset = srf->offsets; offsets 887 drivers/gpu/drm/vmwgfx/vmwgfx_surface.c kfree(srf->offsets); offsets 1443 drivers/gpu/drm/vmwgfx/vmwgfx_surface.c srf->offsets = NULL; offsets 219 drivers/gpu/drm/zte/zx_plane.c paddr = cma_obj->paddr + fb->offsets[i]; offsets 385 drivers/gpu/drm/zte/zx_plane.c paddr = cma_obj->paddr + fb->offsets[0]; offsets 5350 drivers/infiniband/hw/mlx5/main.c kfree(dev->port[i].cnts.offsets); offsets 5384 drivers/infiniband/hw/mlx5/main.c cnts->offsets = kcalloc(num_counters, offsets 5385 drivers/infiniband/hw/mlx5/main.c sizeof(cnts->offsets), GFP_KERNEL); offsets 5386 drivers/infiniband/hw/mlx5/main.c if (!cnts->offsets) offsets 5399 drivers/infiniband/hw/mlx5/main.c size_t *offsets) offsets 5406 drivers/infiniband/hw/mlx5/main.c offsets[j] = basic_q_cnts[i].offset; offsets 5412 drivers/infiniband/hw/mlx5/main.c offsets[j] = out_of_seq_q_cnts[i].offset; offsets 5419 drivers/infiniband/hw/mlx5/main.c offsets[j] = retrans_q_cnts[i].offset; offsets 5426 drivers/infiniband/hw/mlx5/main.c offsets[j] = extended_err_cnts[i].offset; offsets 5433 drivers/infiniband/hw/mlx5/main.c offsets[j] = cong_cnts[i].offset; offsets 5440 drivers/infiniband/hw/mlx5/main.c offsets[j] = ext_ppcnt_cnts[i].offset; offsets 5461 drivers/infiniband/hw/mlx5/main.c dev->port[i].cnts.offsets); offsets 5543 drivers/infiniband/hw/mlx5/main.c val = *(__be32 *)(out + cnts->offsets[i]); offsets 5572 drivers/infiniband/hw/mlx5/main.c cnts->offsets[i + offset])); offsets 5620 drivers/infiniband/hw/mlx5/main.c cnts->offsets + offsets 721 drivers/infiniband/hw/mlx5/mlx5_ib.h size_t *offsets; offsets 49 drivers/media/platform/rockchip/rga/rga-hw.c struct rga_corners_addr_offset offsets; offsets 54 drivers/media/platform/rockchip/rga/rga-hw.c lt = &offsets.left_top; offsets 55 drivers/media/platform/rockchip/rga/rga-hw.c lb = &offsets.left_bottom; offsets 56 drivers/media/platform/rockchip/rga/rga-hw.c rt = &offsets.right_top; offsets 57 drivers/media/platform/rockchip/rga/rga-hw.c rb = &offsets.right_bottom; offsets 82 drivers/media/platform/rockchip/rga/rga-hw.c return offsets; offsets 87 drivers/media/platform/rockchip/rga/rga-hw.c * offsets, u32 rotate_mode, offsets 105 drivers/media/platform/rockchip/rga/rga-hw.c if (!offsets) offsets 110 drivers/media/platform/rockchip/rga/rga-hw.c return &offsets->left_top; offsets 112 drivers/media/platform/rockchip/rga/rga-hw.c return &offsets->left_bottom; offsets 114 drivers/media/platform/rockchip/rga/rga-hw.c return &offsets->right_top; offsets 116 drivers/media/platform/rockchip/rga/rga-hw.c return &offsets->right_bottom; offsets 177 drivers/media/platform/rockchip/rga/rga-hw.c struct rga_corners_addr_offset offsets; offsets 321 drivers/media/platform/rockchip/rga/rga-hw.c offsets = rga_get_addr_offset(&ctx->out, dst_x, dst_y, dst_w, dst_h); offsets 322 drivers/media/platform/rockchip/rga/rga-hw.c dst_offset = rga_lookup_draw_pos(&offsets, src_info.data.rot_mode, offsets 447 drivers/mmc/host/sdhci-tegra.c struct sdhci_tegra_autocal_offsets *offsets = offsets 461 drivers/mmc/host/sdhci-tegra.c drvup = offsets->pull_up_1v8_timeout; offsets 462 drivers/mmc/host/sdhci-tegra.c drvdn = offsets->pull_down_1v8_timeout; offsets 469 drivers/mmc/host/sdhci-tegra.c drvup = offsets->pull_up_3v3_timeout; offsets 470 drivers/mmc/host/sdhci-tegra.c drvdn = offsets->pull_down_3v3_timeout; offsets 516 drivers/mmc/host/sdhci-tegra.c struct sdhci_tegra_autocal_offsets offsets = offsets 526 drivers/mmc/host/sdhci-tegra.c pdpu = offsets.pull_down_sdr104 << 8 | offsets.pull_up_sdr104; offsets 529 drivers/mmc/host/sdhci-tegra.c pdpu = offsets.pull_down_hs400 << 8 | offsets.pull_up_hs400; offsets 533 drivers/mmc/host/sdhci-tegra.c pdpu = offsets.pull_down_1v8 << 8 | offsets.pull_up_1v8; offsets 535 drivers/mmc/host/sdhci-tegra.c pdpu = offsets.pull_down_3v3 << 8 | offsets.pull_up_3v3; offsets 36 drivers/mtd/tests/stresstest.c static int *offsets; offsets 96 drivers/mtd/tests/stresstest.c offs = offsets[eb]; offsets 101 drivers/mtd/tests/stresstest.c offs = offsets[eb] = 0; offsets 112 drivers/mtd/tests/stresstest.c offsets[eb + 1] = 0; offsets 121 drivers/mtd/tests/stresstest.c offsets[eb++] = mtd->erasesize; offsets 124 drivers/mtd/tests/stresstest.c offsets[eb] = offs; offsets 190 drivers/mtd/tests/stresstest.c offsets = kmalloc_array(ebcnt, sizeof(int), GFP_KERNEL); offsets 191 drivers/mtd/tests/stresstest.c if (!readbuf || !writebuf || !offsets) offsets 194 drivers/mtd/tests/stresstest.c offsets[i] = mtd->erasesize; offsets 220 drivers/mtd/tests/stresstest.c kfree(offsets); offsets 317 drivers/net/ethernet/8390/mcf8390.c static u32 offsets[] = { offsets 391 drivers/net/ethernet/8390/mcf8390.c ei_local->reg_offset = offsets; offsets 730 drivers/net/ethernet/mellanox/mlx5/core/lag.c size_t *offsets) offsets 762 drivers/net/ethernet/mellanox/mlx5/core/lag.c values[j] += be64_to_cpup((__be64 *)(out + offsets[j])); offsets 4356 drivers/net/ethernet/sun/cassini.c const int offsets; /* neg. values for 2nd arg to cas_read_phy */ offsets 4390 drivers/net/ethernet/sun/cassini.c if (ethtool_register_table[i].offsets < 0) { offsets 4392 drivers/net/ethernet/sun/cassini.c -ethtool_register_table[i].offsets); offsets 4395 drivers/net/ethernet/sun/cassini.c val= readl(cp->regs+ethtool_register_table[i].offsets); offsets 170 drivers/net/phy/at803x.c unsigned int i, offsets[] = { offsets 186 drivers/net/phy/at803x.c phy_write_mmd(phydev, AT803X_DEVICE_ADDR, offsets[i], offsets 1886 drivers/net/wireless/ath/carl9170/main.c __le32 offsets[RW]; offsets 1899 drivers/net/wireless/ath/carl9170/main.c offsets[j] = cpu_to_le32(AR9170_EEPROM_START + offsets 1903 drivers/net/wireless/ath/carl9170/main.c RB, (u8 *) &offsets, offsets 101 drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.c __le32 offsets[TRX_MAX_OFFSET]; /* Offsets of partitions from start of offsets 1045 drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.c actual_len = le32_to_cpu(trx->offsets[TRX_OFFSETS_DLFWLEN_IDX]); offsets 370 drivers/soc/qcom/llcc-slice.c drv_data->offsets = devm_kcalloc(dev, num_banks, sizeof(u32), offsets 372 drivers/soc/qcom/llcc-slice.c if (!drv_data->offsets) { offsets 378 drivers/soc/qcom/llcc-slice.c drv_data->offsets[i] = i * BANK_OFFSET_STRIDE; offsets 557 drivers/staging/comedi/drivers/jr3_pci.c set_s16(&sensor->offsets.fx, 0); offsets 558 drivers/staging/comedi/drivers/jr3_pci.c set_s16(&sensor->offsets.fy, 0); offsets 559 drivers/staging/comedi/drivers/jr3_pci.c set_s16(&sensor->offsets.fz, 0); offsets 560 drivers/staging/comedi/drivers/jr3_pci.c set_s16(&sensor->offsets.mx, 0); offsets 561 drivers/staging/comedi/drivers/jr3_pci.c set_s16(&sensor->offsets.my, 0); offsets 562 drivers/staging/comedi/drivers/jr3_pci.c set_s16(&sensor->offsets.mz, 0); offsets 426 drivers/staging/comedi/drivers/jr3_pci.h struct six_axis_array offsets; /* offset 0x0088 */ offsets 1496 drivers/staging/media/ipu3/ipu3-abi.h u32 offsets[IMGU_ABI_PARAM_CLASS_NUM]; /* offset wrt hdr in bytes */ offsets 217 drivers/staging/media/ipu3/ipu3-css-fw.c if (bi->blob.memory_offsets.offsets[IMGU_ABI_PARAM_CLASS_PARAM] offsets 220 drivers/staging/media/ipu3/ipu3-css-fw.c bi->blob.memory_offsets.offsets[IMGU_ABI_PARAM_CLASS_CONFIG] offsets 223 drivers/staging/media/ipu3/ipu3-css-fw.c bi->blob.memory_offsets.offsets[IMGU_ABI_PARAM_CLASS_STATE] offsets 72 drivers/staging/media/ipu3/ipu3-css-fw.h } offsets; offsets 2734 drivers/staging/media/ipu3/ipu3-css-params.c bi->blob.memory_offsets.offsets[IMGU_ABI_PARAM_CLASS_PARAM]; offsets 2814 drivers/staging/media/ipu3/ipu3-css-params.c bi->blob.memory_offsets.offsets[IMGU_ABI_PARAM_CLASS_PARAM]; offsets 706 drivers/staging/media/ipu3/ipu3-css.c bi->blob.memory_offsets.offsets[IMGU_ABI_PARAM_CLASS_CONFIG]; offsets 708 drivers/staging/media/ipu3/ipu3-css.c bi->blob.memory_offsets.offsets[IMGU_ABI_PARAM_CLASS_STATE]; offsets 1801 drivers/video/fbdev/omap2/omapfb/dss/dsi.c static const u8 offsets[] = { 0, 4, 8, 12, 16 }; offsets 1815 drivers/video/fbdev/omap2/omapfb/dss/dsi.c unsigned offset = offsets[i]; offsets 1835 drivers/video/fbdev/omap2/omapfb/dss/dsi.c unsigned offset = offsets[i]; offsets 1997 drivers/video/fbdev/omap2/omapfb/dss/dsi.c const u8 *offsets; offsets 2000 drivers/video/fbdev/omap2/omapfb/dss/dsi.c offsets = offsets_old; offsets 2002 drivers/video/fbdev/omap2/omapfb/dss/dsi.c offsets = offsets_new; offsets 2016 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (!in_use[i] || (l & (1 << offsets[i]))) offsets 2025 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (!in_use[i] || (l & (1 << offsets[i]))) offsets 164 fs/ext2/inode.c long i_block, int offsets[4], int *boundary) offsets 178 fs/ext2/inode.c offsets[n++] = i_block; offsets 181 fs/ext2/inode.c offsets[n++] = EXT2_IND_BLOCK; offsets 182 fs/ext2/inode.c offsets[n++] = i_block; offsets 185 fs/ext2/inode.c offsets[n++] = EXT2_DIND_BLOCK; offsets 186 fs/ext2/inode.c offsets[n++] = i_block >> ptrs_bits; offsets 187 fs/ext2/inode.c offsets[n++] = i_block & (ptrs - 1); offsets 190 fs/ext2/inode.c offsets[n++] = EXT2_TIND_BLOCK; offsets 191 fs/ext2/inode.c offsets[n++] = i_block >> (ptrs_bits * 2); offsets 192 fs/ext2/inode.c offsets[n++] = (i_block >> ptrs_bits) & (ptrs - 1); offsets 193 fs/ext2/inode.c offsets[n++] = i_block & (ptrs - 1); offsets 236 fs/ext2/inode.c int *offsets, offsets 246 fs/ext2/inode.c add_chain (chain, NULL, EXT2_I(inode)->i_data + *offsets); offsets 256 fs/ext2/inode.c add_chain(++p, bh, (__le32*)bh->b_data + *++offsets); offsets 480 fs/ext2/inode.c int *offsets, Indirect *branch) offsets 513 fs/ext2/inode.c branch[n].p = (__le32 *) bh->b_data + offsets[n]; offsets 629 fs/ext2/inode.c int offsets[4]; offsets 642 fs/ext2/inode.c depth = ext2_block_to_path(inode,iblock,offsets,&blocks_to_boundary); offsets 647 fs/ext2/inode.c partial = ext2_get_branch(inode, depth, offsets, chain, &err); offsets 700 fs/ext2/inode.c partial = ext2_get_branch(inode, depth, offsets, chain, &err); offsets 734 fs/ext2/inode.c offsets + (partial - chain), partial); offsets 1050 fs/ext2/inode.c int offsets[4], offsets 1058 fs/ext2/inode.c for (k = depth; k > 1 && !offsets[k-1]; k--) offsets 1060 fs/ext2/inode.c partial = ext2_get_branch(inode, k, offsets, chain, &err); offsets 1188 fs/ext2/inode.c int offsets[4]; offsets 1202 fs/ext2/inode.c n = ext2_block_to_path(inode, iblock, offsets, NULL); offsets 1213 fs/ext2/inode.c ext2_free_data(inode, i_data+offsets[0], offsets 1218 fs/ext2/inode.c partial = ext2_find_shared(inode, n, offsets, chain, &nr); offsets 1239 fs/ext2/inode.c switch (offsets[0]) { offsets 76 fs/ext4/indirect.c ext4_lblk_t offsets[4], int *boundary) offsets 87 fs/ext4/indirect.c offsets[n++] = i_block; offsets 90 fs/ext4/indirect.c offsets[n++] = EXT4_IND_BLOCK; offsets 91 fs/ext4/indirect.c offsets[n++] = i_block; offsets 94 fs/ext4/indirect.c offsets[n++] = EXT4_DIND_BLOCK; offsets 95 fs/ext4/indirect.c offsets[n++] = i_block >> ptrs_bits; offsets 96 fs/ext4/indirect.c offsets[n++] = i_block & (ptrs - 1); offsets 99 fs/ext4/indirect.c offsets[n++] = EXT4_TIND_BLOCK; offsets 100 fs/ext4/indirect.c offsets[n++] = i_block >> (ptrs_bits * 2); offsets 101 fs/ext4/indirect.c offsets[n++] = (i_block >> ptrs_bits) & (ptrs - 1); offsets 102 fs/ext4/indirect.c offsets[n++] = i_block & (ptrs - 1); offsets 145 fs/ext4/indirect.c ext4_lblk_t *offsets, offsets 155 fs/ext4/indirect.c add_chain(chain, NULL, EXT4_I(inode)->i_data + *offsets); offsets 177 fs/ext4/indirect.c add_chain(++p, bh, (__le32 *)bh->b_data + *++offsets); offsets 323 fs/ext4/indirect.c int indirect_blks, ext4_lblk_t *offsets, offsets 361 fs/ext4/indirect.c p = branch[i].p = (__le32 *) bh->b_data + offsets[i]; offsets 515 fs/ext4/indirect.c ext4_lblk_t offsets[4]; offsets 527 fs/ext4/indirect.c depth = ext4_block_to_path(inode, map->m_lblk, offsets, offsets 533 fs/ext4/indirect.c partial = ext4_get_branch(inode, depth, offsets, chain, &err); offsets 566 fs/ext4/indirect.c count = count * epb + (epb - offsets[i] - 1); offsets 614 fs/ext4/indirect.c offsets + (partial - chain), partial); offsets 764 fs/ext4/indirect.c ext4_lblk_t offsets[4], Indirect chain[4], offsets 772 fs/ext4/indirect.c for (k = depth; k > 1 && !offsets[k-1]; k--) offsets 774 fs/ext4/indirect.c partial = ext4_get_branch(inode, k, offsets, chain, &err); offsets 1100 fs/ext4/indirect.c ext4_lblk_t offsets[4]; offsets 1114 fs/ext4/indirect.c n = ext4_block_to_path(inode, last_block, offsets, NULL); offsets 1137 fs/ext4/indirect.c ext4_free_data(handle, inode, NULL, i_data+offsets[0], offsets 1142 fs/ext4/indirect.c partial = ext4_find_shared(inode, n, offsets, chain, &nr); offsets 1173 fs/ext4/indirect.c switch (offsets[0]) { offsets 1216 fs/ext4/indirect.c ext4_lblk_t offsets[4], offsets2[4]; offsets 1232 fs/ext4/indirect.c n = ext4_block_to_path(inode, start, offsets, NULL); offsets 1239 fs/ext4/indirect.c ext4_free_data(handle, inode, NULL, i_data + offsets[0], offsets 1255 fs/ext4/indirect.c ext4_free_data(handle, inode, NULL, i_data + offsets[0], offsets 1261 fs/ext4/indirect.c partial = p = ext4_find_shared(inode, n, offsets, chain, &nr); offsets 1326 fs/ext4/indirect.c partial = p = ext4_find_shared(inode, n, offsets, chain, &nr); offsets 1336 fs/ext4/indirect.c if (offsets[i] != offsets2[i]) { offsets 1425 fs/ext4/indirect.c switch (offsets[0]) { offsets 281 fs/ext4/namei.c struct dx_map_entry *offsets, int count, unsigned blocksize); offsets 32 fs/minix/itree_common.c int *offsets, offsets 42 fs/minix/itree_common.c add_chain (chain, NULL, i_data(inode) + *offsets); offsets 52 fs/minix/itree_common.c add_chain(++p, bh, (block_t *)bh->b_data + *++offsets); offsets 72 fs/minix/itree_common.c int *offsets, offsets 91 fs/minix/itree_common.c branch[n].p = (block_t*) bh->b_data + offsets[n]; offsets 150 fs/minix/itree_common.c int offsets[DEPTH]; offsets 154 fs/minix/itree_common.c int depth = block_to_path(inode, block, offsets); offsets 160 fs/minix/itree_common.c partial = get_branch(inode, depth, offsets, chain, &err); offsets 191 fs/minix/itree_common.c err = alloc_branch(inode, left, offsets+(partial-chain), partial); offsets 219 fs/minix/itree_common.c int offsets[DEPTH], offsets 227 fs/minix/itree_common.c for (k = depth; k > 1 && !offsets[k-1]; k--) offsets 229 fs/minix/itree_common.c partial = get_branch(inode, k, offsets, chain, &err); offsets 298 fs/minix/itree_common.c int offsets[DEPTH]; offsets 309 fs/minix/itree_common.c n = block_to_path(inode, iblock, offsets); offsets 314 fs/minix/itree_common.c free_data(inode, idata+offsets[0], idata + DIRECT); offsets 319 fs/minix/itree_common.c first_whole = offsets[0] + 1 - DIRECT; offsets 320 fs/minix/itree_common.c partial = find_shared(inode, n, offsets, chain, &nr); offsets 25 fs/minix/itree_v1.c static int block_to_path(struct inode * inode, long block, int offsets[DEPTH]) offsets 38 fs/minix/itree_v1.c offsets[n++] = block; offsets 40 fs/minix/itree_v1.c offsets[n++] = 7; offsets 41 fs/minix/itree_v1.c offsets[n++] = block; offsets 44 fs/minix/itree_v1.c offsets[n++] = 8; offsets 45 fs/minix/itree_v1.c offsets[n++] = block>>9; offsets 46 fs/minix/itree_v1.c offsets[n++] = block & 511; offsets 27 fs/minix/itree_v2.c static int block_to_path(struct inode * inode, long block, int offsets[DEPTH]) offsets 42 fs/minix/itree_v2.c offsets[n++] = block; offsets 44 fs/minix/itree_v2.c offsets[n++] = DIRCOUNT; offsets 45 fs/minix/itree_v2.c offsets[n++] = block; offsets 47 fs/minix/itree_v2.c offsets[n++] = DIRCOUNT + 1; offsets 48 fs/minix/itree_v2.c offsets[n++] = block / INDIRCOUNT(sb); offsets 49 fs/minix/itree_v2.c offsets[n++] = block % INDIRCOUNT(sb); offsets 52 fs/minix/itree_v2.c offsets[n++] = DIRCOUNT + 2; offsets 53 fs/minix/itree_v2.c offsets[n++] = (block / INDIRCOUNT(sb)) / INDIRCOUNT(sb); offsets 54 fs/minix/itree_v2.c offsets[n++] = (block / INDIRCOUNT(sb)) % INDIRCOUNT(sb); offsets 55 fs/minix/itree_v2.c offsets[n++] = block % INDIRCOUNT(sb); offsets 23 fs/sysv/itree.c static int block_to_path(struct inode *inode, long block, int offsets[DEPTH]) offsets 35 fs/sysv/itree.c offsets[n++] = block; offsets 37 fs/sysv/itree.c offsets[n++] = DIRECT; offsets 38 fs/sysv/itree.c offsets[n++] = block; offsets 40 fs/sysv/itree.c offsets[n++] = DIRECT+1; offsets 41 fs/sysv/itree.c offsets[n++] = block >> ptrs_bits; offsets 42 fs/sysv/itree.c offsets[n++] = block & (indirect_blocks - 1); offsets 44 fs/sysv/itree.c offsets[n++] = DIRECT+2; offsets 45 fs/sysv/itree.c offsets[n++] = block >> (ptrs_bits * 2); offsets 46 fs/sysv/itree.c offsets[n++] = (block >> ptrs_bits) & (indirect_blocks - 1); offsets 47 fs/sysv/itree.c offsets[n++] = block & (indirect_blocks - 1); offsets 90 fs/sysv/itree.c int offsets[], offsets 99 fs/sysv/itree.c add_chain(chain, NULL, SYSV_I(inode)->i_data + *offsets); offsets 109 fs/sysv/itree.c add_chain(++p, bh, (sysv_zone_t*)bh->b_data + *++offsets); offsets 127 fs/sysv/itree.c int *offsets, offsets 151 fs/sysv/itree.c branch[n].p = (sysv_zone_t*) bh->b_data + offsets[n]; offsets 206 fs/sysv/itree.c int offsets[DEPTH]; offsets 211 fs/sysv/itree.c int depth = block_to_path(inode, iblock, offsets); offsets 218 fs/sysv/itree.c partial = get_branch(inode, depth, offsets, chain, &err); offsets 251 fs/sysv/itree.c err = alloc_branch(inode, left, offsets+(partial-chain), partial); offsets 279 fs/sysv/itree.c int offsets[], offsets 287 fs/sysv/itree.c for (k = depth; k > 1 && !offsets[k-1]; k--) offsets 291 fs/sysv/itree.c partial = get_branch(inode, k, offsets, chain, &err); offsets 367 fs/sysv/itree.c int offsets[DEPTH]; offsets 385 fs/sysv/itree.c n = block_to_path(inode, iblock, offsets); offsets 390 fs/sysv/itree.c free_data(inode, i_data+offsets[0], i_data + DIRECT); offsets 394 fs/sysv/itree.c partial = find_shared(inode, n, offsets, chain, &nr); offsets 46 fs/ufs/inode.c static int ufs_block_to_path(struct inode *inode, sector_t i_block, unsigned offsets[4]) offsets 59 fs/ufs/inode.c offsets[n++] = i_block; offsets 61 fs/ufs/inode.c offsets[n++] = UFS_IND_BLOCK; offsets 62 fs/ufs/inode.c offsets[n++] = i_block; offsets 64 fs/ufs/inode.c offsets[n++] = UFS_DIND_BLOCK; offsets 65 fs/ufs/inode.c offsets[n++] = i_block >> ptrs_bits; offsets 66 fs/ufs/inode.c offsets[n++] = i_block & (ptrs - 1); offsets 68 fs/ufs/inode.c offsets[n++] = UFS_TIND_BLOCK; offsets 69 fs/ufs/inode.c offsets[n++] = i_block >> (ptrs_bits * 2); offsets 70 fs/ufs/inode.c offsets[n++] = (i_block >> ptrs_bits) & (ptrs - 1); offsets 71 fs/ufs/inode.c offsets[n++] = i_block & (ptrs - 1); offsets 124 fs/ufs/inode.c static u64 ufs_frag_map(struct inode *inode, unsigned offsets[4], int depth) offsets 144 fs/ufs/inode.c p = offsets; offsets 401 fs/ufs/inode.c unsigned offsets[4]; offsets 402 fs/ufs/inode.c int depth = ufs_block_to_path(inode, fragment >> uspi->s_fpbshift, offsets); offsets 406 fs/ufs/inode.c phys64 = ufs_frag_map(inode, offsets, depth); offsets 442 fs/ufs/inode.c phys64 = ufs_inode_getfrag(inode, offsets[0], fragment, offsets 446 fs/ufs/inode.c phys64 = ufs_inode_getfrag(inode, offsets[0], fragment, offsets 449 fs/ufs/inode.c phys64 = ufs_inode_getblock(inode, phys64, offsets[i], offsets 451 fs/ufs/inode.c phys64 = ufs_inode_getblock(inode, phys64, offsets[depth - 1], offsets 1122 fs/ufs/inode.c unsigned offsets[4]; offsets 1132 fs/ufs/inode.c depth = ufs_block_to_path(inode, last, offsets); offsets 1140 fs/ufs/inode.c if (offsets[depth2] != uspi->s_apb - 1) offsets 1146 fs/ufs/inode.c offsets[0] = UFS_IND_BLOCK; offsets 1149 fs/ufs/inode.c p = ufs_get_direct_data_ptr(uspi, ufsi, offsets[0]++); offsets 1161 fs/ufs/inode.c p = ubh_get_data_ptr(uspi, ubh[i], offsets[i + 1]++); offsets 1164 fs/ufs/inode.c free_branch_tail(inode, offsets[i + 1], ubh[i], depth - i - 1); offsets 1166 fs/ufs/inode.c for (i = offsets[0]; i <= UFS_TIND_BLOCK; i++) { offsets 2464 fs/xfs/libxfs/xfs_alloc.c static const short offsets[] = { offsets 2491 fs/xfs/libxfs/xfs_alloc.c xfs_btree_offsets(fields, offsets, XFS_AGF_NUM_BITS, &first, &last); offsets 805 fs/xfs/libxfs/xfs_btree.c const short *offsets, /* table of field offsets */ offsets 819 fs/xfs/libxfs/xfs_btree.c *first = offsets[i]; offsets 828 fs/xfs/libxfs/xfs_btree.c *last = offsets[i + 1] - 1; offsets 332 fs/xfs/libxfs/xfs_btree.h const short *offsets,/* table of field offsets */ offsets 2419 fs/xfs/libxfs/xfs_ialloc.c static const short offsets[] = { /* field starting offsets */ offsets 2449 fs/xfs/libxfs/xfs_ialloc.c xfs_btree_offsets(fields, offsets, XFS_AGI_NUM_BITS_R1, offsets 2460 fs/xfs/libxfs/xfs_ialloc.c xfs_btree_offsets(fields, offsets, XFS_AGI_NUM_BITS_R2, offsets 168 include/drm/drm_framebuffer.h unsigned int offsets[4]; offsets 1089 include/linux/mlx5/driver.h size_t *offsets); offsets 287 include/linux/netfilter/x_tables.h bool xt_find_jump_offset(const unsigned int *offsets, offsets 133 include/linux/platform_data/ti-sysc.h int *offsets; offsets 92 include/linux/soc/qcom/llcc-qcom.h u32 *offsets; offsets 209 include/linux/vmalloc.h struct vm_struct **pcpu_get_vm_areas(const unsigned long *offsets, offsets 216 include/linux/vmalloc.h pcpu_get_vm_areas(const unsigned long *offsets, offsets 522 include/uapi/drm/drm_mode.h __u32 offsets[4]; /* offset of each plane */ offsets 282 include/uapi/linux/android/binder.h binder_uintptr_t offsets; offsets 1885 kernel/sys.c static const unsigned char offsets[] = { offsets 1903 kernel/sys.c for (i = 0; i < ARRAY_SIZE(offsets); i++) { offsets 1904 kernel/sys.c u64 val = *(u64 *)((char *)prctl_map + offsets[i]); offsets 784 kernel/time/timekeeping.c static ktime_t *offsets[TK_OFFS_MAX] = { offsets 794 kernel/time/timekeeping.c ktime_t base, *offset = offsets[offs]; offsets 815 kernel/time/timekeeping.c ktime_t base, *offset = offsets[offs]; offsets 838 kernel/time/timekeeping.c ktime_t *offset = offsets[offs]; offsets 3225 mm/vmalloc.c struct vm_struct **pcpu_get_vm_areas(const unsigned long *offsets, offsets 3241 mm/vmalloc.c start = offsets[area]; offsets 3245 mm/vmalloc.c BUG_ON(!IS_ALIGNED(offsets[area], align)); offsets 3249 mm/vmalloc.c if (start > offsets[last_area]) offsets 3253 mm/vmalloc.c unsigned long start2 = offsets[area2]; offsets 3259 mm/vmalloc.c last_end = offsets[last_area] + sizes[last_area]; offsets 3282 mm/vmalloc.c start = offsets[area]; offsets 3330 mm/vmalloc.c start = offsets[area]; offsets 3339 mm/vmalloc.c start = base + offsets[area]; offsets 2048 net/bridge/netfilter/ebtables.c unsigned int offsets[4]; offsets 2070 net/bridge/netfilter/ebtables.c offsets[0] = sizeof(struct ebt_entry); /* matches come first */ offsets 2071 net/bridge/netfilter/ebtables.c memcpy(&offsets[1], &entry->watchers_offset, offsets 2072 net/bridge/netfilter/ebtables.c sizeof(offsets) - sizeof(offsets[0])); offsets 2078 net/bridge/netfilter/ebtables.c ret = ebt_buf_add(state, &offsets[1], offsets 2079 net/bridge/netfilter/ebtables.c sizeof(offsets) - sizeof(offsets[0])); offsets 2091 net/bridge/netfilter/ebtables.c if (offsets[i] > *total) offsets 2094 net/bridge/netfilter/ebtables.c if (i < 3 && offsets[i] == *total) offsets 2099 net/bridge/netfilter/ebtables.c if (offsets[i-1] > offsets[i]) offsets 2106 net/bridge/netfilter/ebtables.c char *buf = buf_start + offsets[i]; offsets 2108 net/bridge/netfilter/ebtables.c if (offsets[i] > offsets[j]) offsets 2112 net/bridge/netfilter/ebtables.c size = offsets[j] - offsets[i]; offsets 2119 net/bridge/netfilter/ebtables.c offsets_update[i], offsets[j] + new_offset); offsets 2120 net/bridge/netfilter/ebtables.c offsets_update[i] = offsets[j] + new_offset; offsets 303 net/ipv4/netfilter/arp_tables.c unsigned int *offsets) offsets 368 net/ipv4/netfilter/arp_tables.c if (!xt_find_jump_offset(offsets, newpos, offsets 525 net/ipv4/netfilter/arp_tables.c unsigned int *offsets; offsets 538 net/ipv4/netfilter/arp_tables.c offsets = xt_alloc_entry_offsets(newinfo->number); offsets 539 net/ipv4/netfilter/arp_tables.c if (!offsets) offsets 553 net/ipv4/netfilter/arp_tables.c offsets[i] = (void *)iter - entry0; offsets 568 net/ipv4/netfilter/arp_tables.c if (!mark_source_chains(newinfo, repl->valid_hooks, entry0, offsets)) { offsets 572 net/ipv4/netfilter/arp_tables.c kvfree(offsets); offsets 595 net/ipv4/netfilter/arp_tables.c kvfree(offsets); offsets 370 net/ipv4/netfilter/ip_tables.c unsigned int *offsets) offsets 432 net/ipv4/netfilter/ip_tables.c if (!xt_find_jump_offset(offsets, newpos, offsets 666 net/ipv4/netfilter/ip_tables.c unsigned int *offsets; offsets 679 net/ipv4/netfilter/ip_tables.c offsets = xt_alloc_entry_offsets(newinfo->number); offsets 680 net/ipv4/netfilter/ip_tables.c if (!offsets) offsets 693 net/ipv4/netfilter/ip_tables.c offsets[i] = (void *)iter - entry0; offsets 708 net/ipv4/netfilter/ip_tables.c if (!mark_source_chains(newinfo, repl->valid_hooks, entry0, offsets)) { offsets 712 net/ipv4/netfilter/ip_tables.c kvfree(offsets); offsets 735 net/ipv4/netfilter/ip_tables.c kvfree(offsets); offsets 388 net/ipv6/netfilter/ip6_tables.c unsigned int *offsets) offsets 450 net/ipv6/netfilter/ip6_tables.c if (!xt_find_jump_offset(offsets, newpos, offsets 683 net/ipv6/netfilter/ip6_tables.c unsigned int *offsets; offsets 696 net/ipv6/netfilter/ip6_tables.c offsets = xt_alloc_entry_offsets(newinfo->number); offsets 697 net/ipv6/netfilter/ip6_tables.c if (!offsets) offsets 710 net/ipv6/netfilter/ip6_tables.c offsets[i] = (void *)iter - entry0; offsets 725 net/ipv6/netfilter/ip6_tables.c if (!mark_source_chains(newinfo, repl->valid_hooks, entry0, offsets)) { offsets 729 net/ipv6/netfilter/ip6_tables.c kvfree(offsets); offsets 752 net/ipv6/netfilter/ip6_tables.c kvfree(offsets); offsets 961 net/netfilter/x_tables.c bool xt_find_jump_offset(const unsigned int *offsets, offsets 969 net/netfilter/x_tables.c if (offsets[m] > target) offsets 971 net/netfilter/x_tables.c else if (offsets[m] < target) offsets 929 sound/pci/oxygen/xonar_pcm179x.c static const s8 offsets[] = { 2*-18, 2*-12, 2*-6, 0 }; offsets 937 sound/pci/oxygen/xonar_pcm179x.c offset = offsets[value->value.enumerated.item[0]]; offsets 158 sound/usb/mixer_scarlett.c int offsets[SND_SCARLETT_OFFSETS_MAX]; offsets 189 sound/usb/mixer_scarlett.c .offsets = {}, offsets 198 sound/usb/mixer_scarlett.c .offsets = {}, offsets 207 sound/usb/mixer_scarlett.c .offsets = {}, offsets 216 sound/usb/mixer_scarlett.c .offsets = {}, offsets 350 sound/usb/mixer_scarlett.c static void scarlett_generate_name(int i, char *dst, int offsets[]) offsets 352 sound/usb/mixer_scarlett.c if (i > offsets[SCARLETT_OFFSET_MIX]) offsets 354 sound/usb/mixer_scarlett.c 'A'+(i - offsets[SCARLETT_OFFSET_MIX] - 1)); offsets 355 sound/usb/mixer_scarlett.c else if (i > offsets[SCARLETT_OFFSET_ADAT]) offsets 356 sound/usb/mixer_scarlett.c sprintf(dst, "ADAT %d", i - offsets[SCARLETT_OFFSET_ADAT]); offsets 357 sound/usb/mixer_scarlett.c else if (i > offsets[SCARLETT_OFFSET_SPDIF]) offsets 358 sound/usb/mixer_scarlett.c sprintf(dst, "SPDIF %d", i - offsets[SCARLETT_OFFSET_SPDIF]); offsets 359 sound/usb/mixer_scarlett.c else if (i > offsets[SCARLETT_OFFSET_ANALOG]) offsets 360 sound/usb/mixer_scarlett.c sprintf(dst, "Analog %d", i - offsets[SCARLETT_OFFSET_ANALOG]); offsets 361 sound/usb/mixer_scarlett.c else if (i > offsets[SCARLETT_OFFSET_PCM]) offsets 362 sound/usb/mixer_scarlett.c sprintf(dst, "PCM %d", i - offsets[SCARLETT_OFFSET_PCM]); offsets 384 sound/usb/mixer_scarlett.c opt->offsets); offsets 635 sound/usb/mixer_scarlett.c .offsets = {0, 12, 16, 18, 18}, offsets 642 sound/usb/mixer_scarlett.c .offsets = {0, 12, 16, 18, 18}, offsets 677 sound/usb/mixer_scarlett.c .offsets = {0, 12, 16, 18, 18}, offsets 684 sound/usb/mixer_scarlett.c .offsets = {0, 12, 16, 18, 18}, offsets 716 sound/usb/mixer_scarlett.c .offsets = {0, 6, 14, 16, 24}, offsets 723 sound/usb/mixer_scarlett.c .offsets = {0, 6, 14, 16, 24}, offsets 753 sound/usb/mixer_scarlett.c .offsets = {0, 8, 16, 18, 26}, offsets 760 sound/usb/mixer_scarlett.c .offsets = {0, 8, 16, 18, 26}, offsets 795 sound/usb/mixer_scarlett.c .offsets = {0, 20, 28, 30, 38}, offsets 802 sound/usb/mixer_scarlett.c .offsets = {0, 20, 28, 30, 38}, offsets 60 tools/perf/tests/dso-data.c struct test_data_offset offsets[] = { offsets 133 tools/perf/tests/dso-data.c for (i = 0; i < ARRAY_SIZE(offsets); i++) { offsets 134 tools/perf/tests/dso-data.c struct test_data_offset *data = &offsets[i]; offsets 186 tools/perf/ui/browsers/annotate.c target = notes->offsets[cursor->ops.target.offset]; offsets 944 tools/perf/ui/browsers/annotate.c zfree(¬es->offsets); offsets 1017 tools/perf/util/annotate.c if (notes->offsets[offset]) offsets 1038 tools/perf/util/annotate.c struct annotation_line *al = notes->offsets[offset]; offsets 1076 tools/perf/util/annotate.c al = notes->offsets[offset]; offsets 2541 tools/perf/util/annotate.c struct annotation_line *al = notes->offsets[offset]; offsets 2549 tools/perf/util/annotate.c al = notes->offsets[dl->ops.target.offset]; offsets 2587 tools/perf/util/annotate.c notes->offsets[al->offset] = al; offsets 2989 tools/perf/util/annotate.c notes->offsets = zalloc(size * sizeof(struct annotation_line *)); offsets 2990 tools/perf/util/annotate.c if (notes->offsets == NULL) offsets 3016 tools/perf/util/annotate.c zfree(¬es->offsets); offsets 279 tools/perf/util/annotate.h struct annotation_line **offsets; offsets 30 tools/testing/selftests/bpf/progs/pyperf.h OffsetConfig offsets; offsets 87 tools/testing/selftests/bpf/progs/pyperf.h frame_ptr + pidData->offsets.PyFrameObject_back); offsets 90 tools/testing/selftests/bpf/progs/pyperf.h frame_ptr + pidData->offsets.PyFrameObject_code); offsets 97 tools/testing/selftests/bpf/progs/pyperf.h frame->f_code + pidData->offsets.PyCodeObject_filename); offsets 100 tools/testing/selftests/bpf/progs/pyperf.h frame->f_code + pidData->offsets.PyCodeObject_name); offsets 105 tools/testing/selftests/bpf/progs/pyperf.h frame->co_filename + pidData->offsets.String_data); offsets 109 tools/testing/selftests/bpf/progs/pyperf.h frame->co_name + pidData->offsets.String_data); offsets 195 tools/testing/selftests/bpf/progs/pyperf.h thread_state + pidData->offsets.PyThreadState_thread); offsets 209 tools/testing/selftests/bpf/progs/pyperf.h thread_state + pidData->offsets.PyThreadState_frame);